191 lines
7.7 KiB
C
191 lines
7.7 KiB
C
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/*
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u8g_dev_st7565_dogm128.c
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Universal 8bit Graphics Library
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Copyright (c) 2011, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "u8g.h"
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#define WIDTH 128
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#define HEIGHT 64
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#define PAGE_HEIGHT 8
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const uint8_t u8g_dev_st7565_dogm128_init_seq[] PROGMEM = {
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U8G_ESC_CS(0), /* disable chip */
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
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U8G_ESC_CS(1), /* enable chip */
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0x040, /* set display start line */
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0x0a1, /* ADC set to reverse */
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0x0c0, /* common output mode: set scan direction normal operation */
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0x0a6, /* display normal (none reverse) */
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0x0a2, /* LCD bias 1/9 */
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0x02f, /* all power control circuits on */
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0x0f8, /* set booster ratio to */
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0x000, /* 4x */
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0x027, /* set V0 voltage resistor ratio to large */
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0x081, /* set contrast */
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0x018, /* contrast value, EA default: 0x016 */
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0x0ac, /* indicator */
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0x000, /* disable */
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0x0a4, /* normal display (not all on) */
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0x0af, /* display on */
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U8G_ESC_DLY(50), /* delay 50 ms */
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U8G_ESC_CS(0), /* disable chip */
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U8G_ESC_END /* end of sequence */
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};
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static const uint8_t u8g_dev_st7565_dogm128_data_start[] PROGMEM = {
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_CS(1), /* enable chip */
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0x010, /* set upper 4 bit of the col adr to 0 */
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0x000, /* set lower 4 bit of the col adr to 0 */
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U8G_ESC_END /* end of sequence */
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};
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static const uint8_t u8g_dev_st7565_dogm128_sleep_on[] PROGMEM = {
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_CS(1), /* enable chip */
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0x0ac, /* static indicator off */
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0x000, /* indicator register set (not sure if this is required) */
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0x0ae, /* display off */
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0x0a5, /* all points on */
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U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
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U8G_ESC_END /* end of sequence */
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};
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static const uint8_t u8g_dev_st7565_dogm128_sleep_off[] PROGMEM = {
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_CS(1), /* enable chip */
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0x0a4, /* all points off */
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0x0af, /* display on */
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U8G_ESC_DLY(50), /* delay 50 ms */
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U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
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U8G_ESC_END /* end of sequence */
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};
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uint8_t u8g_dev_st7565_dogm128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_data_start);
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u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
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return 0;
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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case U8G_DEV_MSG_CONTRAST:
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u8g_SetChipSelect(u8g, dev, 1);
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u8g_SetAddress(u8g, dev, 0); /* instruction mode */
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u8g_WriteByte(u8g, dev, 0x081);
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u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
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u8g_SetChipSelect(u8g, dev, 0);
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return 1;
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case U8G_DEV_MSG_SLEEP_ON:
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_on);
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return 1;
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case U8G_DEV_MSG_SLEEP_OFF:
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_off);
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return 1;
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}
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return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
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}
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uint8_t u8g_dev_st7565_dogm128_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_data_start);
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u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, pb->width, pb->buf);
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u8g_SetChipSelect(u8g, dev, 0);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_data_start);
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u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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case U8G_DEV_MSG_CONTRAST:
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u8g_SetChipSelect(u8g, dev, 1);
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u8g_SetAddress(u8g, dev, 0); /* instruction mode */
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u8g_WriteByte(u8g, dev, 0x081);
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u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
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u8g_SetChipSelect(u8g, dev, 0);
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return 1;
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case U8G_DEV_MSG_SLEEP_ON:
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_on);
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return 1;
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case U8G_DEV_MSG_SLEEP_OFF:
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_dogm128_sleep_off);
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return 1;
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}
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return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
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}
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U8G_PB_DEV(u8g_dev_st7565_dogm128_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_dogm128_fn, U8G_COM_SW_SPI);
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U8G_PB_DEV(u8g_dev_st7565_dogm128_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_dogm128_fn, U8G_COM_HW_SPI);
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U8G_PB_DEV(u8g_dev_st7565_dogm128_parallel, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_st7565_dogm128_fn, U8G_COM_PARALLEL);
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uint8_t u8g_dev_st7565_dogm128_2x_buf[WIDTH*2] U8G_NOCOMMON ;
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u8g_pb_t u8g_dev_st7565_dogm128_2x_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_st7565_dogm128_2x_buf};
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u8g_dev_t u8g_dev_st7565_dogm128_2x_sw_spi = { u8g_dev_st7565_dogm128_2x_fn, &u8g_dev_st7565_dogm128_2x_pb, U8G_COM_SW_SPI };
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u8g_dev_t u8g_dev_st7565_dogm128_2x_hw_spi = { u8g_dev_st7565_dogm128_2x_fn, &u8g_dev_st7565_dogm128_2x_pb, U8G_COM_HW_SPI };
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u8g_dev_t u8g_dev_st7565_dogm128_2x_parallel = { u8g_dev_st7565_dogm128_2x_fn, &u8g_dev_st7565_dogm128_2x_pb, U8G_COM_PARALLEL };
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