2017-04-28 22:27:57 +02:00
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// Module for interfacing with i2s hardware
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2018-10-14 18:05:48 +02:00
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#include <string.h>
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2017-04-28 22:27:57 +02:00
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#include "module.h"
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#include "lauxlib.h"
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#include "lmem.h"
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#include "platform.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "esp_task.h"
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#include "task/task.h"
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#include "driver/i2s.h"
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2018-12-02 16:20:45 +01:00
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#include "common.h"
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2017-04-28 22:27:57 +02:00
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#define MAX_I2C_NUM 2
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#define I2S_CHECK_ID(id) if(id >= MAX_I2C_NUM) luaL_error( L, "i2s not exists" )
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typedef struct {
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2018-10-14 18:05:48 +02:00
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int ref;
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const char *data;
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size_t len;
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} i2s_tx_data_t;
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2017-04-28 22:27:57 +02:00
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typedef struct {
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2018-10-14 18:05:48 +02:00
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struct {
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2023-01-31 07:07:54 +01:00
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TaskHandle_t taskHandle;
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2018-10-14 18:05:48 +02:00
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QueueHandle_t queue;
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} tx;
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struct {
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2023-01-31 07:07:54 +01:00
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TaskHandle_t taskHandle;
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2018-10-14 18:05:48 +02:00
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QueueHandle_t queue;
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} rx;
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int cb;
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int i2s_bits_per_sample, data_bits_per_sample;
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} i2s_status_t;
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2017-04-28 22:27:57 +02:00
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2018-10-14 18:05:48 +02:00
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static task_handle_t i2s_tx_task_id, i2s_rx_task_id, i2s_disposal_task_id;
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2017-04-28 22:27:57 +02:00
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static i2s_status_t i2s_status[MAX_I2C_NUM];
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// LUA
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2018-10-14 18:05:48 +02:00
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static void i2s_tx_task( task_param_t param, task_prio_t prio ) {
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int i2s_id = (int)param;
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i2s_status_t *is = &i2s_status[i2s_id];
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2017-04-28 22:27:57 +02:00
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2018-10-14 18:05:48 +02:00
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if (is->cb != LUA_NOREF) {
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lua_State *L = lua_getstate();
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lua_rawgeti(L, LUA_REGISTRYINDEX, is->cb);
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lua_pushinteger( L, i2s_id );
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lua_pushstring( L, "tx" );
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2021-08-23 16:11:31 +02:00
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luaL_pcallx( L, 2, 0 );
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2018-10-14 18:05:48 +02:00
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}
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}
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static void i2s_rx_task( task_param_t param, task_prio_t prio ) {
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int i2s_id = (int)param;
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i2s_status_t *is = &i2s_status[i2s_id];
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if (is->cb != LUA_NOREF) {
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lua_State *L = lua_getstate();
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lua_rawgeti(L, LUA_REGISTRYINDEX, is->cb);
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lua_pushinteger( L, i2s_id );
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lua_pushstring( L, "rx" );
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2021-08-23 16:11:31 +02:00
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luaL_pcallx( L, 2, 0 );
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2017-04-28 22:27:57 +02:00
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}
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2018-10-14 18:05:48 +02:00
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}
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static void i2s_disposal_task( task_param_t param, task_prio_t prio ) {
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lua_State *L = lua_getstate();
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int ref = (int)param;
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luaL_unref( L, LUA_REGISTRYINDEX, ref );
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2017-04-28 22:27:57 +02:00
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}
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// RTOS
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2018-10-14 18:05:48 +02:00
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static void task_I2S_rx( void *pvParameters ) {
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int i2s_id = (int)pvParameters;
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i2s_status_t *is = &i2s_status[i2s_id];
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i2s_event_t i2s_event;
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for (;;) {
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// process I2S RX events
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xQueueReceive( is->rx.queue, &i2s_event, portMAX_DELAY );
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if (i2s_event.type == I2S_EVENT_RX_DONE) {
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task_post_high( i2s_rx_task_id, i2s_id );
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2017-04-28 22:27:57 +02:00
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}
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}
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}
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2018-10-14 18:05:48 +02:00
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static void task_I2S_tx( void *pvParameters ) {
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int i2s_id = (int)pvParameters;
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i2s_status_t *is = &i2s_status[i2s_id];
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i2s_tx_data_t tx_data;
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for (;;) {
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// request new TX data
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task_post_high( i2s_tx_task_id, i2s_id );
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// get TX data from Lua task
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2018-11-04 23:28:21 +01:00
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// just peek the item to keep it in the queue so that node_i2s_stop can find and unref it if
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// this task was deleted before posting i2s_disposal_task
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xQueuePeek( is->tx.queue, &tx_data, portMAX_DELAY );
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2018-10-14 18:05:48 +02:00
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// write TX data to I2S, note that this call might block
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size_t dummy;
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if (is->data_bits_per_sample == is->i2s_bits_per_sample) {
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i2s_write( i2s_id, tx_data.data, tx_data.len, &dummy, portMAX_DELAY );
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} else {
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i2s_write_expand( i2s_id, tx_data.data, tx_data.len, is->data_bits_per_sample, is->i2s_bits_per_sample, &dummy, portMAX_DELAY );
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}
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// notify Lua to dispose object
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task_post_low( i2s_disposal_task_id, tx_data.ref );
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2018-11-04 23:28:21 +01:00
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// tx data is going to be unref'ed, so finally remove it from the queue
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xQueueReceive( is->tx.queue, &tx_data, portMAX_DELAY );
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2018-10-14 18:05:48 +02:00
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}
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}
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2017-04-28 22:27:57 +02:00
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// Lua: start( i2s_id, {}, callback )
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static int node_i2s_start( lua_State *L )
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{
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int i2s_id = luaL_checkinteger( L, 1 );
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I2S_CHECK_ID( i2s_id );
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2018-10-14 18:05:48 +02:00
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i2s_status_t *is = &i2s_status[i2s_id];
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int top = lua_gettop( L );
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2021-08-21 17:39:54 +02:00
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luaL_checktable (L, 2);
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2017-04-28 22:27:57 +02:00
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i2s_config_t i2s_config;
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2018-10-14 18:05:48 +02:00
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memset( &i2s_config, 0, sizeof( i2s_config ) );
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2017-04-28 22:27:57 +02:00
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i2s_pin_config_t pin_config;
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2018-10-14 18:05:48 +02:00
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memset( &pin_config, 0, sizeof( pin_config ) );
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2018-12-02 16:20:45 +01:00
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// temporarily copy option table to top of stack for opt_ functions
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lua_pushvalue(L, 2);
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i2s_config.mode = opt_checkint(L, "mode", I2S_MODE_MASTER | I2S_MODE_TX);
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i2s_config.sample_rate = opt_checkint_range(L, "rate", 44100, 1000, MAX_INT);
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2018-10-14 18:05:48 +02:00
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//
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2018-12-02 16:20:45 +01:00
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is->data_bits_per_sample = opt_checkint(L, "bits", 16);
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2018-10-14 18:05:48 +02:00
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is->i2s_bits_per_sample = is->data_bits_per_sample < I2S_BITS_PER_SAMPLE_16BIT ? I2S_BITS_PER_SAMPLE_16BIT : is->data_bits_per_sample;
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i2s_config.bits_per_sample = is->i2s_bits_per_sample;
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//
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2018-12-02 16:20:45 +01:00
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i2s_config.channel_format = opt_checkint(L, "channel", I2S_CHANNEL_FMT_RIGHT_LEFT);
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2021-07-29 05:47:45 +02:00
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i2s_config.communication_format = opt_checkint(L, "format", I2S_COMM_FORMAT_STAND_I2S);
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2023-01-31 07:07:54 +01:00
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i2s_config.dma_desc_num = opt_checkint_range(L, "buffer_count", 2, 2, 128);
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i2s_config.dma_frame_num = opt_checkint_range(L, "buffer_len", i2s_config.sample_rate / 100, 8, 1024);
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2018-10-18 22:47:39 +02:00
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i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1;
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2018-10-14 18:05:48 +02:00
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//
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2018-12-02 16:20:45 +01:00
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pin_config.bck_io_num = opt_checkint(L, "bck_pin", I2S_PIN_NO_CHANGE);
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pin_config.ws_io_num = opt_checkint(L, "ws_pin", I2S_PIN_NO_CHANGE);
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pin_config.data_out_num = opt_checkint(L, "data_out_pin", I2S_PIN_NO_CHANGE);
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pin_config.data_in_num = opt_checkint(L, "data_in_pin", I2S_PIN_NO_CHANGE);
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2018-10-14 18:05:48 +02:00
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//
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2018-12-02 16:20:45 +01:00
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i2s_dac_mode_t dac_mode = opt_checkint_range(L, "dac_mode", I2S_DAC_CHANNEL_DISABLE, 0, I2S_DAC_CHANNEL_MAX-1);
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2018-10-14 18:05:48 +02:00
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//
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2018-12-02 16:20:45 +01:00
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adc1_channel_t adc1_channel = opt_checkint_range(L, "adc1_channel", ADC1_CHANNEL_MAX, ADC1_CHANNEL_0, ADC1_CHANNEL_MAX);
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2017-04-28 22:27:57 +02:00
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2018-10-14 18:05:48 +02:00
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// handle optional callback functions TX and RX
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lua_settop( L, top );
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if (lua_isfunction( L, 3 )) {
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lua_pushvalue( L, 3 );
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is->cb = luaL_ref( L, LUA_REGISTRYINDEX );
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} else {
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is->cb = LUA_NOREF;
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}
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esp_err_t err;
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if (i2s_config.mode & I2S_MODE_RX) {
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2023-01-31 07:07:54 +01:00
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err = i2s_driver_install(i2s_id, &i2s_config, i2s_config.dma_desc_num, &is->rx.queue);
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2018-10-14 18:05:48 +02:00
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} else {
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2023-01-31 07:07:54 +01:00
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err = i2s_driver_install(i2s_id, &i2s_config, i2s_config.dma_desc_num, NULL);
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2018-10-14 18:05:48 +02:00
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}
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if (err != ESP_OK)
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2017-04-29 17:06:58 +02:00
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luaL_error( L, "i2s can not start" );
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2017-04-28 22:27:57 +02:00
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2018-10-14 18:05:48 +02:00
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if (dac_mode != I2S_DAC_CHANNEL_DISABLE) {
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if (i2s_set_dac_mode( dac_mode ) != ESP_OK)
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luaL_error( L, "error setting dac mode" );
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}
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if (adc1_channel != ADC1_CHANNEL_MAX) {
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if (i2s_set_adc_mode( ADC_UNIT_1, adc1_channel ) != ESP_OK)
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luaL_error( L, "error setting adc1 mode" );
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}
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if (i2s_set_pin(i2s_id, &pin_config) != ESP_OK)
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luaL_error( L, "error setting pins" );
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if (i2s_config.mode & I2S_MODE_TX) {
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// prepare TX task
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2021-07-15 08:25:25 +02:00
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char pcName[20];
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snprintf( pcName, sizeof(pcName), "I2S_tx_%d", i2s_id );
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2018-10-14 18:05:48 +02:00
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pcName[7] = '\0';
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if ((is->tx.queue = xQueueCreate( 2, sizeof( i2s_tx_data_t ) )) == NULL)
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return luaL_error( L, "cannot create queue" );
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xTaskCreate(task_I2S_tx, pcName, 2048, (void *)i2s_id, ESP_TASK_MAIN_PRIO + 1, &is->tx.taskHandle);
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}
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if (i2s_config.mode & I2S_MODE_RX) {
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// prepare RX task
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2021-07-15 08:25:25 +02:00
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char pcName[20];
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snprintf( pcName, sizeof(pcName), "I2S_rx_%d", i2s_id );
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2018-10-14 18:05:48 +02:00
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pcName[7] = '\0';
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xTaskCreate(task_I2S_rx, pcName, 1024, (void *)i2s_id, ESP_TASK_MAIN_PRIO + 1, &is->rx.taskHandle);
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}
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2017-04-28 22:27:57 +02:00
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return 0;
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}
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// Lua: stop( i2s_id )
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static int node_i2s_stop( lua_State *L )
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{
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int i2s_id = luaL_checkinteger( L, 1 );
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I2S_CHECK_ID( i2s_id );
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2018-10-14 18:05:48 +02:00
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i2s_status_t *is = &i2s_status[i2s_id];
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if (is->tx.taskHandle != NULL) {
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vTaskDelete( is->tx.taskHandle );
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is->tx.taskHandle = NULL;
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2017-04-28 22:27:57 +02:00
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}
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2018-10-14 18:05:48 +02:00
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if (is->tx.queue != NULL) {
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2018-11-04 23:28:21 +01:00
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// unlink pending tx jobs from the queue
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while (uxQueueMessagesWaiting( is->tx.queue ) > 0) {
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i2s_tx_data_t tx_data;
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xQueueReceive( is->tx.queue, &tx_data, portMAX_DELAY );
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luaL_unref( L, LUA_REGISTRYINDEX, tx_data.ref );
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}
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2018-10-14 18:05:48 +02:00
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vQueueDelete( is->tx.queue );
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is->tx.queue = NULL;
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}
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if (is->rx.taskHandle != NULL) {
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vTaskDelete( is->rx.taskHandle );
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is->rx.taskHandle = NULL;
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2017-04-28 22:27:57 +02:00
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}
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2018-11-04 23:28:21 +01:00
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2018-10-14 18:05:48 +02:00
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// the rx queue is created and destroyed by the I2S driver
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2018-11-04 23:28:21 +01:00
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i2s_driver_uninstall(i2s_id);
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2018-10-14 18:05:48 +02:00
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if (is->cb != LUA_NOREF) {
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luaL_unref( L, LUA_REGISTRYINDEX, is->cb );
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is->cb = LUA_NOREF;
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}
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2017-04-28 22:27:57 +02:00
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return 0;
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}
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// Lua: read( i2s_id, bytes[, wait_ms] )
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static int node_i2s_read( lua_State *L )
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{
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int i2s_id = luaL_checkinteger( L, 1 );
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I2S_CHECK_ID( i2s_id );
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2018-10-14 18:05:48 +02:00
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2018-12-02 16:20:45 +01:00
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const size_t bytes = luaL_checkinteger( L, 2 );
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2018-10-18 22:47:39 +02:00
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int wait_ms = luaL_optint(L, 3, 0);
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2017-04-28 22:27:57 +02:00
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char * data = luaM_malloc( L, bytes );
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2018-10-18 22:47:39 +02:00
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size_t read;
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2023-01-31 07:07:54 +01:00
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if (i2s_read(i2s_id, data, bytes, &read, wait_ms / portTICK_PERIOD_MS) != ESP_OK)
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2018-11-02 22:30:45 +01:00
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return luaL_error( L, "I2S driver error" );
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2018-10-14 18:05:48 +02:00
|
|
|
lua_pushlstring(L, data, read);
|
2018-12-02 16:20:45 +01:00
|
|
|
luaM_freemem(L, data, bytes);
|
2018-10-14 18:05:48 +02:00
|
|
|
|
2017-04-28 22:27:57 +02:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-10-14 18:05:48 +02:00
|
|
|
// Lua: write( i2s_id, data )
|
2017-04-28 22:27:57 +02:00
|
|
|
static int node_i2s_write( lua_State *L )
|
|
|
|
{
|
2018-10-14 18:05:48 +02:00
|
|
|
int stack = 0;
|
|
|
|
|
|
|
|
int i2s_id = luaL_checkinteger( L, ++stack );
|
2017-04-28 22:27:57 +02:00
|
|
|
I2S_CHECK_ID( i2s_id );
|
|
|
|
|
2018-10-14 18:05:48 +02:00
|
|
|
i2s_tx_data_t tx_data;
|
|
|
|
tx_data.data = (const char *)luaL_checklstring( L, ++stack, &tx_data.len );
|
|
|
|
lua_pushvalue( L, stack );
|
|
|
|
tx_data.ref = luaL_ref( L, LUA_REGISTRYINDEX );
|
|
|
|
|
|
|
|
// post this to the TX task
|
|
|
|
xQueueSendToBack( i2s_status[i2s_id].tx.queue, &tx_data, portMAX_DELAY );
|
|
|
|
|
|
|
|
return 0;
|
2017-04-28 22:27:57 +02:00
|
|
|
}
|
|
|
|
|
2018-11-02 22:30:45 +01:00
|
|
|
// Lua: mute( i2s_id )
|
|
|
|
static int node_i2s_mute( lua_State *L )
|
|
|
|
{
|
|
|
|
int stack = 0;
|
|
|
|
|
|
|
|
int i2s_id = luaL_checkinteger( L, ++stack );
|
|
|
|
I2S_CHECK_ID( i2s_id );
|
|
|
|
|
|
|
|
if (i2s_zero_dma_buffer( i2s_id ) != ESP_OK)
|
|
|
|
return luaL_error( L, "I2S driver error" );
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2017-04-28 22:27:57 +02:00
|
|
|
// Module function map
|
2021-08-21 17:39:54 +02:00
|
|
|
LROT_BEGIN(i2s, NULL, 0)
|
2019-07-22 11:13:43 +02:00
|
|
|
LROT_FUNCENTRY( start, node_i2s_start )
|
|
|
|
LROT_FUNCENTRY( stop, node_i2s_stop )
|
|
|
|
LROT_FUNCENTRY( read, node_i2s_read )
|
|
|
|
LROT_FUNCENTRY( write, node_i2s_write )
|
|
|
|
LROT_FUNCENTRY( mute, node_i2s_mute )
|
|
|
|
|
2021-07-29 05:47:45 +02:00
|
|
|
LROT_NUMENTRY( FORMAT_I2S_STAND, I2S_COMM_FORMAT_STAND_I2S )
|
|
|
|
LROT_NUMENTRY( FORMAT_I2S_MSB, I2S_COMM_FORMAT_STAND_MSB )
|
|
|
|
LROT_NUMENTRY( FORMAT_PCM_SHORT, I2S_COMM_FORMAT_STAND_PCM_SHORT )
|
|
|
|
LROT_NUMENTRY( FORMAT_PCM_LONG, I2S_COMM_FORMAT_STAND_PCM_LONG )
|
2019-07-22 11:13:43 +02:00
|
|
|
|
|
|
|
LROT_NUMENTRY( CHANNEL_RIGHT_LEFT, I2S_CHANNEL_FMT_RIGHT_LEFT )
|
|
|
|
LROT_NUMENTRY( CHANNEL_ALL_LEFT, I2S_CHANNEL_FMT_ALL_LEFT )
|
|
|
|
LROT_NUMENTRY( CHANNEL_ONLY_LEFT, I2S_CHANNEL_FMT_ONLY_LEFT )
|
|
|
|
LROT_NUMENTRY( CHANNEL_ALL_RIGHT, I2S_CHANNEL_FMT_ALL_RIGHT )
|
|
|
|
LROT_NUMENTRY( CHANNEL_ONLY_RIGHT, I2S_CHANNEL_FMT_ONLY_RIGHT )
|
|
|
|
|
|
|
|
LROT_NUMENTRY( MODE_MASTER, I2S_MODE_MASTER )
|
|
|
|
LROT_NUMENTRY( MODE_SLAVE, I2S_MODE_SLAVE )
|
|
|
|
LROT_NUMENTRY( MODE_TX, I2S_MODE_TX )
|
|
|
|
LROT_NUMENTRY( MODE_RX, I2S_MODE_RX )
|
|
|
|
LROT_NUMENTRY( MODE_DAC_BUILT_IN, I2S_MODE_DAC_BUILT_IN )
|
|
|
|
LROT_NUMENTRY( MODE_ADC_BUILT_IN, I2S_MODE_ADC_BUILT_IN )
|
|
|
|
LROT_NUMENTRY( MODE_PDM, I2S_MODE_PDM )
|
|
|
|
|
|
|
|
LROT_NUMENTRY( DAC_CHANNEL_DISABLE, I2S_DAC_CHANNEL_DISABLE )
|
|
|
|
LROT_NUMENTRY( DAC_CHANNEL_RIGHT, I2S_DAC_CHANNEL_RIGHT_EN )
|
|
|
|
LROT_NUMENTRY( DAC_CHANNEL_LEFT, I2S_DAC_CHANNEL_LEFT_EN )
|
|
|
|
LROT_NUMENTRY( DAC_CHANNEL_BOTH, I2S_DAC_CHANNEL_BOTH_EN )
|
|
|
|
LROT_END(i2s, NULL, 0)
|
2017-04-28 22:27:57 +02:00
|
|
|
|
|
|
|
int luaopen_i2s( lua_State *L ) {
|
|
|
|
for(int i2s_id = 0; i2s_id < MAX_I2C_NUM; i2s_id++) {
|
2018-10-14 18:05:48 +02:00
|
|
|
i2s_status_t *is = &i2s_status[i2s_id];
|
|
|
|
is->tx.queue = NULL;
|
|
|
|
is->tx.taskHandle = NULL;
|
|
|
|
is->rx.queue = NULL;
|
|
|
|
is->rx.taskHandle = NULL;
|
|
|
|
is->cb = LUA_NOREF;
|
2017-04-28 22:27:57 +02:00
|
|
|
}
|
2018-10-14 18:05:48 +02:00
|
|
|
i2s_tx_task_id = task_get_id( i2s_tx_task );
|
|
|
|
i2s_rx_task_id = task_get_id( i2s_rx_task );
|
|
|
|
i2s_disposal_task_id = task_get_id( i2s_disposal_task );
|
2017-04-28 22:27:57 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-07-22 11:13:43 +02:00
|
|
|
NODEMCU_MODULE(I2S, "i2s", i2s, luaopen_i2s);
|