2015-06-25 04:26:54 +02:00
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#ifndef RTC_ACCESS_H
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#define RTC_ACCESS_H
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#include <c_types.h>
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#define RTC_MMIO_BASE 0x60000700
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#define RTC_USER_MEM_BASE 0x60001200
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#define RTC_USER_MEM_NUM_DWORDS 128
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#define RTC_TARGET_ADDR 0x04
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#define RTC_COUNTER_ADDR 0x1c
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2015-07-06 05:45:35 +02:00
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static inline uint32_t rtc_mem_read(uint32_t addr)
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2015-06-25 04:26:54 +02:00
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{
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return ((uint32_t*)RTC_USER_MEM_BASE)[addr];
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}
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2015-07-06 05:45:35 +02:00
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static inline void rtc_mem_write(uint32_t addr, uint32_t val)
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2015-06-25 04:26:54 +02:00
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{
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((uint32_t*)RTC_USER_MEM_BASE)[addr]=val;
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}
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static inline uint64_t rtc_make64(uint32_t high, uint32_t low)
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{
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return (((uint64_t)high)<<32)|low;
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}
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static inline uint64_t rtc_mem_read64(uint32_t addr)
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{
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return rtc_make64(rtc_mem_read(addr+1),rtc_mem_read(addr));
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}
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static inline void rtc_mem_write64(uint32_t addr, uint64_t val)
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{
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rtc_mem_write(addr+1,val>>32);
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rtc_mem_write(addr,val&0xffffffff);
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}
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static inline void rtc_memw(void)
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{
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asm volatile ("memw");
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}
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static inline void rtc_reg_write(uint32_t addr, uint32_t val)
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{
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rtc_memw();
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addr+=RTC_MMIO_BASE;
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*((volatile uint32_t*)addr)=val;
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rtc_memw();
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}
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static inline uint32_t rtc_reg_read(uint32_t addr)
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{
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addr+=RTC_MMIO_BASE;
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rtc_memw();
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return *((volatile uint32_t*)addr);
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}
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2016-12-14 12:39:31 +01:00
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static inline void rtc_reg_write_and_loop(uint32_t addr, uint32_t val)
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{
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addr+=RTC_MMIO_BASE;
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rtc_memw();
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asm("j 1f\n"
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".align 32\n"
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"1:\n"
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"s32i.n %1,%0,0\n"
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"2:\n"
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"j 2b\n"::"r"(addr),"r"(val):);
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}
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2015-06-25 04:26:54 +02:00
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#endif
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