2014-12-30 19:47:44 +01:00
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/******************************************************************************
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* Flash api for NodeMCU
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2014-12-31 01:08:31 +01:00
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* NodeMCU Team
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* 2014-12-31
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2014-12-30 19:47:44 +01:00
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*******************************************************************************/
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#include "user_config.h"
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#include "flash_api.h"
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#include "spi_flash.h"
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2015-01-05 16:57:07 +01:00
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#include "c_stdio.h"
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2014-12-30 19:47:44 +01:00
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2015-11-12 02:57:07 +01:00
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#if defined(ESP_INIT_DATA_ENABLE_READVDD33)
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# define INIT_107 0xff
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#elif defined(ESP_INIT_DATA_ENABLE_READADC)
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# define INIT_107 0x00
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#elif defined(ESP_INIT_DATA_FIXED_VDD33_VALUE)
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# define INIT_107 ESP_INIT_DATA_FIXED_VDD33_VALUE
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#else
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# define INIT_107 0xff
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#endif
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static const uint8_t flash_init_data[128] =
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2015-01-05 03:09:51 +01:00
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{
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0x05, 0x00, 0x04, 0x02, 0x05, 0x05, 0x05, 0x02, 0x05, 0x00, 0x04, 0x05, 0x05, 0x04, 0x05, 0x05,
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0x04, 0xFE, 0xFD, 0xFF, 0xF0, 0xF0, 0xF0, 0xE0, 0xE0, 0xE0, 0xE1, 0x0A, 0xFF, 0xFF, 0xF8, 0x00,
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0xF8, 0xF8, 0x52, 0x4E, 0x4A, 0x44, 0x40, 0x38, 0x00, 0x00, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05,
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0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xE1, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x93, 0x43, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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2015-11-12 02:57:07 +01:00
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, INIT_107, 0x00, 0x00, 0x00, 0x00,
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2016-02-23 10:22:41 +01:00
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0x03, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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2015-01-05 03:09:51 +01:00
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};
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2015-03-15 17:48:28 +01:00
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uint32_t flash_detect_size_byte(void)
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{
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2015-03-15 17:51:47 +01:00
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#define FLASH_BUFFER_SIZE_DETECT 32
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2015-03-15 17:48:28 +01:00
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uint32_t dummy_size = FLASH_SIZE_256KBYTE;
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2015-03-15 17:51:47 +01:00
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uint8_t data_orig[FLASH_BUFFER_SIZE_DETECT] ICACHE_STORE_ATTR = {0};
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uint8_t data_new[FLASH_BUFFER_SIZE_DETECT] ICACHE_STORE_ATTR = {0};
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if (SPI_FLASH_RESULT_OK == flash_safe_read(0, (uint32 *)data_orig, FLASH_BUFFER_SIZE_DETECT))
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2015-03-15 17:48:28 +01:00
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{
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dummy_size = FLASH_SIZE_256KBYTE;
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while ((dummy_size < FLASH_SIZE_16MBYTE) &&
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2015-03-15 17:51:47 +01:00
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(SPI_FLASH_RESULT_OK == flash_safe_read(dummy_size, (uint32 *)data_new, FLASH_BUFFER_SIZE_DETECT)) &&
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(0 != os_memcmp(data_orig, data_new, FLASH_BUFFER_SIZE_DETECT))
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)
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2015-03-15 17:48:28 +01:00
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{
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dummy_size *= 2;
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}
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};
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return dummy_size;
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2015-03-15 17:51:47 +01:00
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#undef FLASH_BUFFER_SIZE_DETECT
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2015-03-15 17:48:28 +01:00
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}
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uint32_t flash_safe_get_size_byte(void)
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{
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static uint32_t flash_size = 0;
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if (flash_size == 0)
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{
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flash_size = flash_detect_size_byte();
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}
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return flash_size;
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}
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uint16_t flash_safe_get_sec_num(void)
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{
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return (flash_safe_get_size_byte() / (SPI_FLASH_SEC_SIZE));
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}
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SpiFlashOpResult flash_safe_read(uint32 src_addr, uint32 *des_addr, uint32 size)
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{
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SpiFlashOpResult result = SPI_FLASH_RESULT_ERR;
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FLASH_SAFEMODE_ENTER();
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result = spi_flash_read(src_addr, (uint32 *) des_addr, size);
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FLASH_SAFEMODE_LEAVE();
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return result;
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}
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SpiFlashOpResult flash_safe_write(uint32 des_addr, uint32 *src_addr, uint32 size)
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{
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SpiFlashOpResult result = SPI_FLASH_RESULT_ERR;
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FLASH_SAFEMODE_ENTER();
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result = spi_flash_write(des_addr, src_addr, size);
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FLASH_SAFEMODE_LEAVE();
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return result;
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}
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SpiFlashOpResult flash_safe_erase_sector(uint16 sec)
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{
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SpiFlashOpResult result = SPI_FLASH_RESULT_ERR;
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FLASH_SAFEMODE_ENTER();
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result = spi_flash_erase_sector(sec);
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FLASH_SAFEMODE_LEAVE();
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return result;
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}
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SPIFlashInfo flash_rom_getinfo(void)
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2015-01-05 03:09:51 +01:00
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{
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volatile SPIFlashInfo spi_flash_info ICACHE_STORE_ATTR;
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2015-03-15 17:51:47 +01:00
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spi_flash_read(0, (uint32 *)(& spi_flash_info), sizeof(spi_flash_info));
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2015-01-05 03:09:51 +01:00
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return spi_flash_info;
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2014-12-30 19:47:44 +01:00
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}
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2015-03-15 17:48:28 +01:00
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uint8_t flash_rom_get_size_type(void)
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2014-12-31 01:08:31 +01:00
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{
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2015-03-15 17:48:28 +01:00
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return flash_rom_getinfo().size;
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2014-12-31 01:08:31 +01:00
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}
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2015-03-15 17:48:28 +01:00
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uint32_t flash_rom_get_size_byte(void)
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2014-12-30 19:47:44 +01:00
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{
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2015-03-15 17:51:47 +01:00
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static uint32_t flash_size = 0;
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if (flash_size == 0)
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2014-12-30 19:47:44 +01:00
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{
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2015-03-15 17:51:47 +01:00
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switch (flash_rom_getinfo().size)
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{
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case SIZE_2MBIT:
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// 2Mbit, 256kByte
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flash_size = 256 * 1024;
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break;
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case SIZE_4MBIT:
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// 4Mbit, 512kByte
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flash_size = 512 * 1024;
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break;
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case SIZE_8MBIT:
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// 8Mbit, 1MByte
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flash_size = 1 * 1024 * 1024;
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break;
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case SIZE_16MBIT:
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// 16Mbit, 2MByte
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flash_size = 2 * 1024 * 1024;
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break;
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case SIZE_32MBIT:
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// 32Mbit, 4MByte
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flash_size = 4 * 1024 * 1024;
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break;
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2015-12-30 02:49:01 +01:00
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case SIZE_16MBIT_8M_8M:
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// 16Mbit, 2MByte
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flash_size = 2 * 1024 * 1024;
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2015-03-15 17:51:47 +01:00
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break;
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2015-12-30 02:49:01 +01:00
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case SIZE_32MBIT_8M_8M:
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// 32Mbit, 4MByte
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flash_size = 4 * 1024 * 1024;
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2015-03-15 17:51:47 +01:00
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break;
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default:
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// Unknown flash size, fall back mode.
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flash_size = 512 * 1024;
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break;
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}
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2014-12-30 19:47:44 +01:00
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}
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return flash_size;
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}
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2015-03-15 17:48:28 +01:00
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bool flash_rom_set_size_type(uint8_t size)
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2014-12-31 01:08:31 +01:00
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{
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// Dangerous, here are dinosaur infested!!!!!
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// Reboot required!!!
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// If you don't know what you're doing, your nodemcu may turn into stone ...
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2015-03-15 22:40:43 +01:00
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NODE_DBG("\nBEGIN SET FLASH HEADER\n");
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2015-03-15 17:51:47 +01:00
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uint8_t data[SPI_FLASH_SEC_SIZE] ICACHE_STORE_ATTR;
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2015-03-15 22:40:43 +01:00
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if (SPI_FLASH_RESULT_OK == spi_flash_read(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
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{
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((SPIFlashInfo *)(&data[0]))->size = size;
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if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector(0 * SPI_FLASH_SEC_SIZE))
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{
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NODE_DBG("\nERASE SUCCESS\n");
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}
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if (SPI_FLASH_RESULT_OK == spi_flash_write(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
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{
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NODE_DBG("\nWRITE SUCCESS, %u\n", size);
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}
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}
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NODE_DBG("\nEND SET FLASH HEADER\n");
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2014-12-31 01:08:31 +01:00
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return true;
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}
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2015-03-15 17:48:28 +01:00
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bool flash_rom_set_size_byte(uint32_t size)
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2014-12-31 01:08:31 +01:00
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{
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// Dangerous, here are dinosaur infested!!!!!
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// Reboot required!!!
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// If you don't know what you're doing, your nodemcu may turn into stone ...
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bool result = true;
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uint32_t flash_size = 0;
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switch (size)
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{
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case 256 * 1024:
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// 2Mbit, 256kByte
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flash_size = SIZE_2MBIT;
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2015-03-15 17:48:28 +01:00
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flash_rom_set_size_type(flash_size);
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2014-12-31 01:08:31 +01:00
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break;
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case 512 * 1024:
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// 4Mbit, 512kByte
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flash_size = SIZE_4MBIT;
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2015-03-15 17:48:28 +01:00
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flash_rom_set_size_type(flash_size);
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2014-12-31 01:08:31 +01:00
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break;
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case 1 * 1024 * 1024:
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// 8Mbit, 1MByte
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flash_size = SIZE_8MBIT;
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2015-03-15 17:48:28 +01:00
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flash_rom_set_size_type(flash_size);
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2014-12-31 01:08:31 +01:00
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break;
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case 2 * 1024 * 1024:
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// 16Mbit, 2MByte
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flash_size = SIZE_16MBIT;
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2015-03-15 17:48:28 +01:00
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flash_rom_set_size_type(flash_size);
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2014-12-31 01:08:31 +01:00
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break;
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case 4 * 1024 * 1024:
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// 32Mbit, 4MByte
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flash_size = SIZE_32MBIT;
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2015-03-15 17:48:28 +01:00
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flash_rom_set_size_type(flash_size);
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2014-12-31 01:08:31 +01:00
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break;
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2015-12-30 02:49:01 +01:00
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/*
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2015-03-15 22:40:43 +01:00
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case 8 * 1024 * 1024:
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// 64Mbit, 8MByte
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2015-12-30 02:49:01 +01:00
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flash_size = SIZE_16MBIT_8M_8M;
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2015-03-15 22:40:43 +01:00
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flash_rom_set_size_type(flash_size);
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break;
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case 16 * 1024 * 1024:
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// 128Mbit, 16MByte
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2015-12-30 02:49:01 +01:00
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flash_size = SIZE_32MBIT_8M_8M;
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2015-03-15 22:40:43 +01:00
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flash_rom_set_size_type(flash_size);
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break;
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2015-12-30 02:49:01 +01:00
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*/
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2014-12-31 01:08:31 +01:00
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default:
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// Unknown flash size.
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result = false;
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break;
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}
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return result;
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}
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2015-03-15 17:48:28 +01:00
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uint16_t flash_rom_get_sec_num(void)
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2014-12-30 19:47:44 +01:00
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{
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2015-02-14 19:13:58 +01:00
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//static uint16_t sec_num = 0;
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2015-03-15 17:48:28 +01:00
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// return flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE);
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// c_printf("\nflash_rom_get_size_byte()=%d\n", ( flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE) ));
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2015-02-14 19:13:58 +01:00
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// if( sec_num == 0 )
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//{
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// sec_num = 4 * 1024 * 1024 / (SPI_FLASH_SEC_SIZE);
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//}
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//return sec_num;
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2015-03-15 17:48:28 +01:00
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return ( flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE) );
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2014-12-30 19:51:36 +01:00
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}
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2014-12-31 01:08:31 +01:00
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2015-03-15 17:48:28 +01:00
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uint8_t flash_rom_get_mode(void)
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2014-12-31 01:08:31 +01:00
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{
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2015-03-15 17:48:28 +01:00
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SPIFlashInfo spi_flash_info = flash_rom_getinfo();
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2015-01-05 03:09:51 +01:00
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switch (spi_flash_info.mode)
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2014-12-31 01:08:31 +01:00
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{
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// Reserved for future use
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case MODE_QIO:
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break;
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case MODE_QOUT:
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break;
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case MODE_DIO:
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break;
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case MODE_DOUT:
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break;
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}
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2015-01-05 03:09:51 +01:00
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return spi_flash_info.mode;
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2014-12-31 01:08:31 +01:00
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}
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2015-03-15 17:48:28 +01:00
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uint32_t flash_rom_get_speed(void)
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2014-12-31 01:08:31 +01:00
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{
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uint32_t speed = 0;
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2015-03-15 17:48:28 +01:00
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SPIFlashInfo spi_flash_info = flash_rom_getinfo();
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2015-01-05 03:09:51 +01:00
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switch (spi_flash_info.speed)
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2014-12-31 01:08:31 +01:00
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{
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case SPEED_40MHZ:
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// 40MHz
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speed = 40000000;
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break;
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case SPEED_26MHZ:
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//26.7MHz
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speed = 26700000;
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break;
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case SPEED_20MHZ:
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// 20MHz
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speed = 20000000;
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break;
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case SPEED_80MHZ:
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//80MHz
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speed = 80000000;
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break;
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}
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return speed;
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}
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2015-03-15 22:40:43 +01:00
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bool flash_rom_set_speed(uint32_t speed)
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{
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// Dangerous, here are dinosaur infested!!!!!
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// Reboot required!!!
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// If you don't know what you're doing, your nodemcu may turn into stone ...
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NODE_DBG("\nBEGIN SET FLASH HEADER\n");
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|
|
|
uint8_t data[SPI_FLASH_SEC_SIZE] ICACHE_STORE_ATTR;
|
|
|
|
uint8_t speed_type = SPEED_40MHZ;
|
|
|
|
if (speed < 26700000)
|
|
|
|
{
|
|
|
|
speed_type = SPEED_20MHZ;
|
|
|
|
}
|
|
|
|
else if (speed < 40000000)
|
|
|
|
{
|
|
|
|
speed_type = SPEED_26MHZ;
|
|
|
|
}
|
|
|
|
else if (speed < 80000000)
|
|
|
|
{
|
|
|
|
speed_type = SPEED_40MHZ;
|
|
|
|
}
|
|
|
|
else if (speed >= 80000000)
|
|
|
|
{
|
|
|
|
speed_type = SPEED_80MHZ;
|
|
|
|
}
|
|
|
|
if (SPI_FLASH_RESULT_OK == spi_flash_read(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
|
|
|
|
{
|
|
|
|
((SPIFlashInfo *)(&data[0]))->speed = speed_type;
|
|
|
|
if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector(0 * SPI_FLASH_SEC_SIZE))
|
|
|
|
{
|
|
|
|
NODE_DBG("\nERASE SUCCESS\n");
|
|
|
|
}
|
|
|
|
if (SPI_FLASH_RESULT_OK == spi_flash_write(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
|
|
|
|
{
|
|
|
|
NODE_DBG("\nWRITE SUCCESS, %u\n", speed_type);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
NODE_DBG("\nEND SET FLASH HEADER\n");
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2015-01-05 03:09:51 +01:00
|
|
|
bool flash_init_data_default(void)
|
2014-12-31 01:08:31 +01:00
|
|
|
{
|
2015-11-12 02:57:07 +01:00
|
|
|
/* Can't copy directly from flash (which is where the default data lives)
|
|
|
|
* due to it being unmapped during the write, so bounce via ram buffer. */
|
|
|
|
uint8_t init_data[128];
|
|
|
|
os_memcpy (init_data, flash_init_data, 128);
|
|
|
|
|
2014-12-31 01:08:31 +01:00
|
|
|
// FLASH SEC - 4
|
|
|
|
// Dangerous, here are dinosaur infested!!!!!
|
|
|
|
// Reboot required!!!
|
|
|
|
// It will init system data to default!
|
2015-01-06 12:32:17 +01:00
|
|
|
bool result = false;
|
2015-03-15 17:51:47 +01:00
|
|
|
#if defined(FLASH_SAFE_API)
|
|
|
|
if (SPI_FLASH_RESULT_OK == flash_safe_erase_sector((flash_safe_get_sec_num() - 4)))
|
|
|
|
{
|
2015-11-12 02:57:07 +01:00
|
|
|
if (SPI_FLASH_RESULT_OK == flash_safe_write((flash_safe_get_sec_num() - 4) * SPI_FLASH_SEC_SIZE, (uint32 *)init_data, 128))
|
2015-03-15 17:51:47 +01:00
|
|
|
{
|
|
|
|
result = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector((flash_rom_get_sec_num() - 4)))
|
2015-01-06 12:32:17 +01:00
|
|
|
{
|
2015-11-12 02:57:07 +01:00
|
|
|
if (SPI_FLASH_RESULT_OK == spi_flash_write((flash_rom_get_sec_num() - 4) * SPI_FLASH_SEC_SIZE, (uint32 *)init_data, 128))
|
2015-01-06 12:32:17 +01:00
|
|
|
{
|
|
|
|
result = true;
|
|
|
|
}
|
|
|
|
}
|
2015-03-15 17:51:47 +01:00
|
|
|
#endif // defined(FLASH_SAFE_API)
|
2015-01-06 12:32:17 +01:00
|
|
|
return result;
|
2014-12-31 01:08:31 +01:00
|
|
|
}
|
|
|
|
|
2015-01-05 03:09:51 +01:00
|
|
|
bool flash_init_data_blank(void)
|
2014-12-31 01:08:31 +01:00
|
|
|
{
|
|
|
|
// FLASH SEC - 2
|
|
|
|
// Dangerous, here are dinosaur infested!!!!!
|
|
|
|
// Reboot required!!!
|
|
|
|
// It will init system config to blank!
|
2015-01-06 12:32:17 +01:00
|
|
|
bool result = false;
|
2015-03-15 17:51:47 +01:00
|
|
|
#if defined(FLASH_SAFE_API)
|
2015-03-22 14:09:37 +01:00
|
|
|
if ((SPI_FLASH_RESULT_OK == flash_safe_erase_sector((flash_safe_get_sec_num() - 2))) &&
|
|
|
|
(SPI_FLASH_RESULT_OK == flash_safe_erase_sector((flash_safe_get_sec_num() - 1))))
|
2015-03-15 17:51:47 +01:00
|
|
|
#else
|
|
|
|
if ((SPI_FLASH_RESULT_OK == spi_flash_erase_sector((flash_rom_get_sec_num() - 2))) &&
|
|
|
|
(SPI_FLASH_RESULT_OK == spi_flash_erase_sector((flash_rom_get_sec_num() - 1))))
|
|
|
|
#endif // defined(FLASH_SAFE_API)
|
2015-01-06 12:32:17 +01:00
|
|
|
{
|
|
|
|
result = true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return result ;
|
2014-12-31 01:08:31 +01:00
|
|
|
}
|
|
|
|
|
2015-02-14 17:02:53 +01:00
|
|
|
uint8_t byte_of_aligned_array(const uint8_t *aligned_array, uint32_t index)
|
2015-01-06 18:15:38 +01:00
|
|
|
{
|
2015-02-14 17:02:53 +01:00
|
|
|
if ( (((uint32_t)aligned_array) % 4) != 0 )
|
|
|
|
{
|
2015-01-06 18:15:38 +01:00
|
|
|
NODE_DBG("aligned_array is not 4-byte aligned.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
2015-05-05 17:59:30 +02:00
|
|
|
volatile uint32_t v = ((uint32_t *)aligned_array)[ index / 4 ];
|
2015-01-06 18:15:38 +01:00
|
|
|
uint8_t *p = (uint8_t *) (&v);
|
2015-02-14 17:02:53 +01:00
|
|
|
return p[ (index % 4) ];
|
2015-01-06 18:15:38 +01:00
|
|
|
}
|
2015-03-15 22:40:43 +01:00
|
|
|
|
2015-05-05 17:59:30 +02:00
|
|
|
uint16_t word_of_aligned_array(const uint16_t *aligned_array, uint32_t index)
|
|
|
|
{
|
|
|
|
if ( (((uint32_t)aligned_array) % 4) != 0 )
|
|
|
|
{
|
|
|
|
NODE_DBG("aligned_array is not 4-byte aligned.\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
volatile uint32_t v = ((uint32_t *)aligned_array)[ index / 2 ];
|
|
|
|
uint16_t *p = (uint16_t *) (&v);
|
|
|
|
return (index % 2 == 0) ? p[ 0 ] : p[ 1 ];
|
|
|
|
// return p[ (index % 2) ]; // -- why error???
|
|
|
|
// (byte_of_aligned_array((uint8_t *)aligned_array, index * 2 + 1) << 8) | byte_of_aligned_array((uint8_t *)aligned_array, index * 2);
|
|
|
|
}
|
|
|
|
|
2015-03-15 22:40:43 +01:00
|
|
|
// uint8_t flash_rom_get_checksum(void)
|
|
|
|
// {
|
|
|
|
// // SPIFlashInfo spi_flash_info ICACHE_STORE_ATTR = flash_rom_getinfo();
|
|
|
|
// // uint32_t address = sizeof(spi_flash_info) + spi_flash_info.segment_size;
|
|
|
|
// // uint32_t address_aligned_4bytes = (address + 3) & 0xFFFFFFFC;
|
|
|
|
// // uint8_t buffer[64] = {0};
|
|
|
|
// // spi_flash_read(address, (uint32 *) buffer, 64);
|
|
|
|
// // uint8_t i = 0;
|
|
|
|
// // c_printf("\nBEGIN DUMP\n");
|
|
|
|
// // for (i = 0; i < 64; i++)
|
|
|
|
// // {
|
|
|
|
// // c_printf("%02x," , buffer[i]);
|
|
|
|
// // }
|
|
|
|
// // i = (address + 0x10) & 0x10 - 1;
|
|
|
|
// // c_printf("\nSIZE:%d CHECK SUM:%02x\n", spi_flash_info.segment_size, buffer[i]);
|
|
|
|
// // c_printf("\nEND DUMP\n");
|
|
|
|
// // return buffer[0];
|
|
|
|
// return 0;
|
|
|
|
// }
|
|
|
|
|
|
|
|
// uint8_t flash_rom_calc_checksum(void)
|
|
|
|
// {
|
|
|
|
// return 0;
|
2015-11-12 02:57:07 +01:00
|
|
|
// }
|