107 lines
4.3 KiB
Markdown
107 lines
4.3 KiB
Markdown
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NodeMCU Testing Environment
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===========================
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Herein we define the environment our testing framework expects to see
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when it runs. It is composed of two ESP8266 devices, each capable of
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holding an entire NodeMCU firmware, LFS image, and SPIFFS file system,
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as well as additional peripheral hardware. It is designed to fit
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comfortably on a breadboard and so should be easily replicated and
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integrated into any firmware validation testing.
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The test harness runs from a dedicated host computer, which is expected
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to have reset- and programming-capable UART links to both ESP8266
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devices, as found on almost all ESP8266 boards with USB to UART
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adapters, but the host does not necessarily need to use USB to connect,
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so long as TXD, RXD, DTR, and RTS are wired across.
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Peripherals
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-----------
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### I2C Bus
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There is an I2C bus hanging off DUT 0. Attached hardware is used both as
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tests of modules directly and also to facilitate testing other modules
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(e.g., gpio).
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#### MCP23017: I/O Expander
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At address 0x20. An 16-bit tristate GPIO expander, this chip is used to
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test I2C, GPIO, and ADC functionality. This chip's interconnections are
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as follows:
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MPC23017 | Purpose
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---------|--------------------------------------------------------------
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/RESET |DUT0 reset. This resets the chip whenever the host computer resets DUT 0 over its serial link (using DTR/RTS).
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B 0 |4K7 resistor to DUT 0 ADC.
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B 1 |2K2 resistor to DUT 0 ADC.
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B 5 |DUT1 GPIO16/WAKE via 4K7 resitor
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B 6 |DUT0 GPIO13 via 4K7 resistor and DUT1 GPIO15 via 4K7 resistor
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B 7 |DUT0 GPIO15 via 4K7 resistor and DUT1 GPIO13 via 4K7 resistor
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Notes:
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- DUT 0's ADC pin is connected via a 2K2 reistor to this chip's port
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B, pin 1 and via a 4K7 resistor to port B, pin 0. This gives us the
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ability to produce approximately 0 (both pins low), 1.1 (pin 0 high,
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pin 1 low), 2.2 (pin 1 high, pin 0 low), and 3.3V (both pins high)
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on the ADC pin.
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- Port B pins 6 and 7 sit on the UART cross-wiring between DUT 0 and
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DUT 1. The 23017 will be tristated for inter-DUT UART tests, but
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these
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- Port B pins 2, 3, and 4, as well as all of port A, remain available
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for expansion.
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- The interrupt pins are not yet routed, but could be. We reserve DUT
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0 GPIO 2 for this purpose with the understanding that the 23017's
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interrupt functionality will be disabled (INTA, INTB set to
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open-drain, GPINTEN set to 0) when not explicitly under test.
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ESP8266 Device 0 Connections
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----------------------------
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ESP | Usage
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----------|----------------------------------------------------------
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GPIO 0 |Used to enter programming mode; otherwise unused in test environment.
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GPIO 1 |Primary UART transmit; reserved for host communication
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GPIO 2 |[reserved for 1-Wire] [+ reserved for 23017 INT[AB] connections]
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GPIO 3 |Primary UART recieve; reserved for host communication
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GPIO 4 |I2C SDA
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GPIO 5 |I2C SCL
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GPIO 6 |[Reserved for on-chip flash]
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GPIO 7 |[Reserved for on-chip flash]
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GPIO 8 |[Reserved for on-chip flash]
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GPIO 9 |[Reserved for on-chip flash]
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GPIO 10 |[Reserved for on-chip flash]
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GPIO 11 |[Reserved for on-chip flash]
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GPIO 12 |
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GPIO 13 |Secondary UART RX; DUT 1 GPIO 15, I/O expander B 6
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GPIO 14 |
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GPIO 15 |Secondary UART TX; DUT 1 GPIO 13, I/O expander B 7
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GPIO 16 |
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ADC 0 |Resistor divider with I/O expander
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ESP8266 Device 1 Connections
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----------------------------
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ESP | Usage
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----------|----------------------------------------------------------
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GPIO 0 |Used to enter programming mode; otherwise unused in test environment.
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GPIO 1 |Primary UART transmit; reserved for host communication
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GPIO 2 |[Reserved for WS2812]
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GPIO 3 |Primary UART recieve; reserved for host communication
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GPIO 4 |
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GPIO 5 |
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GPIO 6 |[Reserved for on-chip flash]
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GPIO 7 |[Reserved for on-chip flash]
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GPIO 8 |[Reserved for on-chip flash]
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GPIO 9 |[Reserved for on-chip flash]
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GPIO 10 |[Reserved for on-chip flash]
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GPIO 11 |[Reserved for on-chip flash]
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GPIO 12 |HSPI MISO
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GPIO 13 |Secondary UART RX; DUT 0 GPIO 15, I/O exp B 7 via 4K7 Also used as HSPI MOSI for SPI tests
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GPIO 14 |HSPI CLK
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GPIO 15 |Secondary UART TX; DUT 0 GPIO 13, I/O exp B 6 via 4K7 Also used as HSPI /CS for SPI tests
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GPIO 16 |I/O expander B 5 via 4K7 resistor, for deep-sleep tests
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ADC 0 |
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