2014-12-30 19:47:44 +01:00
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/******************************************************************************
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* Flash api for NodeMCU
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2014-12-31 01:08:31 +01:00
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* NodeMCU Team
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* 2014-12-31
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2014-12-30 19:47:44 +01:00
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*******************************************************************************/
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#include "user_config.h"
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#include "flash_api.h"
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#include "spi_flash.h"
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2015-01-05 16:57:07 +01:00
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#include "c_stdio.h"
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2014-12-30 19:47:44 +01:00
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2015-03-15 17:48:28 +01:00
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uint32_t flash_detect_size_byte(void)
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{
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2017-05-16 16:50:36 +02:00
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// enable operations on whole physical flash, SDK might have restricted
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// the flash size already
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extern SpiFlashChip * flashchip;
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uint32 orig_chip_size = flashchip->chip_size;
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flashchip->chip_size = FLASH_SIZE_16MBYTE;
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2015-03-15 17:51:47 +01:00
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#define FLASH_BUFFER_SIZE_DETECT 32
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2015-03-15 17:48:28 +01:00
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uint32_t dummy_size = FLASH_SIZE_256KBYTE;
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2015-03-15 17:51:47 +01:00
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uint8_t data_orig[FLASH_BUFFER_SIZE_DETECT] ICACHE_STORE_ATTR = {0};
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uint8_t data_new[FLASH_BUFFER_SIZE_DETECT] ICACHE_STORE_ATTR = {0};
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2017-05-16 16:50:36 +02:00
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if (SPI_FLASH_RESULT_OK == flash_read(0, (uint32 *)data_orig, FLASH_BUFFER_SIZE_DETECT))
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2015-03-15 17:48:28 +01:00
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{
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dummy_size = FLASH_SIZE_256KBYTE;
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while ((dummy_size < FLASH_SIZE_16MBYTE) &&
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2017-05-16 16:50:36 +02:00
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(SPI_FLASH_RESULT_OK == flash_read(dummy_size, (uint32 *)data_new, FLASH_BUFFER_SIZE_DETECT)) &&
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2015-03-15 17:51:47 +01:00
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(0 != os_memcmp(data_orig, data_new, FLASH_BUFFER_SIZE_DETECT))
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)
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2015-03-15 17:48:28 +01:00
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{
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dummy_size *= 2;
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}
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};
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2017-05-16 16:50:36 +02:00
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// revert temporary setting
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flashchip->chip_size = orig_chip_size;
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2015-03-15 17:48:28 +01:00
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2017-05-16 16:50:36 +02:00
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return dummy_size;
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#undef FLASH_BUFFER_SIZE_DETECT
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2015-03-15 17:48:28 +01:00
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}
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2019-04-05 17:01:45 +02:00
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static SPIFlashInfo spi_flash_info = {0};
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SPIFlashInfo *flash_rom_getinfo(void)
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2015-01-05 03:09:51 +01:00
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{
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2019-04-05 17:01:45 +02:00
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if (spi_flash_info.entry_point == 0) {
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spi_flash_read(0, (uint32 *)(& spi_flash_info), sizeof(spi_flash_info));
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}
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return &spi_flash_info;
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2014-12-30 19:47:44 +01:00
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}
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2015-03-15 17:48:28 +01:00
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uint8_t flash_rom_get_size_type(void)
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2014-12-31 01:08:31 +01:00
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{
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2019-04-05 17:01:45 +02:00
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return flash_rom_getinfo()->size;
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2014-12-31 01:08:31 +01:00
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}
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2015-03-15 17:48:28 +01:00
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uint32_t flash_rom_get_size_byte(void)
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2014-12-30 19:47:44 +01:00
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{
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2015-03-15 17:51:47 +01:00
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static uint32_t flash_size = 0;
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if (flash_size == 0)
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2014-12-30 19:47:44 +01:00
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{
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2019-04-05 17:01:45 +02:00
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switch (flash_rom_getinfo()->size)
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2015-03-15 17:51:47 +01:00
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{
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case SIZE_2MBIT:
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// 2Mbit, 256kByte
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flash_size = 256 * 1024;
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break;
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case SIZE_4MBIT:
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// 4Mbit, 512kByte
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flash_size = 512 * 1024;
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break;
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case SIZE_8MBIT:
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// 8Mbit, 1MByte
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flash_size = 1 * 1024 * 1024;
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break;
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case SIZE_16MBIT:
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// 16Mbit, 2MByte
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flash_size = 2 * 1024 * 1024;
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break;
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case SIZE_32MBIT:
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// 32Mbit, 4MByte
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flash_size = 4 * 1024 * 1024;
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break;
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2015-12-30 02:49:01 +01:00
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case SIZE_16MBIT_8M_8M:
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// 16Mbit, 2MByte
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flash_size = 2 * 1024 * 1024;
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2015-03-15 17:51:47 +01:00
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break;
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2015-12-30 02:49:01 +01:00
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case SIZE_32MBIT_8M_8M:
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// 32Mbit, 4MByte
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flash_size = 4 * 1024 * 1024;
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2015-03-15 17:51:47 +01:00
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break;
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2016-06-26 14:16:39 +02:00
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case SIZE_32MBIT_16M_16M:
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// 32Mbit, 4MByte
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flash_size = 4 * 1024 * 1024;
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break;
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case SIZE_64MBIT:
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// 64Mbit, 8MByte
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flash_size = 8 * 1024 * 1024;
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break;
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case SIZE_128MBIT:
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// 128Mbit, 16MByte
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flash_size = 16 * 1024 * 1024;
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break;
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2015-03-15 17:51:47 +01:00
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default:
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// Unknown flash size, fall back mode.
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flash_size = 512 * 1024;
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break;
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}
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2014-12-30 19:47:44 +01:00
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}
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return flash_size;
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}
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2015-03-15 17:48:28 +01:00
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uint16_t flash_rom_get_sec_num(void)
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2014-12-30 19:47:44 +01:00
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{
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2015-03-15 17:48:28 +01:00
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return ( flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE) );
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2014-12-30 19:51:36 +01:00
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}
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2014-12-31 01:08:31 +01:00
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2015-03-15 17:48:28 +01:00
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uint8_t flash_rom_get_mode(void)
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2014-12-31 01:08:31 +01:00
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{
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2019-04-05 17:01:45 +02:00
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uint8_t mode = flash_rom_getinfo()->mode;
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switch (mode)
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2014-12-31 01:08:31 +01:00
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{
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// Reserved for future use
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case MODE_QIO:
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break;
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case MODE_QOUT:
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break;
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case MODE_DIO:
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break;
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case MODE_DOUT:
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break;
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}
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2019-04-05 17:01:45 +02:00
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return mode;
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2014-12-31 01:08:31 +01:00
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}
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2015-03-15 17:48:28 +01:00
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uint32_t flash_rom_get_speed(void)
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2014-12-31 01:08:31 +01:00
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{
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uint32_t speed = 0;
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2019-04-05 17:01:45 +02:00
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uint8_t spi_speed = flash_rom_getinfo()->speed;
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switch (spi_speed)
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2014-12-31 01:08:31 +01:00
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{
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case SPEED_40MHZ:
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// 40MHz
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speed = 40000000;
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break;
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case SPEED_26MHZ:
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//26.7MHz
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speed = 26700000;
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break;
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case SPEED_20MHZ:
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// 20MHz
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speed = 20000000;
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break;
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case SPEED_80MHZ:
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//80MHz
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speed = 80000000;
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break;
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}
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return speed;
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}
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2015-02-14 17:02:53 +01:00
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uint8_t byte_of_aligned_array(const uint8_t *aligned_array, uint32_t index)
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2015-01-06 18:15:38 +01:00
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{
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2015-02-14 17:02:53 +01:00
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if ( (((uint32_t)aligned_array) % 4) != 0 )
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{
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2015-01-06 18:15:38 +01:00
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NODE_DBG("aligned_array is not 4-byte aligned.\n");
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return 0;
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}
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2015-05-05 17:59:30 +02:00
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volatile uint32_t v = ((uint32_t *)aligned_array)[ index / 4 ];
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2015-01-06 18:15:38 +01:00
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uint8_t *p = (uint8_t *) (&v);
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2015-02-14 17:02:53 +01:00
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return p[ (index % 4) ];
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2015-01-06 18:15:38 +01:00
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}
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2015-03-15 22:40:43 +01:00
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2015-05-05 17:59:30 +02:00
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uint16_t word_of_aligned_array(const uint16_t *aligned_array, uint32_t index)
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{
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if ( (((uint32_t)aligned_array) % 4) != 0 )
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{
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NODE_DBG("aligned_array is not 4-byte aligned.\n");
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return 0;
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}
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volatile uint32_t v = ((uint32_t *)aligned_array)[ index / 2 ];
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uint16_t *p = (uint16_t *) (&v);
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return (index % 2 == 0) ? p[ 0 ] : p[ 1 ];
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}
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