2014-12-22 12:35:05 +01:00
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/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi)
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*
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* FileName: uart.c
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*
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* Description: Two UART mode configration and interrupt handler.
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* Check your hardware connection while use this mode.
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*
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* Modification history:
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* 2014/3/12, v1.0 create this file.
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*******************************************************************************/
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#include "ets_sys.h"
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#include "osapi.h"
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#include "driver/uart.h"
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2019-07-18 18:02:02 +02:00
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#include "platform.h"
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2014-12-22 12:35:05 +01:00
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#include "user_config.h"
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2015-10-08 04:33:15 +02:00
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#include "user_interface.h"
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2016-04-17 23:44:18 +02:00
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#include "osapi.h"
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2014-12-22 12:35:05 +01:00
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#define UART0 0
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#define UART1 1
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2015-10-01 07:07:16 +02:00
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#ifndef FUNC_U0RXD
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#define FUNC_U0RXD 0
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#endif
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2015-11-28 23:51:01 +01:00
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#ifndef FUNC_U0CTS
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#define FUNC_U0CTS 4
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#endif
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2015-10-01 07:07:16 +02:00
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2015-10-08 04:33:15 +02:00
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// For event signalling
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2019-07-18 18:02:02 +02:00
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static platform_task_handle_t sig = 0;
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2016-10-18 03:56:38 +02:00
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static uint8 *sig_flag;
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static uint8 isr_flag = 0;
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2015-10-08 04:33:15 +02:00
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2014-12-22 12:35:05 +01:00
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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2019-07-18 18:02:02 +02:00
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#ifdef BIT_RATE_AUTOBAUD
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2016-04-17 23:44:18 +02:00
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static os_timer_t autobaud_timer;
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2019-07-18 18:02:02 +02:00
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#endif
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2016-09-21 03:38:12 +02:00
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static void (*alt_uart0_tx)(char txchar);
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2015-01-05 03:09:51 +01:00
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LOCAL void ICACHE_RAM_ATTR
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uart0_rx_intr_handler(void *para);
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2014-12-22 12:35:05 +01:00
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2017-03-01 12:41:56 +01:00
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/******************************************************************************
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* FunctionName : uart_wait_tx_empty
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* Description : Internal used function
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* Wait for TX FIFO to become empty.
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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LOCAL void ICACHE_FLASH_ATTR
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uart_wait_tx_empty(uint8 uart_no)
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{
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while ((READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S)) > 0)
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;
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}
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2014-12-22 12:35:05 +01:00
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/******************************************************************************
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* FunctionName : uart_config
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* Description : Internal used function
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
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* UART1 just used for debug output
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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LOCAL void ICACHE_FLASH_ATTR
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uart_config(uint8 uart_no)
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{
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2017-03-01 12:41:56 +01:00
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uart_wait_tx_empty(uart_no);
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2014-12-22 12:35:05 +01:00
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if (uart_no == UART1) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
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} else {
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/* rcv_buff size if 0x100 */
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
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}
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uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
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2015-12-14 20:17:04 +01:00
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WRITE_PERI_REG(UART_CONF0(uart_no), ((UartDev.exist_parity & UART_PARITY_EN_M) << UART_PARITY_EN_S) //SET BIT AND PARITY MODE
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| ((UartDev.parity & UART_PARITY_M) <<UART_PARITY_S )
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| ((UartDev.stop_bits & UART_STOP_BIT_NUM) << UART_STOP_BIT_NUM_S)
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| ((UartDev.data_bits & UART_BIT_NUM) << UART_BIT_NUM_S));
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2014-12-22 12:35:05 +01:00
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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//set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(uart_no), (UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S);
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
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//enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
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}
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2015-11-28 23:51:01 +01:00
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/******************************************************************************
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* FunctionName : uart0_alt
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* Description : Internal used function
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* UART0 pins changed to 13,15 if 'on' is set, else set to normal pins
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* Parameters : on - 1 = use alternate pins, 0 = use normal pins
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_alt(uint8 on)
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{
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2017-03-01 12:41:56 +01:00
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uart_wait_tx_empty(UART0);
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2015-11-28 23:51:01 +01:00
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if (on)
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{
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDO_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
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PIN_PULLUP_EN(PERIPHS_IO_MUX_MTCK_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS);
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// now make RTS/CTS behave as TX/RX
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IOSWAP |= (1 << IOSWAPU0);
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}
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else
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{
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
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// now make RX/TX behave as TX/RX
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IOSWAP &= ~(1 << IOSWAPU0);
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}
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}
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2014-12-22 12:35:05 +01:00
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/******************************************************************************
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* FunctionName : uart_tx_one_char
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* Description : Internal used function
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* Use uart interface to transfer one char
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* Parameters : uint8 TxChar - character to tx
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* Returns : OK
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*******************************************************************************/
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STATUS ICACHE_FLASH_ATTR
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uart_tx_one_char(uint8 uart, uint8 TxChar)
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{
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2016-09-21 03:38:12 +02:00
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if (uart == 0 && alt_uart0_tx) {
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(*alt_uart0_tx)(TxChar);
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return OK;
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}
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2014-12-22 12:35:05 +01:00
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while (true)
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{
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
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break;
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}
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}
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WRITE_PERI_REG(UART_FIFO(uart) , TxChar);
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return OK;
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}
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2019-07-20 01:45:08 +02:00
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2014-12-22 12:35:05 +01:00
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/******************************************************************************
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* FunctionName : uart0_tx_buffer
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR
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uart0_tx_buffer(uint8 *buf, uint16 len)
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{
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uint16 i;
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for (i = 0; i < len; i++)
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{
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uart_tx_one_char(UART0, buf[i]);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_sendStr
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* Description : use uart0 to transfer buffer
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* Parameters : uint8 *buf - point to send buffer
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* uint16 len - buffer len
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR uart0_sendStr(const char *str)
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{
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while(*str)
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{
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// uart_tx_one_char(UART0, *str++);
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uart0_putc(*str++);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_putc
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* Description : use uart0 to transfer char
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* Parameters : uint8 c - send char
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* Returns :
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*******************************************************************************/
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void ICACHE_FLASH_ATTR uart0_putc(const char c)
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{
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if (c == '\n')
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{
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uart_tx_one_char(UART0, '\r');
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uart_tx_one_char(UART0, '\n');
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}
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else if (c == '\r')
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{
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}
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else
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{
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uart_tx_one_char(UART0, c);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler
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* Description : Internal used function
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* UART0 interrupt handler, add self handle code inside
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
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* Returns : NONE
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*******************************************************************************/
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LOCAL void
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uart0_rx_intr_handler(void *para)
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{
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/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
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* uart1 and uart0 respectively
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*/
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RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
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uint8 RcvChar;
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2015-10-08 04:33:15 +02:00
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bool got_input = false;
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2014-12-22 12:35:05 +01:00
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if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) {
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return;
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}
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WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
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while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF;
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/* you can add your handle code below.*/
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*(pRxBuff->pWritePos) = RcvChar;
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// insert here for get one command line from uart
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if (RcvChar == '\r' || RcvChar == '\n' ) {
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pRxBuff->BuffState = WRITE_OVER;
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}
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Add New Tasking I/F and rework GPIO, UART, etc to support it
As with the last commit this rolls up the follwowing, but include the various
review comments on the PR.
- **Documentation changes**. I've added the taks FAQ as a stub new Extension
developer FAQ, and split the old FAQ into a Lua Developer FAQ and a Hardware
FAQ.
- **Tasking I/F**. New `app/task/Makefile`, `app/task/task.c`,
`app/include/task/task.h` and `app/Makefile` as per previous commit. Cascade
changes to `app/driver/uart.c`, `app/include/driver/uart.h`,
`app/user/user_main.c` and `app/modules/node.c`
- **GPIO Rework** to `app/modules/gpio.c` and `pin_map.[hc]`, `platform.[hc]`
in `app/platform`
- **Other Optimisations** Move the `platform_*_exists()` from
`app/platform/common.c` to static inline declarations in `platform.h` as
this generates faster, smaller code. Move lgc.a routines out of iram0.
2016-02-17 18:13:17 +01:00
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2014-12-22 12:35:05 +01:00
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if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) {
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// overflow ...we may need more error handle here.
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pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ;
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} else {
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pRxBuff->pWritePos++;
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}
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if (pRxBuff->pWritePos == pRxBuff->pReadPos){ // overflow one byte, need push pReadPos one byte ahead
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if (pRxBuff->pReadPos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) {
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Add New Tasking I/F and rework GPIO, UART, etc to support it
As with the last commit this rolls up the follwowing, but include the various
review comments on the PR.
- **Documentation changes**. I've added the taks FAQ as a stub new Extension
developer FAQ, and split the old FAQ into a Lua Developer FAQ and a Hardware
FAQ.
- **Tasking I/F**. New `app/task/Makefile`, `app/task/task.c`,
`app/include/task/task.h` and `app/Makefile` as per previous commit. Cascade
changes to `app/driver/uart.c`, `app/include/driver/uart.h`,
`app/user/user_main.c` and `app/modules/node.c`
- **GPIO Rework** to `app/modules/gpio.c` and `pin_map.[hc]`, `platform.[hc]`
in `app/platform`
- **Other Optimisations** Move the `platform_*_exists()` from
`app/platform/common.c` to static inline declarations in `platform.h` as
this generates faster, smaller code. Move lgc.a routines out of iram0.
2016-02-17 18:13:17 +01:00
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pRxBuff->pReadPos = pRxBuff->pRcvMsgBuff ;
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2014-12-22 12:35:05 +01:00
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} else {
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pRxBuff->pReadPos++;
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}
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}
|
2015-10-08 04:33:15 +02:00
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got_input = true;
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2014-12-22 12:35:05 +01:00
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}
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2015-10-08 04:33:15 +02:00
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2016-10-18 03:56:38 +02:00
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if (got_input && sig) {
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2019-07-18 18:02:02 +02:00
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// Only post a new handler request once the handler has fired clearing the last post
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2016-10-18 03:56:38 +02:00
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if (isr_flag == *sig_flag) {
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isr_flag ^= 0x01;
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2019-07-18 18:02:02 +02:00
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platform_post_high(sig, isr_flag);
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2016-10-18 03:56:38 +02:00
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}
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}
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2014-12-22 12:35:05 +01:00
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}
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2019-07-18 18:02:02 +02:00
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#ifdef BIT_RATE_AUTOBAUD
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2019-02-17 19:26:29 +01:00
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static void
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2016-04-17 23:44:18 +02:00
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uart_autobaud_timeout(void *timer_arg)
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{
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uint32_t uart_no = (uint32_t) timer_arg;
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uint32_t divisor = uart_baudrate_detect(uart_no, 1);
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static int called_count = 0;
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// Shut off after two minutes to stop wasting CPU cycles if insufficient input received
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|
|
if (called_count++ > 10 * 60 * 2 || divisor) {
|
|
|
|
os_timer_disarm(&autobaud_timer);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (divisor) {
|
|
|
|
uart_div_modify(uart_no, divisor);
|
|
|
|
}
|
|
|
|
}
|
2018-04-13 21:41:14 +02:00
|
|
|
#include "pm/swtimer.h"
|
2019-02-17 19:26:29 +01:00
|
|
|
static void
|
2016-04-17 23:44:18 +02:00
|
|
|
uart_init_autobaud(uint32_t uart_no)
|
|
|
|
{
|
|
|
|
os_timer_setfn(&autobaud_timer, uart_autobaud_timeout, (void *) uart_no);
|
2018-04-13 21:41:14 +02:00
|
|
|
SWTIMER_REG_CB(uart_autobaud_timeout, SWTIMER_DROP);
|
|
|
|
//if autobaud hasn't done it's thing by the time light sleep triggered, it probably isn't going to happen.
|
2016-04-17 23:44:18 +02:00
|
|
|
os_timer_arm(&autobaud_timer, 100, TRUE);
|
|
|
|
}
|
|
|
|
|
2019-02-17 19:26:29 +01:00
|
|
|
static void
|
2016-04-17 23:44:18 +02:00
|
|
|
uart_stop_autobaud()
|
|
|
|
{
|
|
|
|
os_timer_disarm(&autobaud_timer);
|
|
|
|
}
|
2019-07-18 18:02:02 +02:00
|
|
|
#endif
|
2014-12-22 12:35:05 +01:00
|
|
|
/******************************************************************************
|
|
|
|
* FunctionName : uart_init
|
|
|
|
* Description : user interface for init uart
|
|
|
|
* Parameters : UartBautRate uart0_br - uart0 bautrate
|
|
|
|
* UartBautRate uart1_br - uart1 bautrate
|
|
|
|
* Returns : NONE
|
|
|
|
*******************************************************************************/
|
|
|
|
void ICACHE_FLASH_ATTR
|
2019-07-18 18:02:02 +02:00
|
|
|
uart_init(UartBautRate uart0_br, UartBautRate uart1_br)
|
2014-12-22 12:35:05 +01:00
|
|
|
{
|
|
|
|
// rom use 74880 baut_rate, here reinitialize
|
|
|
|
UartDev.baut_rate = uart0_br;
|
|
|
|
uart_config(UART0);
|
|
|
|
UartDev.baut_rate = uart1_br;
|
|
|
|
uart_config(UART1);
|
2016-04-17 23:44:18 +02:00
|
|
|
#ifdef BIT_RATE_AUTOBAUD
|
|
|
|
uart_init_autobaud(0);
|
|
|
|
#endif
|
2014-12-22 12:35:05 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
void ICACHE_FLASH_ATTR
|
|
|
|
uart_setup(uint8 uart_no)
|
|
|
|
{
|
2016-04-17 23:44:18 +02:00
|
|
|
#ifdef BIT_RATE_AUTOBAUD
|
|
|
|
uart_stop_autobaud();
|
|
|
|
#endif
|
2017-03-01 12:41:56 +01:00
|
|
|
// poll Tx FIFO empty outside before disabling interrupts
|
|
|
|
uart_wait_tx_empty(uart_no);
|
2014-12-22 12:35:05 +01:00
|
|
|
ETS_UART_INTR_DISABLE();
|
|
|
|
uart_config(uart_no);
|
|
|
|
ETS_UART_INTR_ENABLE();
|
|
|
|
}
|
2016-09-21 03:38:12 +02:00
|
|
|
|
2019-07-18 18:02:02 +02:00
|
|
|
/******************************************************************************
|
|
|
|
* FunctionName : uart_init_task
|
|
|
|
* Description : user interface for init uart task callback
|
|
|
|
* Parameters : os_signal_t sig_input - signal to post
|
|
|
|
* uint8 *flag_input - flag of consumer task
|
|
|
|
* Returns : NONE
|
|
|
|
*******************************************************************************/
|
|
|
|
|
|
|
|
void ICACHE_FLASH_ATTR uart_init_task(os_signal_t sig_input, uint8 *flag_input) {
|
|
|
|
sig = sig_input;
|
|
|
|
sig_flag = flag_input;
|
|
|
|
}
|
|
|
|
|
2016-09-21 03:38:12 +02:00
|
|
|
void ICACHE_FLASH_ATTR uart_set_alt_output_uart0(void (*fn)(char)) {
|
|
|
|
alt_uart0_tx = fn;
|
|
|
|
}
|
2016-12-11 20:35:04 +01:00
|
|
|
|
|
|
|
UartConfig ICACHE_FLASH_ATTR uart_get_config(uint8 uart_no) {
|
|
|
|
UartConfig config;
|
|
|
|
|
|
|
|
config.baut_rate = UART_CLK_FREQ / READ_PERI_REG(UART_CLKDIV(uart_no));
|
|
|
|
|
|
|
|
uint32_t conf = READ_PERI_REG(UART_CONF0(uart_no));
|
|
|
|
|
|
|
|
config.exist_parity = (conf >> UART_PARITY_EN_S) & UART_PARITY_EN_M;
|
|
|
|
config.parity = (conf >> UART_PARITY_S) & UART_PARITY_M;
|
|
|
|
config.stop_bits = (conf >> UART_STOP_BIT_NUM_S) & UART_STOP_BIT_NUM;
|
|
|
|
config.data_bits = (conf >> UART_BIT_NUM_S) & UART_BIT_NUM;
|
|
|
|
|
|
|
|
return config;
|
|
|
|
}
|