201 lines
7.7 KiB
C
201 lines
7.7 KiB
C
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/*
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u8g_dev_uc1608_240x128.c
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Universal 8bit Graphics Library
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Copyright (c) 2013, olikraus@gmail.com (original 240x64 library)
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Modified by thieringpeti@gmail.com for Raystar rx240128 family displays
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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Display: http://www.tme.eu/en/details/rx240128a-ghw/lcd-graphic-displays/raystar-optronics/
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Connection: HW / SW SPI.
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To get this display working, You need some extra capacitors:
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connect 4.7uF caps between:
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PIN1 & PIN2 VB1 +-
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PIN3 & PIN4 VB0 -+
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connect 0.1uF caps between:
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VLCD and VSS
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VBIAS and VSS
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You can find some schematics with a 10M resistor parallellized with the VLCD capacitor.
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Select 4-bit SPI mode.
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Connect D7 (PIN9) To VDD (+3.3V)
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Connect D1, D2, D4, D5, D6 to GND (PINS 10,11,12,14,15)
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Connect WR0, WR1, BM0, BM1 to GND (PINS 17,18,22,23)
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D0: (PIN16) AVR's SCK pin (HW SPI)
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D3: (PIN13) AVR's MOSI pin (HW SPI)
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CD: (PIN19) used as A0 in the library
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CS: (PIN21) Connect to the defined CS pin, and You can re-use the HW SPI in different routines.
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RST: (PIN20) optional reset, can be defined in the function, resets on initialization.
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Adjust contrast if necessary. Default: 0x072.
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*/
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#include "u8g.h"
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#define WIDTH 240
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#define HEIGHT 128
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#define PAGE_HEIGHT 8
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/* see also ERC24064-1 for init sequence example */
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static const uint8_t u8g_dev_uc1608_240x128_init_seq[] PROGMEM = {
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U8G_ESC_CS(1), /* disable chip (UC1608 has positive logic for CS) */
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_RST(1), /* do reset low pulse with (15*16)+2 milliseconds */
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U8G_ESC_CS(0), /* enable chip */
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0x0e2, /* soft reset */
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U8G_ESC_DLY(100), /* delay 100 ms */
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U8G_ESC_DLY(100), /* delay 100 ms */
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0x026, /* MUX rate and temperature compensation */
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0x0c8, /* Map control, Bit 3: MY=1, Bit 2: MX=0, Bit 0: MSF =0 */
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0x0eb, /* LCD bias Bits 0/1: 00=10.7 01=10.3, 10=12.0, 11=12.7*/
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/* default 0x0ea for 240x128 */
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0x081, /* set contrast (bits 0..5) and gain (bits 6/7) */
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0x072, /* default for 240x128 displays: 0x072*/
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0x02f, /* power on, Bit 2 PC2=1 (internal charge pump), Bits 0/1: cap of panel */
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U8G_ESC_DLY(50), /* delay 50 ms */
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0x040, /* set display start line to 0 */
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0x090, /* no fixed lines */
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0x089, /* RAM access control */
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0x0af, /* disable sleep mode */
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0x0a4, /* normal display */
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0x0a5, /* display all points, ST7565, UC1610 */
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// 0x0a7, /* inverse display */
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0x0a6, /* normal display */
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U8G_ESC_DLY(100), /* delay 100 ms */
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0x0a4, /* normal display */
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U8G_ESC_CS(1), /* disable chip */
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U8G_ESC_END /* end of sequence */
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};
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static const uint8_t u8g_dev_uc1608_240x128_data_start[] PROGMEM = {
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U8G_ESC_ADR(0), /* instruction mode */
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U8G_ESC_CS(0), /* enable chip */
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0x010, /* set upper 4 bit of the col adr to 0 (UC1608) */
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0x000, /* set lower 4 bit of the col adr to 0 */
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U8G_ESC_END /* end of sequence */
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};
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uint8_t u8g_dev_uc1608_240x128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1608_240x128_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1608_240x128_data_start);
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u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (UC1608) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
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return 0;
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u8g_SetChipSelect(u8g, dev, 1);
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}
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break;
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case U8G_DEV_MSG_CONTRAST:
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u8g_SetChipSelect(u8g, dev, 0);
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u8g_SetAddress(u8g, dev, 0); /* instruction mode */
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u8g_WriteByte(u8g, dev, 0x081);
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u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2); /* set contrast from, keep gain at 0 */
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u8g_SetChipSelect(u8g, dev, 1);
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return 1;
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}
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return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
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}
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uint8_t u8g_dev_uc1608_240x128_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
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{
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switch(msg)
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{
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case U8G_DEV_MSG_INIT:
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u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1608_240x128_init_seq);
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break;
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case U8G_DEV_MSG_STOP:
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break;
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case U8G_DEV_MSG_PAGE_NEXT:
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{
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u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1608_240x128_data_start);
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u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, pb->width, pb->buf);
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u8g_SetChipSelect(u8g, dev, 0);
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u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1608_240x128_data_start);
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u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */
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u8g_SetAddress(u8g, dev, 1); /* data mode */
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u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
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u8g_SetChipSelect(u8g, dev, 0);
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}
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break;
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case U8G_DEV_MSG_CONTRAST:
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u8g_SetChipSelect(u8g, dev, 1);
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u8g_SetAddress(u8g, dev, 0); /* instruction mode */
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u8g_WriteByte(u8g, dev, 0x081);
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u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
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u8g_SetChipSelect(u8g, dev, 0);
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return 1;
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}
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return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
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}
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U8G_PB_DEV(u8g_dev_uc1608_240x128_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1608_240x128_fn, U8G_COM_SW_SPI);
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U8G_PB_DEV(u8g_dev_uc1608_240x128_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1608_240x128_fn, U8G_COM_HW_SPI);
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uint8_t u8g_dev_uc1608_240x128_2x_buf[WIDTH*2] U8G_NOCOMMON ;
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u8g_pb_t u8g_dev_uc1608_240x128_2x_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_uc1608_240x128_2x_buf};
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u8g_dev_t u8g_dev_uc1608_240x128_2x_sw_spi = { u8g_dev_uc1608_240x128_2x_fn, &u8g_dev_uc1608_240x128_2x_pb, U8G_COM_SW_SPI };
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u8g_dev_t u8g_dev_uc1608_240x128_2x_hw_spi = { u8g_dev_uc1608_240x128_2x_fn, &u8g_dev_uc1608_240x128_2x_pb, U8G_COM_HW_SPI };
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