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update to u8glib 1.18.1

This commit is contained in:
devsaurus 2015-07-19 23:22:50 +02:00
parent 8bd3d7d2bf
commit 05e3267f24
13 changed files with 872 additions and 26 deletions
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58
app/u8glib/u8g.h
View File

@ -53,7 +53,7 @@ typedef signed short int16_t;
#elif defined(__XTENSA__)
# include <c_types.h>
#else
# include <stdint.h>
#include <stdint.h>
#endif
#if defined(__AVR__)
@ -63,7 +63,7 @@ typedef signed short int16_t;
/*
use the com interface directly on any systems which are not AVR or ARDUINO
*/
#if defined(__AVR__) || defined(ARDUINO)
#if defined(__AVR__) || defined(ARDUINO) || defined(__MSP430__)
#define U8G_WITH_PINLIST
#endif
#define U8G_WITH_PINLIST
@ -98,6 +98,19 @@ extern "C" {
# define U8G_FONT_SECTION(name)
#endif
#ifdef __MSP430__
/*
Specifying a section will cause the MSP-GCC to put even const data to RAM
at least for the fonts. But as the fonts are consts we don't need to specify
it manually - the MSP-GCC seems to be smart enough to put it into the
flash memory.
*/
# undef U8G_SECTION
# define U8G_SECTION(name)
#endif
/*===============================================================*/
#ifndef U8G_FONT_SECTION
# define U8G_FONT_SECTION(name)
#endif
@ -267,11 +280,13 @@ extern u8g_dev_t u8g_dev_st7565_dogm128_2x_parallel;
extern u8g_dev_t u8g_dev_uc1611_dogm240_i2c;
extern u8g_dev_t u8g_dev_uc1611_dogm240_hw_spi;
extern u8g_dev_t u8g_dev_uc1611_dogm240_sw_spi;
extern u8g_dev_t u8g_dev_uc1611_dogm240_8bit;
/* EA DOGXL 240 */
extern u8g_dev_t u8g_dev_uc1611_dogxl240_i2c;
extern u8g_dev_t u8g_dev_uc1611_dogxl240_hw_spi;
extern u8g_dev_t u8g_dev_uc1611_dogxl240_sw_spi;
extern u8g_dev_t u8g_dev_uc1611_dogxl240_8bit;
/* Display: Topway LM6059 128x64 (Adafruit) */
extern u8g_dev_t u8g_dev_st7565_lm6059_sw_spi;
@ -464,6 +479,15 @@ extern u8g_dev_t u8g_dev_ssd1306_128x32_2x_sw_spi;
extern u8g_dev_t u8g_dev_ssd1306_128x32_2x_hw_spi;
extern u8g_dev_t u8g_dev_ssd1306_128x32_2x_i2c;
/* OLED 64x48 Display with SSD1306 Controller */
extern u8g_dev_t u8g_dev_ssd1306_64x48_sw_spi;
extern u8g_dev_t u8g_dev_ssd1306_64x48_hw_spi;
extern u8g_dev_t u8g_dev_ssd1306_64x48_i2c;
extern u8g_dev_t u8g_dev_ssd1306_64x48_2x_sw_spi;
extern u8g_dev_t u8g_dev_ssd1306_64x48_2x_hw_spi;
extern u8g_dev_t u8g_dev_ssd1306_64x48_2x_i2c;
/* OLED 60x32 Display with LD7032 Controller */
extern u8g_dev_t u8g_dev_ld7032_60x32_sw_spi;
extern u8g_dev_t u8g_dev_ld7032_60x32_hw_spi;
@ -506,6 +530,11 @@ extern u8g_dev_t u8g_dev_ssd1351_128x128gh_hicolor_hw_spi;
extern u8g_dev_t u8g_dev_ssd1351_128x128gh_4x_hicolor_sw_spi;
extern u8g_dev_t u8g_dev_ssd1351_128x128gh_4x_hicolor_hw_spi;
/* SSD1353 OLED Palmtronics */
extern u8g_dev_t u8g_dev_ssd1353_160x128_332_hw_spi;
extern u8g_dev_t u8g_dev_ssd1353_160x128_hicolor_hw_spi;
/* HT1632 */
extern u8g_dev_t u8g_dev_ht1632_24x16;
@ -639,7 +668,12 @@ struct _u8g_dev_arg_irgb_t
/* com driver */
uint8_t u8g_com_null_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_null.c */
uint8_t u8g_com_std_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* requires U8G_WITH_PINLIST */
uint8_t u8g_com_arduino_std_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_arduino_std_sw_spi.c */
uint8_t u8g_com_arduino_hw_usart_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_atmega_hw_usart_spi.c */
uint8_t u8g_com_arduino_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_arduino_sw_spi.c */
@ -665,6 +699,8 @@ uint8_t u8g_com_atmega_st7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val
uint8_t u8g_com_atmega_st7920_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr);
uint8_t u8g_com_atmega_parallel_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_atmega_parallel.c */
uint8_t u8g_com_msp430_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_msp430_hw_spi.c */
uint8_t u8g_com_raspberrypi_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_rasperrypi_hw_spi.c */
uint8_t u8g_com_raspberrypi_ssd_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); /* u8g_com_raspberrypi_ssd_i2c.c */
@ -684,6 +720,12 @@ defined(__18CXX) || defined(__PIC32MX)
*/
/* ==== HW SPI, msp430 ====*/
#if defined(__MSP430__)
#define U8G_COM_HW_SPI u8g_com_msp430_hw_spi_fn
#define U8G_COM_ST7920_HW_SPI u8g_com_null_fn
#endif
/* ==== HW SPI, Raspberry PI ====*/
#if defined(U8G_RASPBERRY_PI)
#define U8G_COM_HW_SPI u8g_com_raspberrypi_hw_spi_fn
@ -758,6 +800,13 @@ defined(__18CXX) || defined(__PIC32MX)
#ifndef U8G_COM_SW_SPI
/* ==== SW SPI, not Arduino ====*/
/* ==== SW SPI, msp430 ====*/
#if defined(__MSP430__)
#define U8G_COM_SW_SPI u8g_com_std_sw_spi_fn
#define U8G_COM_ST7920_SW_SPI u8g_com_null_fn
#endif
#if defined(__AVR__)
#define U8G_COM_SW_SPI u8g_com_atmega_sw_spi_fn
#define U8G_COM_ST7920_SW_SPI u8g_com_atmega_st7920_sw_spi_fn
@ -1137,6 +1186,8 @@ void u8g_UpdateDimension(u8g_t *u8g);
uint8_t u8g_Begin(u8g_t *u8g); /* reset device, put it into default state and call u8g_UpdateDimension() */
uint8_t u8g_Init(u8g_t *u8g, u8g_dev_t *dev); /* only usefull if the device only as hardcoded ports */
uint8_t u8g_InitComFn(u8g_t *u8g, u8g_dev_t *dev, u8g_com_fnptr com_fn); /* Init procedure for anything which is not Arduino or AVR (e.g. ARM, but not Due, which is Arduino) */
#if defined(U8G_WITH_PINLIST)
uint8_t u8g_InitSPI(u8g_t *u8g, u8g_dev_t *dev, uint8_t sck, uint8_t mosi, uint8_t cs, uint8_t a0, uint8_t reset);
uint8_t u8g_InitHWSPI(u8g_t *u8g, u8g_dev_t *dev, uint8_t cs, uint8_t a0, uint8_t reset);
uint8_t u8g_InitI2C(u8g_t *u8g, u8g_dev_t *dev, uint8_t options); /* use U8G_I2C_OPT_NONE as options */
@ -1145,6 +1196,8 @@ uint8_t u8g_Init8Bit(u8g_t *u8g, u8g_dev_t *dev, uint8_t d0, uint8_t d1, uint8_t
uint8_t en, uint8_t cs1, uint8_t cs2, uint8_t di, uint8_t rw, uint8_t reset);
uint8_t u8g_InitRW8Bit(u8g_t *u8g, u8g_dev_t *dev, uint8_t d0, uint8_t d1, uint8_t d2, uint8_t d3, uint8_t d4, uint8_t d5, uint8_t d6, uint8_t d7,
uint8_t cs, uint8_t a0, uint8_t wr, uint8_t rd, uint8_t reset);
#endif
void u8g_FirstPage(u8g_t *u8g);
uint8_t u8g_NextPage(u8g_t *u8g);
uint8_t u8g_SetContrast(u8g_t *u8g, uint8_t contrast);
@ -1153,6 +1206,7 @@ void u8g_SleepOff(u8g_t *u8g);
void u8g_DrawPixel(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y);
void u8g_Draw8Pixel(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, uint8_t dir, uint8_t pixel);
void u8g_Draw4TPixel(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, uint8_t dir, uint8_t pixel);
void u8g_Draw8ColorPixel(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, uint8_t colpixel);
uint8_t u8g_Stop(u8g_t *u8g);
void u8g_SetColorEntry(u8g_t *u8g, uint8_t idx, uint8_t r, uint8_t g, uint8_t b);

7
app/u8glib/u8g_com_i2c.c
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@ -66,6 +66,10 @@ uint8_t u8g_i2c_get_err_pos(void)
return u8g_i2c_err_pos;
}
#if defined(__AVR__)
static void u8g_i2c_set_error(uint8_t code, uint8_t pos)
{
if ( u8g_i2c_err_code > 0 )
@ -74,9 +78,6 @@ static void u8g_i2c_set_error(uint8_t code, uint8_t pos)
u8g_i2c_err_pos = pos;
}
#if defined(__AVR__)
#define U8G_ATMEGA_HW_TWI
/* remove the definition for attiny */

101
app/u8glib/u8g_com_io.c
View File

@ -191,6 +191,107 @@ uint8_t u8g_GetPinLevel(uint8_t internal_pin_number)
return 0;
}
#elif defined (__MSP430__)
#include <msp430.h>
typedef volatile uint8_t * IO_PTR;
// MSP430 F5XXX / F6XXX series.
const IO_PTR u8g_msp_ddr_P[] PROGMEM = {
&P1DIR
,&P2DIR
,&P3DIR
,&P4DIR
,&P5DIR
,&P6DIR
,&P7DIR
,&P8DIR
#if defined (__MSP430_HAS_PORT9_R__)
,&P9DIR
#if defined (__MSP430_HAS_PORT10_R__)
,&P10DIR
#endif
#endif
};
const IO_PTR u8g_msp_port_P[] PROGMEM = {
&P1OUT
,&P2OUT
,&P3OUT
,&P4OUT
,&P5OUT
,&P6OUT
,&P7OUT
,&P8OUT
#if defined (__MSP430_HAS_PORT9_R__)
,&P9OUT
#if defined (__MSP430_HAS_PORT10_R__)
,&P10OUT
#endif
#endif
};
const IO_PTR u8g_msp_pin_P[] PROGMEM = {
&P1IN
,&P2IN
,&P3IN
,&P4IN
,&P5IN
,&P6IN
,&P7IN
,&P8IN
#if defined (__MSP430_HAS_PORT9_R__)
,&P9IN
#if defined (__MSP430_HAS_PORT10_R__)
,&P10IN
#endif
#endif
};
uint8_t u8g_Pin(uint8_t port, uint8_t bitpos)
{
port <<= 3;
port += bitpos;
return port;
}
void u8g_SetPinOutput(uint8_t internal_pin_number)
{
uint8_t port = (internal_pin_number >> 3)-1;
uint8_t output = 1 << (internal_pin_number & 0x07);
*u8g_msp_ddr_P[port] |= output;
}
void u8g_SetPinInput(uint8_t internal_pin_number)
{
uint8_t port = (internal_pin_number >> 3)-1;
*u8g_msp_ddr_P[port] &= ~(1 << (internal_pin_number & 0x07));
}
void u8g_SetPinLevel(uint8_t internal_pin_number, uint8_t level)
{
uint8_t port = (internal_pin_number >> 3)-1;
if (level == 0)
{
*u8g_msp_port_P[port] &= ~(1 << (internal_pin_number & 0x07));
}
else
{
*u8g_msp_port_P[port]|= (1 << (internal_pin_number & 0x07));
}
}
uint8_t u8g_GetPinLevel(uint8_t internal_pin_number)
{
uint8_t port = (internal_pin_number >> 3)-1;
uint8_t tmp = *u8g_msp_pin_P[port];
if (tmp & (1 << (internal_pin_number & 0x07)))
{
return 1;
}
return 0;
}
#elif defined(U8G_RASPBERRY_PI)
#include <wiringPi.h>

48
app/u8glib/u8g_delay.c
View File

@ -61,6 +61,10 @@
# else
# define USE_ARDUINO_DELAY
# endif
#elif defined(_GNU_SOURCE)
# define USE_LINUX_DELAY
#elif defined(__MSP430__)
# define USE_MSP430_DELAY
#elif defined(U8G_RASPBERRY_PI)
# define USE_RASPBERRYPI_DELAY
#elif defined(__AVR__)
@ -103,6 +107,22 @@ void u8g_10MicroDelay(void)
}
#endif
#if defined(USE_LINUX_DELAY)
void u8g_Delay(uint16_t val) {
//delay(val);
usleep((uint32_t)val*(uint32_t)1000);
}
void u8g_MicroDelay(void)
{
usleep(1);
}
void u8g_10MicroDelay(void)
{
usleep(10);
}
#endif
/*== AVR Delay ==*/
@ -247,6 +267,34 @@ void u8g_10MicroDelay(void)
#endif
#if defined(USE_MSP430_DELAY)
#include <msp430.h>
#ifndef F_CPU
#define F_CPU 1000000UL
#endif
void u8g_Delay(uint16_t val)
{
int t;
for (t=0; t < val; t++)
{
__delay_cycles(F_CPU/1000UL);
}
}
void u8g_MicroDelay(void)
{
__delay_cycles(F_CPU/1000000UL);
}
void u8g_10MicroDelay(void)
{
__delay_cycles(F_CPU/100000UL);
}
#endif
/*== Any other systems: Dummy Delay ==*/
#if defined(USE_DUMMY_DELAY)
void u8g_Delay(uint16_t val)

187
app/u8glib/u8g_dev_ssd1306_64x48.c Normal file
View File

@ -0,0 +1,187 @@
/*
u8g_dev_ssd1306_64x48.c
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 64
#define HEIGHT 48
#define PAGE_HEIGHT 8
/* init sequence buydisplay.com 0.66" 64x48 OLED */
/* http://www.buydisplay.com/download/manual/ER-OLED0.66-1_Series_Datasheet.pdf */
static const uint8_t u8g_dev_ssd1306_64x48_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS(1), /* enable chip */
0x0ae, /* display off, sleep mode */
0x0d5, 0x080, /* clock divide ratio (0x00=1) and oscillator frequency (0x8) */
0x0a8, 0x02f, /* Multiplex Ration, Jul 12, 2015: From 0.66" OLED datasheet */
0x0d3, 0x000, /* */
0x040, /* start line */
0x08d, 0x014, /* charge pump setting (p62): 0x014 enable, 0x010 disable */
//0x020, 0x002, /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5), Feb 23, 2013: 64x48 OLED: 0x002, 64x48 OLED 0x012 */
0x0a1, /* segment remap a0/a1*/
0x0c8, /* c0: scan dir normal, c8: reverse */
0x0da, 0x012, /* com pin HW config, sequential com pin config (bit 4), disable left/right remap (bit 5), Jul 12, 2015: From 0.66" OLED datasheet */
0x081, 0x0cf, /* set contrast control */
0x0d9, 0x022, /* pre-charge period 0x022/f1, from 0.66" OLED datasheet */
0x0db, 0x000, /* vcomh deselect level, from 0.66" OLED datasheet */
0x02e, /* 2012-05-27: Deactivate scroll */
0x0a4, /* output ram to display */
0x0a6, /* none inverted normal display mode */
0x0af, /* display on */
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_END /* end of sequence */
};
static const uint8_t u8g_dev_ssd1306_64x48_data_start[] PROGMEM = {
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_CS(1), /* enable chip */
0x010+2, /* set upper 4 bit of the col adr. to 0, 0.66" OLED starts with offset 32 */
0x000, /* set lower 4 bit of the col adr. to 4 */
U8G_ESC_END /* end of sequence */
};
static const uint8_t u8g_dev_ssd13xx_sleep_on[] PROGMEM = {
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_CS(1), /* enable chip */
0x0ae, /* display off */
U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END /* end of sequence */
};
static const uint8_t u8g_dev_ssd13xx_sleep_off[] PROGMEM = {
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_CS(1), /* enable chip */
0x0af, /* display on */
U8G_ESC_DLY(50), /* delay 50 ms */
U8G_ESC_CS(0), /* disable chip, bugfix 12 nov 2014 */
U8G_ESC_END /* end of sequence */
};
uint8_t u8g_dev_ssd1306_64x48_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_64x48_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_64x48_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | pb->p.page); /* select current page (SSD1306) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1306_64x48_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_64x48_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_64x48_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2)); /* select current page (SSD1306) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, pb->width, pb->buf);
u8g_SetChipSelect(u8g, dev, 0);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_64x48_data_start);
u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2+1)); /* select current page (SSD1306) */
u8g_SetAddress(u8g, dev, 1); /* data mode */
u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width);
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off);
return 1;
}
return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg);
}
U8G_PB_DEV(u8g_dev_ssd1306_64x48_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1306_64x48_fn, U8G_COM_SW_SPI);
U8G_PB_DEV(u8g_dev_ssd1306_64x48_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1306_64x48_fn, U8G_COM_HW_SPI);
U8G_PB_DEV(u8g_dev_ssd1306_64x48_i2c, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1306_64x48_fn, U8G_COM_SSD_I2C);
uint8_t u8g_dev_ssd1306_64x48_2x_buf[WIDTH*2] U8G_NOCOMMON ;
u8g_pb_t u8g_dev_ssd1306_64x48_2x_pb = { {16, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_ssd1306_64x48_2x_buf};
u8g_dev_t u8g_dev_ssd1306_64x48_2x_sw_spi = { u8g_dev_ssd1306_64x48_2x_fn, &u8g_dev_ssd1306_64x48_2x_pb, U8G_COM_SW_SPI };
u8g_dev_t u8g_dev_ssd1306_64x48_2x_hw_spi = { u8g_dev_ssd1306_64x48_2x_fn, &u8g_dev_ssd1306_64x48_2x_pb, U8G_COM_HW_SPI };
u8g_dev_t u8g_dev_ssd1306_64x48_2x_i2c = { u8g_dev_ssd1306_64x48_2x_fn, &u8g_dev_ssd1306_64x48_2x_pb, U8G_COM_SSD_I2C };

4
app/u8glib/u8g_dev_ssd1309_128x64.c
View File

@ -124,7 +124,7 @@ uint8_t u8g_dev_ssd1309_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void
u8g_SetChipSelect(u8g, dev, 1);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x081);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) ); /* 11 Jul 2015: fixed contrast calculation */
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
@ -140,5 +140,3 @@ uint8_t u8g_dev_ssd1309_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void
U8G_PB_DEV(u8g_dev_ssd1309_128x64_hw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1309_128x64_fn, U8G_COM_HW_SPI);
U8G_PB_DEV(u8g_dev_ssd1309_128x64_sw_spi, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1309_128x64_fn, U8G_COM_SW_SPI);
U8G_PB_DEV(u8g_dev_ssd1309_128x64_i2c, WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_ssd1309_128x64_fn, U8G_COM_SSD_I2C);

425
app/u8glib/u8g_dev_ssd1353_160x128.c Normal file
View File

@ -0,0 +1,425 @@
/*
u8g_dev_ssd1353_160x128.c
Universal 8bit Graphics Library
Copyright (c) 2015, hugodan3@googlemail.com
Copyright (c) 2013, jamjardavies@gmail.com
Copyright (c) 2013, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
History:
Initial version 8 Mar 2015 hugodan3@googlemail.com. This version has
been derived from the ssd1351 driver by jamjarda. It has
been improved by in-lining time critical functions.
*/
#include "u8g.h"
#define WIDTH 160
#define HEIGHT 128
#define PAGE_HEIGHT 8
#define USE_GREY_TABLE 0
static const uint8_t u8g_dev_ssd1353_160x128_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_DLY(50),
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_DLY(50),
U8G_ESC_CS(1), /* enable chip */
0xFD, /* Command unlock */
U8G_ESC_ADR(1),
0x12,
U8G_ESC_ADR(0),
0xAE, /* Set Display Off */
U8G_ESC_ADR(0),
0xA8,
U8G_ESC_ADR(1),
0x7F, /* Set Multiplex Ratio */
U8G_ESC_ADR(0),
0xA0,
U8G_ESC_ADR(1),
0xB4, /* Set remapping */
U8G_ESC_ADR(0),
0xA1,
U8G_ESC_ADR(1),
0x00, /* Set Display Start Line */
U8G_ESC_ADR(0),
0xA2,
U8G_ESC_ADR(1),
0x00, /* Set Display Offset */
U8G_ESC_ADR(0),
0xB1,
U8G_ESC_ADR(1),
0x32, /* Set Phase Length */
U8G_ESC_ADR(0),
0xB4,
U8G_ESC_ADR(1),
0x04, /* Set Second Precharge Period */
U8G_ESC_ADR(0),
0xA4, /* Set Display Mode ON */
U8G_ESC_ADR(0),
0xB3,
U8G_ESC_ADR(1), /* frame rate */
0x40,
U8G_ESC_ADR(0),
0xBB,
U8G_ESC_ADR(1), /* pre-charge level */
0x08,
U8G_ESC_ADR(0),
0xBE,
U8G_ESC_ADR(1), /* vcomh */
0x3C,
/* color adjustments */
#if USE_GREY_TABLE != 1
U8G_ESC_ADR(0), /* instruction mode */
0x81,
U8G_ESC_ADR(1),
0xC8, /* Set Contrast Color 1*/
U8G_ESC_ADR(0), /* instruction mode */
0x82,
U8G_ESC_ADR(1),
0x80, /* Set Contrast Color 2*/
U8G_ESC_ADR(0), /* instruction mode */
0x83,
U8G_ESC_ADR(1),
0xF8, /* Set Contrast Color 3*/
U8G_ESC_ADR(0), /* instruction mode */
0x87,
U8G_ESC_ADR(1),
0x09, /* Set Master Contrast MAX */
U8G_ESC_ADR(0), /* instruction mode */
0xB9, /* Set CMD Grayscale Linear */
#else
U8G_ESC_ADR(0), /* instruction mode */
0x81,
U8G_ESC_ADR(1),
0xC8, /* Set Contrast Color 1*/
U8G_ESC_ADR(0), /* instruction mode */
0x82,
U8G_ESC_ADR(1),
0xA0, /* Set Contrast Color 2*/
U8G_ESC_ADR(0), /* instruction mode */
0x83,
U8G_ESC_ADR(1),
0xB0, /* Set Contrast Color 3*/
U8G_ESC_ADR(0), /* instruction mode */
0x87,
U8G_ESC_ADR(1),
0x0F, /* Set Master Contrast MAX */
U8G_ESC_ADR(0), /* instruction mode */
0xB8, /* Set CMD Grayscale Lookup */
U8G_ESC_ADR(1),
0x05, 0x06, 0x07, 0x08,
0x09, 0x0a, 0x0b, 0x0c,
0x0D, 0x0E, 0x0F, 0x10,
0x11, 0x12, 0x13, 0x14,
0x15, 0x16, 0x18, 0x1a,
0x1b, 0x1C, 0x1D, 0x1F,
0x21, 0x23, 0x25, 0x27,
0x2A, 0x2D, 0x30, 0x33,
0x36, 0x39, 0x3C, 0x3F,
0x42, 0x45, 0x48, 0x4C,
0x50, 0x54, 0x58, 0x5C,
0x60, 0x64, 0x68, 0x6C,
0x70, 0x74, 0x78, 0x7D,
0x82, 0x87, 0x8C, 0x91,
0x96, 0x9B, 0xA0, 0xA5,
0xAA, 0xAF, 0xB4,
#endif
U8G_ESC_ADR(0),
0xAF, /* Set Display On */
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_ADR(1),
U8G_ESC_END /* end of sequence */
};
static const uint8_t u8g_dev_ssd1353_160x128_column_seq[] PROGMEM = {
U8G_ESC_CS(1),
U8G_ESC_ADR(0), 0x15,
U8G_ESC_ADR(1), 0x00, 0x9f,
U8G_ESC_ADR(0), 0x75,
U8G_ESC_ADR(1), 0x00, 0x7f,
U8G_ESC_ADR(0), 0x5c,
U8G_ESC_ADR(1),
U8G_ESC_CS(0),
U8G_ESC_END
};
static const uint8_t u8g_dev_ssd1353_160x128_sleep_on[] PROGMEM = {
U8G_ESC_CS(1),
U8G_ESC_ADR(0), 0xAE,
U8G_ESC_CS(0),
U8G_ESC_END
};
static const uint8_t u8g_dev_ssd1353_160x128_sleep_off[] PROGMEM = {
U8G_ESC_CS(1),
U8G_ESC_ADR(0), 0xAF,
U8G_ESC_CS(0),
U8G_ESC_END
};
#define RGB332_STREAM_BYTES 8
static uint8_t u8g_ssd1353_stream_bytes[RGB332_STREAM_BYTES*3];
uint8_t u8g_dev_ssd1353_160x128_332_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_FIRST:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_column_seq);
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_uint_t x;
uint8_t page_height;
uint8_t i;
uint8_t cnt;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
uint8_t *ptr = pb->buf;
u8g_SetChipSelect(u8g, dev, 1);
page_height = pb->p.page_y1;
page_height -= pb->p.page_y0;
page_height++;
for( i = 0; i < page_height; i++ )
{
for (x = 0; x < pb->width; x+=RGB332_STREAM_BYTES)
{
/* inline operation for better perf */
uint8_t *dest = u8g_ssd1353_stream_bytes;
for( cnt = 0; cnt < RGB332_STREAM_BYTES; cnt++ )
{
uint8_t val = *ptr++;
*dest++ = ((val & 0xe0) >> 2);
*dest++ = ((val & 0x1c) << 1);
*dest++ = ((val & 0x03) << 4);
}
u8g_WriteSequence(u8g, dev, RGB332_STREAM_BYTES*3, u8g_ssd1353_stream_bytes);
}
}
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_sleep_on);
break;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_sleep_off);
break;
}
return u8g_dev_pb8h8_base_fn(u8g, dev, msg, arg);
}
/*
* not tested and not released, just taken from ssd1351
*/
static uint8_t u8g_dev_ssd1353_160x128_r[256];
static uint8_t u8g_dev_ssd1353_160x128_g[256];
static uint8_t u8g_dev_ssd1353_160x128_b[256];
uint8_t u8g_dev_ssd1353_160x128_idx_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
// u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_SET_COLOR_ENTRY:
u8g_dev_ssd1353_160x128_r[ ((u8g_dev_arg_irgb_t *)arg)->idx ] = ((u8g_dev_arg_irgb_t *)arg)->r;
u8g_dev_ssd1353_160x128_g[ ((u8g_dev_arg_irgb_t *)arg)->idx ] = ((u8g_dev_arg_irgb_t *)arg)->g;
u8g_dev_ssd1353_160x128_b[ ((u8g_dev_arg_irgb_t *)arg)->idx ] = ((u8g_dev_arg_irgb_t *)arg)->b;
break;
case U8G_DEV_MSG_PAGE_FIRST:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_column_seq);
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
int x;
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
uint8_t *ptr = pb->buf;
u8g_SetChipSelect(u8g, dev, 1);
for (x = 0; x < pb->width; x++)
{
u8g_WriteByte(u8g, dev, u8g_dev_ssd1353_160x128_r[(*ptr)>>2]);
u8g_WriteByte(u8g, dev, u8g_dev_ssd1353_160x128_g[(*ptr)>>2]);
u8g_WriteByte(u8g, dev, u8g_dev_ssd1353_160x128_b[(*ptr)>>2]);
ptr++;
}
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_GET_MODE:
return U8G_MODE_INDEX;
}
return u8g_dev_pb8h8_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1353_160x128_hicolor_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_FIRST:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_column_seq);
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
uint8_t i, j;
uint8_t page_height;
uint8_t *ptr = pb->buf;
u8g_SetChipSelect(u8g, dev, 1);
page_height = pb->p.page_y1;
page_height -= pb->p.page_y0;
page_height++;
for( j = 0; j < page_height; j++ )
{
for (i = 0; i < pb->width; i+=RGB332_STREAM_BYTES)
{
register uint8_t cnt, low, high, r, g, b;
uint8_t *dest = u8g_ssd1353_stream_bytes;
for( cnt = 0; cnt < RGB332_STREAM_BYTES; cnt++ )
{
low = *ptr++;
high = *ptr++;
r = high & ~7;
r >>= 2;
b = low & 31;
b <<= 1;
g = high & 7;
g <<= 3;
g |= (low>>5)&7;
*dest++ = r;
*dest++ = g;
*dest++ = b;
}
u8g_WriteSequence(u8g, dev, RGB332_STREAM_BYTES*3, u8g_ssd1353_stream_bytes);
}
}
u8g_SetChipSelect(u8g, dev, 0);
}
break; /* continue to base fn */
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_sleep_on);
break;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1353_160x128_sleep_off);
break;
}
return u8g_dev_pbxh16_base_fn(u8g, dev, msg, arg);
}
uint8_t u8g_dev_ssd1353_160x128_byte_buf[WIDTH*PAGE_HEIGHT] U8G_NOCOMMON ;
u8g_pb_t u8g_dev_ssd1353_160x128_byte_pb = { {PAGE_HEIGHT, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_ssd1353_160x128_byte_buf};
u8g_dev_t u8g_dev_ssd1353_160x128_332_sw_spi = { u8g_dev_ssd1353_160x128_332_fn, &u8g_dev_ssd1353_160x128_byte_pb, U8G_COM_SW_SPI };
u8g_dev_t u8g_dev_ssd1353_160x128_332_hw_spi = { u8g_dev_ssd1353_160x128_332_fn, &u8g_dev_ssd1353_160x128_byte_pb, U8G_COM_HW_SPI };
//u8g_dev_t u8g_dev_ssd1353_160x128_idx_sw_spi = { u8g_dev_ssd1353_160x128_idx_fn, &u8g_dev_ssd1353_160x128_byte_pb, U8G_COM_SW_SPI };
//u8g_dev_t u8g_dev_ssd1353_160x128_idx_hw_spi = { u8g_dev_ssd1353_160x128_idx_fn, &u8g_dev_ssd1353_160x128_byte_pb, U8G_COM_HW_SPI };
/* only half of the height, because two bytes are needed for one pixel */
u8g_pb_t u8g_dev_ssd1353_160x128_hicolor_byte_pb = { {PAGE_HEIGHT/2, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_ssd1353_160x128_byte_buf};
u8g_dev_t u8g_dev_ssd1353_160x128_hicolor_sw_spi = { u8g_dev_ssd1353_160x128_hicolor_fn, &u8g_dev_ssd1353_160x128_hicolor_byte_pb, U8G_COM_SW_SPI };
u8g_dev_t u8g_dev_ssd1353_160x128_hicolor_hw_spi = { u8g_dev_ssd1353_160x128_hicolor_fn, &u8g_dev_ssd1353_160x128_hicolor_byte_pb, U8G_COM_HW_SPI };
/* the 4x buffer is removed since it does not fit the RAM space of very small MCUs */
#if 0
uint8_t u8g_dev_ssd1353_160x128_4x_byte_buf[WIDTH*PAGE_HEIGHT*4] U8G_NOCOMMON ;
u8g_pb_t u8g_dev_ssd1353_160x128_4x_332_byte_pb = { {PAGE_HEIGHT*4, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_ssd1353_160x128_4x_byte_buf};
u8g_dev_t u8g_dev_ssd1353_160x128_4x_332_sw_spi = { u8g_dev_ssd1353_160x128_332_fn, &u8g_dev_ssd1353_160x128_4x_332_byte_pb, U8G_COM_SW_SPI };
u8g_dev_t u8g_dev_ssd1353_160x128_4x_332_hw_spi = { u8g_dev_ssd1353_160x128_332_fn, &u8g_dev_ssd1353_160x128_4x_332_byte_pb, U8G_COM_HW_SPI };
u8g_pb_t u8g_dev_ssd1353_160x128_4x_hicolor_byte_pb = { {PAGE_HEIGHT/2*4, HEIGHT, 0, 0, 0}, WIDTH, u8g_dev_ssd1353_160x128_4x_byte_buf};
u8g_dev_t u8g_dev_ssd1353_160x128_4x_hicolor_sw_spi = { u8g_dev_ssd1353_160x128_hicolor_fn, &u8g_dev_ssd1353_160x128_4x_hicolor_byte_pb, U8G_COM_SW_SPI };
u8g_dev_t u8g_dev_ssd1353_160x128_4x_hicolor_hw_spi = { u8g_dev_ssd1353_160x128_hicolor_fn, &u8g_dev_ssd1353_160x128_4x_hicolor_byte_pb, U8G_COM_HW_SPI };
#endif

6
app/u8glib/u8g_dev_uc1611_dogm240.c
View File

@ -66,7 +66,7 @@ static const uint8_t u8g_dev_uc1611_dogm240_init_seq[] PROGMEM = {
static void setPage(u8g_t *u8g, u8g_dev_t *dev, unsigned char page)
{
u8g_WriteByte(u8g, dev, 0x70);
u8g_WriteByte(u8g, dev, 0x70 + (page>>4));
u8g_WriteByte(u8g, dev, 0x60 + (page&0x0F));
}
@ -103,7 +103,8 @@ uint8_t u8g_dev_uc1611_dogm240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void
u8g_SetChipSelect(u8g, dev, 0);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x81);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2); /* set contrast from, keep gain at 0 */
/* 11 Jul 2015: bugfix, github issue 339 */
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) ); /* set contrast from, keep gain at 0 */
u8g_SetChipSelect(u8g, dev, 1);
return 1;
}
@ -113,4 +114,5 @@ uint8_t u8g_dev_uc1611_dogm240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void
U8G_PB_DEV(u8g_dev_uc1611_dogm240_i2c , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogm240_fn, U8G_COM_UC_I2C);
U8G_PB_DEV(u8g_dev_uc1611_dogm240_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogm240_fn, U8G_COM_SW_SPI);
U8G_PB_DEV(u8g_dev_uc1611_dogm240_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogm240_fn, U8G_COM_HW_SPI);
U8G_PB_DEV(u8g_dev_uc1611_dogm240_8bit , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogm240_fn, U8G_COM_FAST_PARALLEL);

4
app/u8glib/u8g_dev_uc1611_dogxl240.c
View File

@ -103,7 +103,8 @@ static uint8_t u8g_dev_uc1611_dogxl240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t ms
u8g_SetChipSelect(u8g, dev, 0);
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_WriteByte(u8g, dev, 0x81);
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2); /* set contrast from, keep gain at 0 */
/* 11 Jul 2015: bugfix, github issue 339 */
u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) ); /* set contrast from, keep gain at 0 */
u8g_SetChipSelect(u8g, dev, 1);
return 1;
}
@ -113,4 +114,5 @@ static uint8_t u8g_dev_uc1611_dogxl240_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t ms
U8G_PB_DEV(u8g_dev_uc1611_dogxl240_i2c , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogxl240_fn, U8G_COM_UC_I2C);
U8G_PB_DEV(u8g_dev_uc1611_dogxl240_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogxl240_fn, U8G_COM_SW_SPI);
U8G_PB_DEV(u8g_dev_uc1611_dogxl240_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogxl240_fn, U8G_COM_HW_SPI);
U8G_PB_DEV(u8g_dev_uc1611_dogxl240_8bit , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_uc1611_dogxl240_fn, U8G_COM_FAST_PARALLEL);

24
app/u8glib/u8g_font.c
View File

@ -902,12 +902,16 @@ u8g_uint_t u8g_DrawStr90P(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, const u8g_pgm_
{
u8g_uint_t t = 0;
int8_t d;
uint8_t c;
x -= u8g->font_calc_vref(u8g);
while( *s != '\0' )
for(;;)
{
d = u8g_DrawGlyph90(u8g, x, y, u8g_pgm_read(s));
c = u8g_pgm_read(s);
if ( c == '\0' )
break;
d = u8g_DrawGlyph90(u8g, x, y, c);
y += d;
t += d;
s++;
@ -919,12 +923,16 @@ u8g_uint_t u8g_DrawStr180P(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, const u8g_pgm
{
u8g_uint_t t = 0;
int8_t d;
uint8_t c;
y -= u8g->font_calc_vref(u8g);
while( *s != '\0' )
for(;;)
{
d = u8g_DrawGlyph180(u8g, x, y, u8g_pgm_read(s));
c = u8g_pgm_read(s);
if ( c == '\0' )
break;
d = u8g_DrawGlyph180(u8g, x, y, c);
x -= d;
t += d;
s++;
@ -936,12 +944,16 @@ u8g_uint_t u8g_DrawStr270P(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, const u8g_pgm
{
u8g_uint_t t = 0;
int8_t d;
uint8_t c;
x += u8g->font_calc_vref(u8g);
while( *s != '\0' )
for(;;)
{
d = u8g_DrawGlyph270(u8g, x, y, u8g_pgm_read(s));
c = u8g_pgm_read(s);
if ( c == '\0' )
break;
d = u8g_DrawGlyph270(u8g, x, y, c);
y -= d;
t += d;
s++;

11
app/u8glib/u8g_line.c
View File

@ -1,6 +1,6 @@
/*
u8g_line.h
u8g_line.c
Universal 8bit Graphics Library
@ -65,6 +65,15 @@ void u8g_DrawLine(u8g_t *u8g, u8g_uint_t x1, u8g_uint_t y1, u8g_uint_t x2, u8g_u
err = dx >> 1;
if ( y2 > y1 ) ystep = 1; else ystep = -1;
y = y1;
#ifndef U8G_16BIT
if ( x2 == 255 )
x2--;
#else
if ( x2 == 0xffff )
x2--;
#endif
for( x = x1; x <= x2; x++ )
{
if ( swapxy == 0 )

22
app/u8glib/u8g_ll_api.c
View File

@ -425,6 +425,16 @@ void u8g_Draw4TPixel(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, uint8_t dir, uint8_
u8g_Draw4TPixelLL(u8g, u8g->dev, x, y, dir, pixel);
}
void u8g_Draw8ColorPixel(u8g_t *u8g, u8g_uint_t x, u8g_uint_t y, uint8_t colpixel)
{
u8g_dev_arg_pixel_t *arg = &(u8g->arg_pixel);
arg->x = x;
arg->y = y;
arg->dir = 0;
arg->pixel = 0x80;
arg->color = colpixel;
u8g_call_dev_fn(u8g, u8g->dev, U8G_DEV_MSG_SET_8PIXEL, arg);
}
/* u8g_IsBBXIntersection() has been moved to u8g_clip.c */
#ifdef OBSOLETE_CODE
@ -522,9 +532,8 @@ uint8_t u8g_GetDefaultForegroundColor(u8g_t *u8g)
return 255; /* white */
else if ( u8g_GetMode(u8g) == U8G_MODE_GRAY2BIT )
return 3; /* max intensity */
else /* if ( u8g.getMode() == U8G_MODE_BW ) */
return 1; /* pixel on */
return 1;
/* if ( u8g.getMode() == U8G_MODE_BW ) */
return 1; /* pixel on */
}
void u8g_SetDefaultForegroundColor(u8g_t *u8g)
@ -556,11 +565,10 @@ uint8_t u8g_GetDefaultMidColor(u8g_t *u8g)
mode = u8g_GetMode(u8g);
if ( mode == U8G_MODE_R3G3B2 )
return 0x06d; /* gray: 01101101 */
else if ( u8g_GetMode(u8g) == U8G_MODE_GRAY2BIT )
else if ( mode == U8G_MODE_GRAY2BIT )
return 1; /* low mid intensity */
else /* if ( u8g.getMode() == U8G_MODE_BW ) */
return 1; /* pixel on */
return 1; /* default */
/* if ( u8g.getMode() == U8G_MODE_BW ) */
return 1; /* pixel on */
}
void u8g_SetDefaultMidColor(u8g_t *u8g)

1
app/u8glib/u8g_virtual_screen.c
View File

@ -81,7 +81,6 @@ uint8_t u8g_dev_vs_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
return 0;
return u8g_call_dev_fn(u8g_vs_list[u8g_vs_current].u8g, u8g_vs_list[u8g_vs_current].u8g->dev, U8G_DEV_MSG_PAGE_FIRST, arg);
}
return 0;
case U8G_DEV_MSG_GET_WIDTH:
*((u8g_uint_t *)arg) = u8g_vs_width;
break;