Merge pull request #678 from devsaurus/dev-hspi_clockdiv
Add divider for arbitrary HSPI clock frequencies, resolves #674
This commit is contained in:
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093a895980
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@ -405,7 +405,7 @@ All other pins can be assigned to any available GPIO:
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Also refer to the initialization sequence eg in [u8g_graphics_test.lua](lua_examples/u8glib/u8g_graphics_test.lua):
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```lua
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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```
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@ -488,7 +488,7 @@ All other pins can be assigned to any available GPIO:
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Also refer to the initialization sequence eg in [GraphicsTest.lua](lua_examples/ucglib/GraphicsRest.lua):
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```lua
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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```
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#####Library usage
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@ -64,7 +64,7 @@ void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit)
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* Description : SPI master initial function for common byte units transmission
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* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
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*******************************************************************************/
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void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock)
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void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div)
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{
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uint32 regvalue;
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@ -109,12 +109,21 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databi
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//clear Daul or Quad lines transmission mode
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CLEAR_PERI_REG_MASK(SPI_CTRL(spi_no), SPI_QIO_MODE|SPI_DIO_MODE|SPI_DOUT_MODE|SPI_QOUT_MODE);
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// SPI clock=CPU clock/8
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// SPI clock = CPU clock / clock_div
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// the divider needs to be a multiple of 2 to get a proper waveform shape
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if ((clock_div & 0x01) != 0) {
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// bump the divider to the next N*2
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clock_div += 0x02;
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}
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clock_div >>= 1;
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// clip to maximum possible CLKDIV_PRE
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clock_div = clock_div > SPI_CLKDIV_PRE ? SPI_CLKDIV_PRE : clock_div - 1;
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WRITE_PERI_REG(SPI_CLOCK(spi_no),
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((1&SPI_CLKDIV_PRE)<<SPI_CLKDIV_PRE_S)|
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((3&SPI_CLKCNT_N)<<SPI_CLKCNT_N_S)|
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((1&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)|
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((3&SPI_CLKCNT_L)<<SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div
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((clock_div&SPI_CLKDIV_PRE)<<SPI_CLKDIV_PRE_S)|
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((1&SPI_CLKCNT_N)<<SPI_CLKCNT_N_S)|
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((0&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)|
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((1&SPI_CLKCNT_L)<<SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div
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//set 8bit output buffer length, the buffer is the low 8bit of register"SPI_FLASH_C0"
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WRITE_PERI_REG(SPI_USER1(spi_no),
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@ -18,7 +18,7 @@ void spi_lcd_mode_init(uint8 spi_no);
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void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit);
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//spi master init funtion
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void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock);
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void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div);
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//use spi send 8bit data
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void spi_mast_byte_write(uint8 spi_no,uint8 *data);
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@ -7,7 +7,7 @@
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#include "auxmods.h"
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#include "lrotable.h"
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// Lua: = spi.setup( id, mode, cpol, cpha, databits, clock )
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// Lua: = spi.setup( id, mode, cpol, cpha, databits, clock_div )
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static int spi_setup( lua_State *L )
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{
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unsigned id = luaL_checkinteger( L, 1 );
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@ -15,7 +15,7 @@ static int spi_setup( lua_State *L )
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unsigned cpol = luaL_checkinteger( L, 3 );
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unsigned cpha = luaL_checkinteger( L, 4 );
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unsigned databits = luaL_checkinteger( L, 5 );
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uint32_t clock = luaL_checkinteger( L, 6 );
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uint32_t clock_div = luaL_checkinteger( L, 6 );
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MOD_CHECK_ID( spi, id );
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@ -35,7 +35,11 @@ static int spi_setup( lua_State *L )
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return luaL_error( L, "wrong arg type" );
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}
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u32 res = platform_spi_setup(id, mode, cpol, cpha, databits, clock);
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if (clock_div < 4) {
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return luaL_error( L, "invalid clock divider" );
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}
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u32 res = platform_spi_setup(id, mode, cpol, cpha, databits, clock_div);
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lua_pushinteger( L, res );
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return 1;
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}
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@ -445,9 +445,9 @@ int platform_i2c_recv_byte( unsigned id, int ack ){
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// *****************************************************************************
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// SPI platform interface
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uint32_t platform_spi_setup( unsigned id, int mode, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock)
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uint32_t platform_spi_setup( unsigned id, int mode, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div)
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{
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spi_master_init(id, cpol, cpha, databits, clock);
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spi_master_init(id, cpol, cpha, databits, clock_div);
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return 1;
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}
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@ -100,7 +100,7 @@ typedef uint32_t spi_data_type;
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// The platform SPI functions
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int platform_spi_exists( unsigned id );
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uint32_t platform_spi_setup( unsigned id, int mode, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock);
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uint32_t platform_spi_setup( unsigned id, int mode, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div);
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spi_data_type platform_spi_send_recv( unsigned id, spi_data_type data );
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void platform_spi_select( unsigned id, int is_select );
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@ -30,7 +30,7 @@ function init_spi_display()
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local dc = 4 -- GPIO2
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local res = 0 -- GPIO16
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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disp = u8g.ssd1306_128x64_hw_spi(cs, dc, res)
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end
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@ -29,7 +29,7 @@ function init_spi_display()
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local dc = 4 -- GPIO2
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local res = 0 -- GPIO16
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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disp = u8g.ssd1306_128x64_hw_spi(cs, dc, res)
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end
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@ -30,7 +30,7 @@ function init_spi_display()
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local dc = 4 -- GPIO2
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local res = 0 -- GPIO16
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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disp = u8g.ssd1306_128x64_hw_spi(cs, dc, res)
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end
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@ -8,7 +8,7 @@ function init_spi_display()
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local dc = 4 -- GPIO2
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local res = 0 -- GPIO16
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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-- initialize the matching driver for your display
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-- see app/include/ucg_config.h
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@ -8,7 +8,7 @@ function init_spi_display()
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local dc = 4 -- GPIO2
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local res = 0 -- GPIO16
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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disp = ucg.ili9341_18x240x320_hw_spi(cs, dc, res)
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end
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@ -8,7 +8,7 @@ function init_spi_display()
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local dc = 4 -- GPIO2
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local res = 0 -- GPIO16
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 0)
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spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
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disp = ucg.ili9341_18x240x320_hw_spi(cs, dc, res)
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end
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