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Platform flash layer updated for ESP32. 

It would appear my ESP3212 only has a 2MB flash chip despite the
bootloader saying 4MB.
This commit is contained in:
Johny Mattsson 2016-09-22 14:56:40 +10:00
parent 6cd3111d79
commit 0fe0096c04
5 changed files with 109 additions and 400 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
components/base_nodemcu/user_main.c
View File

@ -15,6 +15,7 @@
#include "vfs.h"
#include "sdkconfig.h"
#include "esp_system.h"
#include "flash_api.h"
#include "driver/console.h"
#include "task/task.h"
@ -62,9 +63,8 @@ void nodemcu_init(void)
return;
}
#if defined(FLASH_SAFE_API)
if (flash_safe_get_size_byte() != flash_rom_get_size_byte()) {
NODE_ERR("Self adjust flash size.\n");
NODE_ERR("Incorrect flash size reported, adjusting...\n");
// Fit hardware real flash size.
flash_rom_set_size_byte(flash_safe_get_size_byte());
@ -74,7 +74,6 @@ void nodemcu_init(void)
// Don't post the start_lua task, we're about to reboot...
return;
}
#endif // defined(FLASH_SAFE_API)
#if defined ( CONFIG_BUILD_SPIFFS )
if (!vfs_mount("/FLASH", 0)) {

6
components/lua/lobject.c
View File

@ -54,7 +54,7 @@ int luaO_fb2int (int x) {
int luaO_log2 (unsigned int x) {
static const lu_byte log_2[256] PLATFORM_ALIGNMENT = {
static const lu_byte log_2[256] = {
0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,
6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,
7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,
@ -66,11 +66,7 @@ int luaO_log2 (unsigned int x) {
};
int l = -1;
while (x >= 256) { l += 8; x >>= 8; }
#ifdef LUA_CROSS_COMPILER
return l + log_2[x];
#else
return l + byte_of_aligned_array(log_2,x);
#endif
}

390
components/platform/flash_api.c
View File

@ -8,353 +8,147 @@
#include <string.h>
#include <stdlib.h>
uint32_t flash_detect_size_byte(void)
#include "../../bootloader/src/main/bootloader_config.h"
#define FLASH_HDR_ADDR 0x1000
static inline struct flash_hdr flash_load_rom_header (void)
{
#define FLASH_BUFFER_SIZE_DETECT 32
uint32_t dummy_size = FLASH_SIZE_256KBYTE;
uint8_t data_orig[FLASH_BUFFER_SIZE_DETECT] PLATFORM_ALIGNMENT = {0};
uint8_t data_new[FLASH_BUFFER_SIZE_DETECT] PLATFORM_ALIGNMENT = {0};
if (SPI_FLASH_RESULT_OK == flash_safe_read(0, (uint32 *)data_orig, FLASH_BUFFER_SIZE_DETECT))
struct flash_hdr hdr;
if (ESP_OK !=
spi_flash_read (FLASH_HDR_ADDR, (uint32_t *)&hdr, sizeof (hdr)))
{
NODE_ERR("Failed to load flash header block!\n");
abort();
}
return hdr;
}
static uint32_t flash_detect_size_byte(void)
{
#define DETECT_SZ 32
uint32_t detected_size = FLASH_SIZE_1MBYTE;
uint8_t data_orig[DETECT_SZ] PLATFORM_ALIGNMENT = {0};
uint8_t data_new[DETECT_SZ] PLATFORM_ALIGNMENT = {0};
// Detect read failure or wrap-around on flash read to find end of flash
if (ESP_OK == spi_flash_read (0, (uint32_t *)data_orig, DETECT_SZ))
{
while ((detected_size < FLASH_SIZE_16MBYTE) &&
(ESP_OK == spi_flash_read (
detected_size, (uint32_t *)data_new, DETECT_SZ)) &&
(0 != memcmp(data_orig, data_new, DETECT_SZ)))
{
dummy_size = FLASH_SIZE_256KBYTE;
while ((dummy_size < FLASH_SIZE_16MBYTE) &&
(SPI_FLASH_RESULT_OK == flash_safe_read(dummy_size, (uint32 *)data_new, FLASH_BUFFER_SIZE_DETECT)) &&
(0 != memcmp(data_orig, data_new, FLASH_BUFFER_SIZE_DETECT))
)
{
dummy_size *= 2;
}
};
return dummy_size;
detected_size *= 2;
}
};
return detected_size;
#undef FLASH_BUFFER_SIZE_DETECT
}
uint32_t flash_safe_get_size_byte(void)
{
static uint32_t flash_size = 0;
if (flash_size == 0)
{
flash_size = flash_detect_size_byte();
}
return flash_size;
static uint32_t flash_size = 0;
if (flash_size == 0)
{
flash_size = flash_detect_size_byte();
}
return flash_size;
}
uint16_t flash_safe_get_sec_num(void)
{
return (flash_safe_get_size_byte() / (SPI_FLASH_SEC_SIZE));
}
SpiFlashOpResult flash_safe_read(uint32 src_addr, uint32 *des_addr, uint32 size)
{
SpiFlashOpResult result = SPI_FLASH_RESULT_ERR;
FLASH_SAFEMODE_ENTER();
result = spi_flash_read(src_addr, (uint32 *) des_addr, size);
FLASH_SAFEMODE_LEAVE();
return result;
}
SpiFlashOpResult flash_safe_write(uint32 des_addr, uint32 *src_addr, uint32 size)
{
SpiFlashOpResult result = SPI_FLASH_RESULT_ERR;
FLASH_SAFEMODE_ENTER();
result = spi_flash_write(des_addr, src_addr, size);
FLASH_SAFEMODE_LEAVE();
return result;
}
SpiFlashOpResult flash_safe_erase_sector(uint16 sec)
{
SpiFlashOpResult result = SPI_FLASH_RESULT_ERR;
FLASH_SAFEMODE_ENTER();
result = spi_flash_erase_sector(sec);
FLASH_SAFEMODE_LEAVE();
return result;
}
SPIFlashInfo flash_rom_getinfo(void)
{
volatile SPIFlashInfo spi_flash_info PLATFORM_ALIGNMENT;
spi_flash_read(0, (uint32 *)(& spi_flash_info), sizeof(spi_flash_info));
return spi_flash_info;
}
uint8_t flash_rom_get_size_type(void)
{
return flash_rom_getinfo().size;
return (flash_safe_get_size_byte() / (SPI_FLASH_SEC_SIZE));
}
uint32_t flash_rom_get_size_byte(void)
{
static uint32_t flash_size = 0;
if (flash_size == 0)
static uint32_t flash_size = 0;
if (flash_size == 0)
{
switch (flash_load_rom_header ().spi_size)
{
switch (flash_rom_getinfo().size)
{
case SIZE_2MBIT:
// 2Mbit, 256kByte
flash_size = 256 * 1024;
break;
case SIZE_4MBIT:
// 4Mbit, 512kByte
flash_size = 512 * 1024;
break;
case SIZE_8MBIT:
// 8Mbit, 1MByte
flash_size = 1 * 1024 * 1024;
break;
case SIZE_16MBIT:
// 16Mbit, 2MByte
flash_size = 2 * 1024 * 1024;
break;
case SIZE_32MBIT:
// 32Mbit, 4MByte
flash_size = 4 * 1024 * 1024;
break;
case SIZE_16MBIT_8M_8M:
// 16Mbit, 2MByte
flash_size = 2 * 1024 * 1024;
break;
case SIZE_32MBIT_8M_8M:
// 32Mbit, 4MByte
flash_size = 4 * 1024 * 1024;
break;
default:
// Unknown flash size, fall back mode.
flash_size = 512 * 1024;
break;
}
default: // Unknown flash size, fall back mode.
case SPI_SIZE_1MB: flash_size = FLASH_SIZE_1MBYTE; break;
case SPI_SIZE_2MB: flash_size = FLASH_SIZE_2MBYTE; break;
case SPI_SIZE_4MB: flash_size = FLASH_SIZE_4MBYTE; break;
case SPI_SIZE_8MB: flash_size = FLASH_SIZE_8MBYTE; break;
case SPI_SIZE_16MB: flash_size = FLASH_SIZE_16MBYTE; break;
}
return flash_size;
}
return flash_size;
}
bool flash_rom_set_size_type(uint8_t size)
static bool flash_rom_set_size_type(uint8_t size_code)
{
// Dangerous, here are dinosaur infested!!!!!
// Reboot required!!!
// If you don't know what you're doing, your nodemcu may turn into stone ...
NODE_DBG("\nBEGIN SET FLASH HEADER\n");
uint8_t *data = malloc (SPI_FLASH_SEC_SIZE);
if (!data)
struct flash_hdr *hdr = (struct flash_hdr *)malloc (SPI_FLASH_SEC_SIZE);
if (!hdr)
return false;
if (SPI_FLASH_RESULT_OK == spi_flash_read(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
if (ESP_OK == spi_flash_read (FLASH_HDR_ADDR, (uint32_t *)hdr, SPI_FLASH_SEC_SIZE))
{
((SPIFlashInfo *)(&data[0]))->size = size;
if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector(0 * SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nERASE SUCCESS\n");
}
if (SPI_FLASH_RESULT_OK == spi_flash_write(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nWRITE SUCCESS, %u\n", size);
}
hdr->spi_size = size_code;
if (ESP_OK == spi_flash_erase_sector (FLASH_HDR_ADDR / SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nERASE SUCCESS\n");
}
if (ESP_OK == spi_flash_write(FLASH_HDR_ADDR, (uint32_t *)hdr, SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nWRITE SUCCESS, %u\n", size_code);
}
}
free (data);
free (hdr);
NODE_DBG("\nEND SET FLASH HEADER\n");
return true;
}
bool flash_rom_set_size_byte(uint32_t size)
{
// Dangerous, here are dinosaur infested!!!!!
// Reboot required!!!
// If you don't know what you're doing, your nodemcu may turn into stone ...
bool result = true;
uint32_t flash_size = 0;
bool ok = true;
uint8_t size_code = 0;
switch (size)
{
case 256 * 1024:
// 2Mbit, 256kByte
flash_size = SIZE_2MBIT;
flash_rom_set_size_type(flash_size);
break;
case 512 * 1024:
// 4Mbit, 512kByte
flash_size = SIZE_4MBIT;
flash_rom_set_size_type(flash_size);
break;
case 1 * 1024 * 1024:
// 8Mbit, 1MByte
flash_size = SIZE_8MBIT;
flash_rom_set_size_type(flash_size);
break;
case 2 * 1024 * 1024:
// 16Mbit, 2MByte
flash_size = SIZE_16MBIT;
flash_rom_set_size_type(flash_size);
break;
case 4 * 1024 * 1024:
// 32Mbit, 4MByte
flash_size = SIZE_32MBIT;
flash_rom_set_size_type(flash_size);
break;
/*
case 8 * 1024 * 1024:
// 64Mbit, 8MByte
flash_size = SIZE_16MBIT_8M_8M;
flash_rom_set_size_type(flash_size);
break;
case 16 * 1024 * 1024:
// 128Mbit, 16MByte
flash_size = SIZE_32MBIT_8M_8M;
flash_rom_set_size_type(flash_size);
break;
*/
default:
// Unknown flash size.
result = false;
break;
case FLASH_SIZE_1MBYTE: size_code = SPI_SIZE_1MB; break;
case FLASH_SIZE_2MBYTE: size_code = SPI_SIZE_2MB; break;
case FLASH_SIZE_4MBYTE: size_code = SPI_SIZE_4MB; break;
case FLASH_SIZE_8MBYTE: size_code = SPI_SIZE_8MB; break;
case FLASH_SIZE_16MBYTE: size_code = SPI_SIZE_16MB; break;
default: ok = false; break;
}
return result;
if (ok)
ok = flash_rom_set_size_type (size_code);
return ok;
}
uint16_t flash_rom_get_sec_num(void)
{
//static uint16_t sec_num = 0;
// return flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE);
// printf("\nflash_rom_get_size_byte()=%d\n", ( flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE) ));
// if( sec_num == 0 )
//{
// sec_num = 4 * 1024 * 1024 / (SPI_FLASH_SEC_SIZE);
//}
//return sec_num;
return ( flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE) );
return ( flash_rom_get_size_byte() / (SPI_FLASH_SEC_SIZE) );
}
uint8_t flash_rom_get_mode(void)
{
SPIFlashInfo spi_flash_info = flash_rom_getinfo();
switch (spi_flash_info.mode)
{
// Reserved for future use
case MODE_QIO:
break;
case MODE_QOUT:
break;
case MODE_DIO:
break;
case MODE_DOUT:
break;
}
return spi_flash_info.mode;
return flash_load_rom_header ().spi_mode;
}
uint32_t flash_rom_get_speed(void)
{
uint32_t speed = 0;
SPIFlashInfo spi_flash_info = flash_rom_getinfo();
switch (spi_flash_info.speed)
{
case SPEED_40MHZ:
// 40MHz
speed = 40000000;
break;
case SPEED_26MHZ:
//26.7MHz
speed = 26700000;
break;
case SPEED_20MHZ:
// 20MHz
speed = 20000000;
break;
case SPEED_80MHZ:
//80MHz
speed = 80000000;
break;
}
return speed;
switch (flash_load_rom_header ().spi_speed)
{
case SPI_SPEED_40M: return 40000000;
case SPI_SPEED_26M: return 26700000; // TODO: verify 26.7MHz
case SPI_SPEED_20M: return 20000000;
case SPI_SPEED_80M: return 80000000;
default: break;
}
return 0;
}
bool flash_rom_set_speed(uint32_t speed)
{
// Dangerous, here are dinosaur infested!!!!!
// Reboot required!!!
// If you don't know what you're doing, your nodemcu may turn into stone ...
NODE_DBG("\nBEGIN SET FLASH HEADER\n");
uint8_t *data = malloc (SPI_FLASH_SEC_SIZE);
if (!data)
return false;
uint8_t speed_type = SPEED_40MHZ;
if (speed < 26700000)
{
speed_type = SPEED_20MHZ;
}
else if (speed < 40000000)
{
speed_type = SPEED_26MHZ;
}
else if (speed < 80000000)
{
speed_type = SPEED_40MHZ;
}
else if (speed >= 80000000)
{
speed_type = SPEED_80MHZ;
}
if (SPI_FLASH_RESULT_OK == spi_flash_read(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
{
((SPIFlashInfo *)(&data[0]))->speed = speed_type;
if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector(0 * SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nERASE SUCCESS\n");
}
if (SPI_FLASH_RESULT_OK == spi_flash_write(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nWRITE SUCCESS, %u\n", speed_type);
}
}
free (data);
NODE_DBG("\nEND SET FLASH HEADER\n");
return true;
}
uint8_t byte_of_aligned_array(const uint8_t *aligned_array, uint32_t index)
{
if ( (((uint32_t)aligned_array) % 4) != 0 )
{
NODE_DBG("aligned_array is not 4-byte aligned.\n");
return 0;
}
volatile uint32_t v = ((uint32_t *)aligned_array)[ index / 4 ];
uint8_t *p = (uint8_t *) (&v);
return p[ (index % 4) ];
}
uint16_t word_of_aligned_array(const uint16_t *aligned_array, uint32_t index)
{
if ( (((uint32_t)aligned_array) % 4) != 0 )
{
NODE_DBG("aligned_array is not 4-byte aligned.\n");
return 0;
}
volatile uint32_t v = ((uint32_t *)aligned_array)[ index / 2 ];
uint16_t *p = (uint16_t *) (&v);
return (index % 2 == 0) ? p[ 0 ] : p[ 1 ];
// return p[ (index % 2) ]; // -- why error???
// (byte_of_aligned_array((uint8_t *)aligned_array, index * 2 + 1) << 8) | byte_of_aligned_array((uint8_t *)aligned_array, index * 2);
}
// uint8_t flash_rom_get_checksum(void)
// {
// // SPIFlashInfo spi_flash_info ICACHE_STORE_ATTR = flash_rom_getinfo();
// // uint32_t address = sizeof(spi_flash_info) + spi_flash_info.segment_size;
// // uint32_t address_aligned_4bytes = (address + 3) & 0xFFFFFFFC;
// // uint8_t buffer[64] = {0};
// // spi_flash_read(address, (uint32 *) buffer, 64);
// // uint8_t i = 0;
// // printf("\nBEGIN DUMP\n");
// // for (i = 0; i < 64; i++)
// // {
// // printf("%02x," , buffer[i]);
// // }
// // i = (address + 0x10) & 0x10 - 1;
// // printf("\nSIZE:%d CHECK SUM:%02x\n", spi_flash_info.segment_size, buffer[i]);
// // printf("\nEND DUMP\n");
// // return buffer[0];
// return 0;
// }
// uint8_t flash_rom_calc_checksum(void)
// {
// return 0;
// }

96
components/platform/include/flash_api.h
View File

@ -1,100 +1,20 @@
#ifndef __FLASH_API_H__
#define __FLASH_API_H__
#include "rom/spi_flash.h"
#include "platform.h"
#define FLASH_SIZE_2MBIT (2 * 1024 * 1024)
#define FLASH_SIZE_4MBIT (4 * 1024 * 1024)
#define FLASH_SIZE_8MBIT (8 * 1024 * 1024)
#define FLASH_SIZE_16MBIT (16 * 1024 * 1024)
#define FLASH_SIZE_32MBIT (32 * 1024 * 1024)
#define FLASH_SIZE_64MBIT (64 * 1024 * 1024)
#define FLASH_SIZE_128MBIT (128 * 1024 * 1024)
#define FLASH_SIZE_1MBYTE ( 1 * 1024 * 1024)
#define FLASH_SIZE_2MBYTE ( 2 * 1024 * 1024)
#define FLASH_SIZE_4MBYTE ( 4 * 1024 * 1024)
#define FLASH_SIZE_8MBYTE ( 8 * 1024 * 1024)
#define FLASH_SIZE_16MBYTE (16 * 1024 * 1024)
#define FLASH_SIZE_256KBYTE (FLASH_SIZE_2MBIT / 8)
#define FLASH_SIZE_512KBYTE (FLASH_SIZE_4MBIT / 8)
#define FLASH_SIZE_1MBYTE (FLASH_SIZE_8MBIT / 8)
#define FLASH_SIZE_2MBYTE (FLASH_SIZE_16MBIT / 8)
#define FLASH_SIZE_4MBYTE (FLASH_SIZE_32MBIT / 8)
#define FLASH_SIZE_8MBYTE (FLASH_SIZE_64MBIT / 8)
#define FLASH_SIZE_16MBYTE (FLASH_SIZE_128MBIT/ 8)
# define FLASH_SAFEMODE_ENTER() do{}while(0)
# define FLASH_SAFEMODE_LEAVE() do{}while(0)
/******************************************************************************
* ROM Function definition
* Note: It is unsafe to use ROM function, but it may efficient.
* SPIEraseSector
* SpiFlashOpResult SPIEraseSector(uint16 sec);
* The 1st parameter is flash sector number.
* Note: Must disable cache read before using it.
* SPIRead
* SpiFlashOpResult SPIRead(uint32_t src_addr, uint32_t *des_addr, uint32_t size);
* The 1st parameter is source addresses.
* The 2nd parameter is destination addresses.
* The 3rd parameter is size.
* Note: Must disable cache read before using it.
* SPIWrite
* SpiFlashOpResult SPIWrite(uint32_t des_addr, uint32_t *src_addr, uint32_t size);
* The 1st parameter is destination addresses.
* The 2nd parameter is source addresses.
* The 3rd parameter is size.
* Note: Must disable cache read before using it.
*******************************************************************************/
typedef struct
{
uint8_t header_magic;
uint8_t segment_count;
enum
{
MODE_QIO = 0,
MODE_QOUT = 1,
MODE_DIO = 2,
MODE_DOUT = 15,
} mode : 8;
enum
{
SPEED_40MHZ = 0,
SPEED_26MHZ = 1,
SPEED_20MHZ = 2,
SPEED_80MHZ = 15,
} speed : 4;
enum
{
SIZE_4MBIT = 0,
SIZE_2MBIT = 1,
SIZE_8MBIT = 2,
SIZE_16MBIT = 3,
SIZE_32MBIT = 4,
SIZE_16MBIT_8M_8M = 5,
SIZE_32MBIT_8M_8M = 6,
} size : 4;
uint32_t entry_point;
uint32_t memory_offset;
uint32_t segment_size;
} PLATFORM_ALIGNMENT_PACKED SPIFlashInfo;
uint32_t flash_detect_size_byte(void);
uint32_t flash_safe_get_size_byte(void);
uint16_t flash_safe_get_sec_num(void);
SpiFlashOpResult flash_safe_read(uint32 src_addr, uint32 *des_addr, uint32 size);
SpiFlashOpResult flash_safe_write(uint32 des_addr, uint32 *src_addr, uint32 size);
SpiFlashOpResult flash_safe_erase_sector(uint16 sec);
SPIFlashInfo flash_rom_getinfo(void);
uint8_t flash_rom_get_size_type(void);
uint32_t flash_rom_get_size_byte(void);
bool flash_rom_set_size_type(uint8_t);
bool flash_rom_set_size_byte(uint32_t);
bool flash_rom_set_size_byte(uint32_t);
uint16_t flash_rom_get_sec_num(void);
uint8_t flash_rom_get_mode(void);
uint8_t flash_rom_get_mode(void);
uint32_t flash_rom_get_speed(void);
uint8_t byte_of_aligned_array(const uint8_t* aligned_array, uint32_t index);
uint16_t word_of_aligned_array(const uint16_t *aligned_array, uint32_t index);
// uint8_t flash_rom_get_checksum(void);
// uint8_t flash_rom_calc_checksum(void);
#endif // __FLASH_API_H__

12
components/platform/platform_flash.c
View File

@ -175,7 +175,7 @@ uint32_t platform_flash_read( void *to, uint32_t fromaddr, uint32_t size )
*/
uint32_t platform_s_flash_write( const void *from, uint32_t toaddr, uint32_t size )
{
SpiFlashOpResult r;
esp_err_t r;
const uint32_t blkmask = INTERNAL_FLASH_WRITE_UNIT_SIZE - 1;
uint32_t *apbuf = NULL;
uint32_t fromaddr = (uint32_t)from;
@ -188,7 +188,7 @@ uint32_t platform_s_flash_write( const void *from, uint32_t toaddr, uint32_t siz
r = flash_write(toaddr, apbuf?(uint32 *)apbuf:(uint32 *)from, size);
if(apbuf)
free(apbuf);
if(SPI_FLASH_RESULT_OK == r)
if(ESP_OK == r)
return size;
else{
NODE_ERR( "ERROR in flash_write: r=%d at %08X\n", ( int )r, ( unsigned )toaddr);
@ -207,7 +207,7 @@ uint32_t platform_s_flash_read( void *to, uint32_t fromaddr, uint32_t size )
if (size==0)
return 0;
SpiFlashOpResult r;
esp_err_t r;
const uint32_t blkmask = (INTERNAL_FLASH_READ_UNIT_SIZE - 1);
if( ((uint32_t)to) & blkmask )
@ -215,7 +215,7 @@ uint32_t platform_s_flash_read( void *to, uint32_t fromaddr, uint32_t size )
uint32_t size2=size-INTERNAL_FLASH_READ_UNIT_SIZE;
uint32* to2=(uint32*)((((uint32_t)to)&(~blkmask))+INTERNAL_FLASH_READ_UNIT_SIZE);
r = flash_read(fromaddr, to2, size2);
if(SPI_FLASH_RESULT_OK == r)
if(ESP_OK == r)
{
memmove(to,to2,size2);
char back[ INTERNAL_FLASH_READ_UNIT_SIZE ] __attribute__ ((aligned(INTERNAL_FLASH_READ_UNIT_SIZE)));
@ -226,7 +226,7 @@ uint32_t platform_s_flash_read( void *to, uint32_t fromaddr, uint32_t size )
else
r = flash_read(fromaddr, (uint32 *)to, size);
if(SPI_FLASH_RESULT_OK == r)
if(ESP_OK == r)
return size;
else{
NODE_ERR( "ERROR in flash_read: r=%d at %08X\n", ( int )r, ( unsigned )fromaddr);
@ -237,7 +237,7 @@ uint32_t platform_s_flash_read( void *to, uint32_t fromaddr, uint32_t size )
int platform_flash_erase_sector( uint32_t sector_id )
{
return flash_erase( sector_id ) == SPI_FLASH_RESULT_OK ? PLATFORM_OK : PLATFORM_ERR;
return flash_erase( sector_id ) == ESP_OK ? PLATFORM_OK : PLATFORM_ERR;
}