commit
4d5242e1b7
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@ -117,15 +117,10 @@ static int node_flashid( lua_State* L )
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// Lua: flashsize()
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static int node_flashsize( lua_State* L )
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{
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//uint32_t sz = 0;
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//if(lua_type(L, 1) == LUA_TNUMBER)
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//{
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// sz = luaL_checkinteger(L, 1);
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// if(sz > 0)
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// {
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// flash_set_size_byte(sz);
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// }
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//}
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if (lua_type(L, 1) == LUA_TNUMBER)
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{
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flash_rom_set_size_byte(luaL_checkinteger(L, 1));
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}
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#if defined(FLASH_SAFE_API)
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uint32_t sz = flash_safe_get_size_byte();
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#else
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@ -149,27 +149,21 @@ bool flash_rom_set_size_type(uint8_t size)
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// Dangerous, here are dinosaur infested!!!!!
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// Reboot required!!!
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// If you don't know what you're doing, your nodemcu may turn into stone ...
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#if defined(FLASH_SAFE_API)
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NODE_DBG("\nBEGIN SET FLASH HEADER\n");
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uint8_t data[SPI_FLASH_SEC_SIZE] ICACHE_STORE_ATTR;
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flash_safe_read(0, (uint32 *)data, sizeof(data));
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SPIFlashInfo *p_spi_flash_info = (SPIFlashInfo *)(data);
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p_spi_flash_info->size = size;
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flash_safe_erase_sector(0);
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flash_safe_write(0, (uint32 *)data, sizeof(data));
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// TODO: CHECKSUM Firmware
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//p_spi_flash_info = flash_rom_getinfo();
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//p_spi_flash_info->size = size;
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#else
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uint8_t data[SPI_FLASH_SEC_SIZE] ICACHE_STORE_ATTR;
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spi_flash_read(0, (uint32 *)data, sizeof(data));
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SPIFlashInfo *p_spi_flash_info = (SPIFlashInfo *)(data);
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p_spi_flash_info->size = size;
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spi_flash_erase_sector(0);
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spi_flash_write(0, (uint32 *)data, sizeof(data));
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// TODO: CHECKSUM Firmware
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//p_spi_flash_info = flash_rom_getinfo();
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//p_spi_flash_info->size = size;
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#endif // defined(FLASH_SAFE_API)
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if (SPI_FLASH_RESULT_OK == spi_flash_read(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
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{
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((SPIFlashInfo *)(&data[0]))->size = size;
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if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector(0 * SPI_FLASH_SEC_SIZE))
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{
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NODE_DBG("\nERASE SUCCESS\n");
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}
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if (SPI_FLASH_RESULT_OK == spi_flash_write(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
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{
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NODE_DBG("\nWRITE SUCCESS, %u\n", size);
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}
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}
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NODE_DBG("\nEND SET FLASH HEADER\n");
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return true;
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}
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@ -207,6 +201,16 @@ bool flash_rom_set_size_byte(uint32_t size)
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flash_size = SIZE_32MBIT;
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flash_rom_set_size_type(flash_size);
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break;
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case 8 * 1024 * 1024:
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// 64Mbit, 8MByte
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flash_size = SIZE_64MBIT;
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flash_rom_set_size_type(flash_size);
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break;
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case 16 * 1024 * 1024:
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// 128Mbit, 16MByte
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flash_size = SIZE_128MBIT;
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flash_rom_set_size_type(flash_size);
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break;
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default:
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// Unknown flash size.
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result = false;
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@ -272,6 +276,46 @@ uint32_t flash_rom_get_speed(void)
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return speed;
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}
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bool flash_rom_set_speed(uint32_t speed)
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{
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// Dangerous, here are dinosaur infested!!!!!
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// Reboot required!!!
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// If you don't know what you're doing, your nodemcu may turn into stone ...
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NODE_DBG("\nBEGIN SET FLASH HEADER\n");
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uint8_t data[SPI_FLASH_SEC_SIZE] ICACHE_STORE_ATTR;
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uint8_t speed_type = SPEED_40MHZ;
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if (speed < 26700000)
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{
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speed_type = SPEED_20MHZ;
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}
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else if (speed < 40000000)
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{
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speed_type = SPEED_26MHZ;
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}
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else if (speed < 80000000)
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{
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speed_type = SPEED_40MHZ;
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}
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else if (speed >= 80000000)
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{
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speed_type = SPEED_80MHZ;
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}
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if (SPI_FLASH_RESULT_OK == spi_flash_read(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
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{
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((SPIFlashInfo *)(&data[0]))->speed = speed_type;
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if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector(0 * SPI_FLASH_SEC_SIZE))
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{
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NODE_DBG("\nERASE SUCCESS\n");
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}
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if (SPI_FLASH_RESULT_OK == spi_flash_write(0, (uint32 *)data, SPI_FLASH_SEC_SIZE))
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{
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NODE_DBG("\nWRITE SUCCESS, %u\n", speed_type);
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}
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}
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NODE_DBG("\nEND SET FLASH HEADER\n");
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return true;
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}
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bool flash_init_data_written(void)
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{
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// FLASH SEC - 4
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@ -356,3 +400,28 @@ uint8_t byte_of_aligned_array(const uint8_t *aligned_array, uint32_t index)
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uint8_t *p = (uint8_t *) (&v);
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return p[ (index % 4) ];
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}
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// uint8_t flash_rom_get_checksum(void)
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// {
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// // SPIFlashInfo spi_flash_info ICACHE_STORE_ATTR = flash_rom_getinfo();
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// // uint32_t address = sizeof(spi_flash_info) + spi_flash_info.segment_size;
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// // uint32_t address_aligned_4bytes = (address + 3) & 0xFFFFFFFC;
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// // uint8_t buffer[64] = {0};
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// // spi_flash_read(address, (uint32 *) buffer, 64);
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// // uint8_t i = 0;
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// // c_printf("\nBEGIN DUMP\n");
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// // for (i = 0; i < 64; i++)
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// // {
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// // c_printf("%02x," , buffer[i]);
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// // }
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// // i = (address + 0x10) & 0x10 - 1;
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// // c_printf("\nSIZE:%d CHECK SUM:%02x\n", spi_flash_info.segment_size, buffer[i]);
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// // c_printf("\nEND DUMP\n");
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// // return buffer[0];
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// return 0;
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// }
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// uint8_t flash_rom_calc_checksum(void)
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// {
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// return 0;
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// }
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@ -57,8 +57,8 @@ do { \
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typedef struct
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{
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uint8_t e9;
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uint8_t segments;
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uint8_t header_magic;
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uint8_t segment_count;
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enum
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{
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MODE_QIO = 0,
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@ -83,6 +83,9 @@ typedef struct
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SIZE_64MBIT = 5,
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SIZE_128MBIT = 6,
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} size : 4;
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uint32_t entry_point;
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uint32_t memory_offset;
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uint32_t segment_size;
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} ICACHE_STORE_TYPEDEF_ATTR SPIFlashInfo;
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uint32_t flash_detect_size_byte(void);
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@ -104,5 +107,7 @@ bool flash_init_data_default(void);
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bool flash_init_data_blank(void);
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bool flash_self_destruct(void);
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uint8_t byte_of_aligned_array(const uint8_t* aligned_array, uint32_t index);
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// uint8_t flash_rom_get_checksum(void);
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// uint8_t flash_rom_calc_checksum(void);
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#endif // __FLASH_API_H__
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@ -61,6 +61,18 @@ void nodemcu_init(void)
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return;
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}
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#if defined(FLASH_SAFE_API)
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if( flash_safe_get_size_byte() != flash_rom_get_size_byte()) {
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NODE_ERR("Self adjust flash size.\n");
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// Fit hardware real flash size.
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flash_rom_set_size_byte(flash_safe_get_size_byte());
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// Flash init data at FLASHSIZE - 0x04000 Byte.
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flash_init_data_default();
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// Flash blank data at FLASHSIZE - 0x02000 Byte.
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flash_init_data_blank();
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}
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#endif // defined(FLASH_SAFE_API)
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if( !flash_init_data_written() ){
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NODE_ERR("Restore init data.\n");
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// Flash init data at FLASHSIZE - 0x04000 Byte.
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