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Update to the released version of idf4.4 (#3498) 

* Update to the released version of idf4.4

* Try to get the CI Build to work in all cases
This commit is contained in:
Philip Gladstone 2022-01-25 20:54:17 -05:00 committed by GitHub
parent 670bf2d6a6
commit 8f9295b09e
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 13 additions and 9 deletions
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9
components/modules/node.c
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@ -106,14 +106,17 @@ static int node_bootreason( lua_State *L)
case EXT_CPU_RESET: case EXT_CPU_RESET:
#endif #endif
case DEEPSLEEP_RESET: case DEEPSLEEP_RESET:
#if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32C3) #if defined(CONFIG_IDF_TARGET_ESP32)
case SDIO_RESET: case SDIO_RESET:
#endif #endif
#if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) #if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32C3)
case GLITCH_RTC_RESET: case GLITCH_RTC_RESET:
#endif #endif
#if defined(CONFIG_IDF_TARGET_ESP32S3) #if defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32C3)
case EFUSE_RESET: case EFUSE_RESET:
case USB_UART_CHIP_RESET:
case USB_JTAG_CHIP_RESET:
case POWER_GLITCH_RESET:
#endif #endif
case TG0WDT_SYS_RESET: case TG0WDT_SYS_RESET:
case TG1WDT_SYS_RESET: case TG1WDT_SYS_RESET:

11
components/modules/pulsecnt.c
View File

@ -19,6 +19,7 @@ CONDITIONS OF ANY KIND, either express or implied.
#include "platform.h" #include "platform.h"
#include "task/task.h" #include "task/task.h"
#include "driver/pcnt.h" #include "driver/pcnt.h"
#include "soc/pcnt_struct.h"
#include "esp_log.h" #include "esp_log.h"
#include "lextra.h" #include "lextra.h"
@ -135,17 +136,17 @@ static void pulsecnt_task(task_param_t param, task_prio_t prio)
/*0: positive value to zero; 1: negative value to zero; 2: counter value negative ; 3: counter value positive*/ /*0: positive value to zero; 1: negative value to zero; 2: counter value negative ; 3: counter value positive*/
// uint8_t moving_to = status & 0x00000003u; // get first two bits // uint8_t moving_to = status & 0x00000003u; // get first two bits
if (status & PCNT_STATUS_THRES1_M) { if (status & PCNT_EVT_THRES_1) {
// printf("THRES1 EVT\n"); // printf("THRES1 EVT\n");
thr1 = true; thr1 = true;
// evt_count = pc->thresh1; // evt_count = pc->thresh1;
} }
if (status & PCNT_STATUS_THRES0_M) { if (status & PCNT_EVT_THRES_0) {
// printf("THRES0 EVT\n"); // printf("THRES0 EVT\n");
thr0 = true; thr0 = true;
// evt_count = pc->thresh0; // evt_count = pc->thresh0;
} }
if (status & PCNT_STATUS_L_LIM_M) { if (status & PCNT_EVT_L_LIM) {
// printf("L_LIM EVT\n"); // printf("L_LIM EVT\n");
l_lim = true; l_lim = true;
/* /*
@ -164,7 +165,7 @@ static void pulsecnt_task(task_param_t param, task_prio_t prio)
} }
*/ */
} }
if (status & PCNT_STATUS_H_LIM_M) { if (status & PCNT_EVT_H_LIM) {
// printf("H_LIM EVT\n"); // printf("H_LIM EVT\n");
h_lim = true; h_lim = true;
/* /*
@ -183,7 +184,7 @@ static void pulsecnt_task(task_param_t param, task_prio_t prio)
} }
*/ */
} }
if (status & PCNT_STATUS_ZERO_M) { if (status & PCNT_EVT_ZERO) {
// printf("ZERO EVT\n"); // printf("ZERO EVT\n");
zero = true; zero = true;
// evt_count = 0; // evt_count = 0;

2
sdk/esp32-esp-idf

@ -1 +1 @@
Subproject commit a20df743f1c51e6d65b021ed2ffd3081a2feec64 Subproject commit d83021a6e8550b4d462e11d61aaab0214dc03f5a