Initial version of the hw_timer as part of the platform
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/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi)
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*
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* FileName: hw_timer.c
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*
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* Description: hw_timer driver
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*
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* Modification history:
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* 2014/5/1, v1.0 create this file.
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*
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* Adapted for NodeMCU 2016
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*
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* The owner parameter should be a unique value per module using this API
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* It could be a pointer to a bit of data or code
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* e.g. #define OWNER ((os_param_t) module_init)
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* where module_init is a function. For builtin modules, it might be
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* a small numeric value that is known not to clash.
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*******************************************************************************/
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#include "ets_sys.h"
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#include "os_type.h"
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#include "osapi.h"
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#include "hw_timer.h"
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#define FRC1_ENABLE_TIMER BIT7
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#define FRC1_AUTO_LOAD BIT6
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//TIMER PREDIVIDED MODE
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typedef enum {
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DIVIDED_BY_1 = 0, //timer clock
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DIVIDED_BY_16 = 4, //divided by 16
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DIVIDED_BY_256 = 8, //divided by 256
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} TIMER_PREDIVIDED_MODE;
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typedef enum { //timer interrupt mode
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TM_LEVEL_INT = 1, // level interrupt
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TM_EDGE_INT = 0, //edge interrupt
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} TIMER_INT_MODE;
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static os_param_t the_owner;
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static os_param_t callback_arg;
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static void (* user_hw_timer_cb)(os_param_t);
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#define VERIFY_OWNER(owner) if (owner != the_owner) { if (the_owner) { return 0; } the_owner = owner; }
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/******************************************************************************
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* FunctionName : platform_hw_timer_arm_us
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* Description : set a trigger timer delay for this timer.
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* Parameters : os_param_t owner
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* uint32 microseconds :
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* in autoload mode
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* 50 ~ 0x7fffff; for FRC1 source.
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* 100 ~ 0x7fffff; for NMI source.
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* in non autoload mode:
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* 10 ~ 0x7fffff;
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* Returns : true if it worked
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*******************************************************************************/
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bool ICACHE_RAM_ATTR platform_hw_timer_arm_ticks(os_param_t owner, uint32_t ticks)
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{
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VERIFY_OWNER(owner);
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RTC_REG_WRITE(FRC1_LOAD_ADDRESS, ticks);
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return 1;
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}
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bool ICACHE_RAM_ATTR platform_hw_timer_arm_us(os_param_t owner, uint32_t microseconds)
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{
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VERIFY_OWNER(owner);
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RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(microseconds));
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return 1;
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}
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/******************************************************************************
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* FunctionName : platform_hw_timer_set_func
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* Description : set the func, when trigger timer is up.
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* Parameters : os_param_t owner
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* void (* user_hw_timer_cb_set)(os_param_t):
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timer callback function
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* os_param_t arg
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* Returns : true if it worked
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*******************************************************************************/
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bool ICACHE_RAM_ATTR platform_hw_timer_set_func(os_param_t owner, void (* user_hw_timer_cb_set)(os_param_t), os_param_t arg)
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{
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VERIFY_OWNER(owner);
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callback_arg = arg;
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user_hw_timer_cb = user_hw_timer_cb_set;
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return 1;
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}
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static void ICACHE_RAM_ATTR hw_timer_isr_cb(void *arg)
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{
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if (user_hw_timer_cb != NULL) {
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(*(user_hw_timer_cb))(callback_arg);
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}
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}
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static void ICACHE_RAM_ATTR hw_timer_nmi_cb(void)
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{
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if (user_hw_timer_cb != NULL) {
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(*(user_hw_timer_cb))(callback_arg);
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}
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}
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/******************************************************************************
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* FunctionName : platform_hw_timer_init
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* Description : initialize the hardware isr timer
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* Parameters : os_param_t owner
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* FRC1_TIMER_SOURCE_TYPE source_type:
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* FRC1_SOURCE, timer use frc1 isr as isr source.
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* NMI_SOURCE, timer use nmi isr as isr source.
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* bool autoload:
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* 0, not autoload,
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* 1, autoload mode,
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* Returns : true if it worked
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*******************************************************************************/
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bool platform_hw_timer_init(os_param_t owner, FRC1_TIMER_SOURCE_TYPE source_type, bool autoload)
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{
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VERIFY_OWNER(owner);
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if (autoload) {
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RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
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FRC1_AUTO_LOAD | DIVIDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
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} else {
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RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
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DIVIDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
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}
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if (source_type == NMI_SOURCE) {
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ETS_FRC_TIMER1_NMI_INTR_ATTACH(hw_timer_nmi_cb);
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} else {
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ETS_FRC_TIMER1_INTR_ATTACH(hw_timer_isr_cb, NULL);
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}
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TM1_EDGE_INT_ENABLE();
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ETS_FRC1_INTR_ENABLE();
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return 1;
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}
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/******************************************************************************
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* FunctionName : platform_hw_timer_close
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* Description : ends use of the hardware isr timer
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* Parameters : os_param_t owner
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* Returns : true if it worked
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*******************************************************************************/
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bool ICACHE_RAM_ATTR platform_hw_timer_close(os_param_t owner)
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{
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VERIFY_OWNER(owner);
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/* Set no reload mode */
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RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
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DIVIDED_BY_16 | TM_EDGE_INT);
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TM1_EDGE_INT_DISABLE();
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user_hw_timer_cb = NULL;
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return 1;
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}
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@ -0,0 +1,27 @@
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#ifndef _HW_TIMER_H
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#define _HW_TIMER_H
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#define US_TO_RTC_TIMER_TICKS(t) \
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((t) ? \
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(((t) > 0x35A) ? \
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(((t)>>2) * ((APB_CLK_FREQ>>4)/250000) + ((t)&0x3) * ((APB_CLK_FREQ>>4)/1000000)) : \
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(((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \
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0)
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typedef enum {
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FRC1_SOURCE = 0,
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NMI_SOURCE = 1,
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} FRC1_TIMER_SOURCE_TYPE;
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bool ICACHE_RAM_ATTR platform_hw_timer_arm_ticks(os_param_t owner, uint32_t ticks);
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bool ICACHE_RAM_ATTR platform_hw_timer_arm_us(os_param_t owner, uint32_t microseconds);
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bool ICACHE_RAM_ATTR platform_hw_timer_set_func(os_param_t owner, void (* user_hw_timer_cb_set)(os_param_t), os_param_t arg);
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bool platform_hw_timer_init(os_param_t owner, FRC1_TIMER_SOURCE_TYPE source_type, bool autoload);
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bool ICACHE_RAM_ATTR platform_hw_timer_close(os_param_t owner);
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#endif
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@ -8,6 +8,8 @@ int atoi(const char *nptr);
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int os_printf(const char *format, ...) __attribute__ ((format (printf, 1, 2)));
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int os_printf_plus(const char *format, ...) __attribute__ ((format (printf, 1, 2)));
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void NmiTimSetFunc(void (*func)(void));
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#include_next "osapi.h"
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#endif
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