diff --git a/Makefile b/Makefile index 99632ea7..1be71fb0 100644 --- a/Makefile +++ b/Makefile @@ -54,6 +54,7 @@ INCLUDE_DIRS=\ $(SDKDIR)/include/espressif \ $(SDKDIR)/include/espressif/$(TARGET) \ $(SDKDIR)/include/$(TARGET) \ + $(SDKDIR)/include/$(TARGET)/uart \ $(SDKDIR)/include/lwip \ $(SDKDIR)/include/lwip/ipv4 \ $(SDKDIR)/include/lwip/ipv6 \ diff --git a/app/driver/Makefile b/app/driver/Makefile index dfc59989..fdf818f1 100644 --- a/app/driver/Makefile +++ b/app/driver/Makefile @@ -38,7 +38,7 @@ STD_CFLAGS=-std=gnu11 -Wimplicit # Required for each makefile to inherit from the parent # -INCLUDES := $(INCLUDES) -I $(PDIR)include +INCLUDES := $(INCLUDES) -I $(PDIR)include -I ../include/driver INCLUDES += -I ./ INCLUDES += -I ../platform PDIR := ../$(PDIR) diff --git a/app/driver/readline.c b/app/driver/readline.c deleted file mode 100644 index 64cd0d08..00000000 --- a/app/driver/readline.c +++ /dev/null @@ -1,111 +0,0 @@ -#include "ets_sys.h" -#include "os_type.h" -#include "osapi.h" -#include "driver/uart.h" -#include "c_types.h" - -LOCAL os_timer_t readline_timer; - -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; - -#define uart_putc uart0_putc - -bool uart_getc(char *c){ - RcvMsgBuff *pRxBuff = &(UartDev.rcv_buff); - if(pRxBuff->pWritePos == pRxBuff->pReadPos){ // empty - return false; - } - // ETS_UART_INTR_DISABLE(); - ETS_INTR_LOCK(); - *c = (char)*(pRxBuff->pReadPos); - if (pRxBuff->pReadPos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) { - pRxBuff->pReadPos = pRxBuff->pRcvMsgBuff ; - } else { - pRxBuff->pReadPos++; - } - // ETS_UART_INTR_ENABLE(); - ETS_INTR_UNLOCK(); - return true; -} - -#if 0 -int readline4lua(const char *prompt, char *buffer, int length){ - char ch; - int line_position; - -start: - /* show prompt */ - uart0_sendStr(prompt); - - line_position = 0; - os_memset(buffer, 0, length); - while (1) - { - while (uart_getc(&ch)) - { - /* handle CR key */ - if (ch == '\r') - { - char next; - if (uart_getc(&next)) - ch = next; - } - /* backspace key */ - else if (ch == 0x7f || ch == 0x08) - { - if (line_position > 0) - { - uart_putc(0x08); - uart_putc(' '); - uart_putc(0x08); - line_position--; - } - buffer[line_position] = 0; - continue; - } - /* EOF(ctrl+d) */ - else if (ch == 0x04) - { - if (line_position == 0) - /* No input which makes lua interpreter close */ - return 0; - else - continue; - } - - /* end of line */ - if (ch == '\r' || ch == '\n') - { - buffer[line_position] = 0; - uart_putc('\n'); - if (line_position == 0) - { - /* Get a empty line, then go to get a new line */ - goto start; - } - else - { - return line_position; - } - } - - /* other control character or not an acsii character */ - if (ch < 0x20 || ch >= 0x80) - { - continue; - } - - /* echo */ - uart_putc(ch); - buffer[line_position] = ch; - ch = 0; - line_position++; - - /* it's a large line, discard it */ - if (line_position >= length) - line_position = 0; - } - } -} -#endif diff --git a/app/driver/uart.c b/app/driver/uart.c index 59d0fc8b..2d11e3cd 100755 --- a/app/driver/uart.c +++ b/app/driver/uart.c @@ -1,341 +1,378 @@ -/****************************************************************************** - * Copyright 2013-2014 Espressif Systems (Wuxi) +/* + * ESPRSSIF MIT License * - * FileName: uart.c + * Copyright (c) 2015 + * 2016 DiUS Computing Pty Ltd * - * Description: Two UART mode configration and interrupt handler. - * Check your hardware connection while use this mode. + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266/ESP32 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: * - * Modification history: - * 2014/3/12, v1.0 create this file. -*******************************************************************************/ -#include "ets_sys.h" -#include "osapi.h" -#include "driver/uart.h" + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "freertos/FreeRTOS.h" +#include "freertos/queue.h" + +#if defined(__ESP32__) +# include "freertos/xtensa_api.h" +# define ETS_UART_INTR_ENABLE() xt_ints_on(1 << ETS_UART_INUM) +# define ETS_UART_INTR_DISABLE() xt_ints_off(1 << ETS_UART_INUM) +#endif + +#if defined(__ESP8266__) +# include "rom.h" +# include "ioswap.h" +# define FUNC_U0RXD 0 +# define FUNC_U0CTS 4 +# define os_printf_isr(...) do {} while (0) +# define ETS_UART_INTR_ENABLE() _xt_isr_unmask(1 << ETS_UART_INUM) +# define ETS_UART_INTR_DISABLE() _xt_isr_mask(1 << ETS_UART_INUM) +#endif + +#include "esp_common.h" +#include "uart.h" +#include "gpio.h" #include "task/task.h" -#include "user_config.h" -#include "user_interface.h" -#include "platform.h" +#include -#define UART0 0 -#define UART1 1 - -#ifndef FUNC_U0RXD -#define FUNC_U0RXD 0 -#endif -#ifndef FUNC_U0CTS -#define FUNC_U0CTS 4 -#endif +#define UART_INTR_MASK 0x1ff +#define UART_LINE_INV_MASK (0x3f << 19) -// For event signalling -static task_handle_t tsk = 0; +static xQueueHandle uartQ[2]; +static task_handle_t input_task = 0; -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; -static os_timer_t autobaud_timer; - -LOCAL void ICACHE_RAM_ATTR -uart0_rx_intr_handler(void *para); - -/****************************************************************************** - * FunctionName : uart_config - * Description : Internal used function - * UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled - * UART1 just used for debug output - * Parameters : uart_no, use UART0 or UART1 defined ahead - * Returns : NONE -*******************************************************************************/ -LOCAL void ICACHE_FLASH_ATTR -uart_config(uint8 uart_no) +void uart_tx_one_char(uint32_t uart, uint8_t TxChar) { - if (uart_no == UART1) { - PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); + while (true) { + uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S); + if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { + break; + } + } + WRITE_PERI_REG(UART_FIFO(uart) , TxChar); +} + + +static void uart1_write_char(char c) +{ + if (c == '\n') { + uart_tx_one_char(UART1, '\r'); + uart_tx_one_char(UART1, '\n'); + } else if (c == '\r') { } else { - /* rcv_buff size if 0x100 */ - ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff)); - PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); - PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U); - PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD); + uart_tx_one_char(UART1, c); + } +} + + +static void uart0_write_char(char c) +{ + if (c == '\n') { + uart_tx_one_char(UART0, '\r'); + uart_tx_one_char(UART0, '\n'); + } else if (c == '\r') { + } else { + uart_tx_one_char(UART0, c); + } +} + + +//================================================================= + +void UART_SetWordLength(UART_Port uart_no, UART_WordLength len) +{ + SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_BIT_NUM, len, UART_BIT_NUM_S); +} + + +void +UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num) +{ + SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_STOP_BIT_NUM, bit_num, UART_STOP_BIT_NUM_S); +} + + +void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) +{ + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK); + SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask); +} + + +void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) +{ + CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY | UART_PARITY_EN); + + if (Parity_mode == USART_Parity_None) { + } else { + SET_PERI_REG_MASK(UART_CONF0(uart_no), Parity_mode | UART_PARITY_EN); + } +} + + +void UART_SetBaudrate(UART_Port uart_no, uint32 baud_rate) +{ + uart_div_modify(uart_no, UART_CLK_FREQ / baud_rate); +} + + +//only when USART_HardwareFlowControl_RTS is set , will the rx_thresh value be set. +void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh) +{ + if (flow_ctrl & USART_HardwareFlowControl_RTS) { +#if defined(__ESP8266__) + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); +#elif defined(__ESP32__) + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_MTDO_U0RTS); +#endif + SET_PERI_REG_BITS(UART_CONF1(uart_no), UART_RX_FLOW_THRHD, rx_thresh, UART_RX_FLOW_THRHD_S); + SET_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); + } else { + CLEAR_PERI_REG_MASK(UART_CONF1(uart_no), UART_RX_FLOW_EN); } - uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); - - WRITE_PERI_REG(UART_CONF0(uart_no), ((UartDev.exist_parity & UART_PARITY_EN_M) << UART_PARITY_EN_S) //SET BIT AND PARITY MODE - | ((UartDev.parity & UART_PARITY_M) <> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) { - break; - } + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); +#elif defined(__ESP32__) + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD); +#endif } - WRITE_PERI_REG(UART_FIFO(uart) , TxChar); - return OK; + UART_SetFlowCtrl(uart_no, pUARTConfig->flow_ctrl, pUARTConfig->UART_RxFlowThresh); + UART_SetBaudrate(uart_no, pUARTConfig->baud_rate); + + WRITE_PERI_REG(UART_CONF0(uart_no), + ((pUARTConfig->parity == USART_Parity_None) ? 0x0 : (UART_PARITY_EN | pUARTConfig->parity)) + | (pUARTConfig->stop_bits << UART_STOP_BIT_NUM_S) + | (pUARTConfig->data_bits << UART_BIT_NUM_S) + | ((pUARTConfig->flow_ctrl & USART_HardwareFlowControl_CTS) ? UART_TX_FLOW_EN : 0x0) + | pUARTConfig->UART_InverseMask +#if defined(__ESP32__) + | UART_TICK_REF_ALWAYS_ON +#endif + ); + + UART_ResetFifo(uart_no); } -/****************************************************************************** - * FunctionName : uart1_write_char - * Description : Internal used function - * Do some special deal while tx char is '\r' or '\n' - * Parameters : char c - character to tx - * Returns : NONE -*******************************************************************************/ -LOCAL void ICACHE_FLASH_ATTR -uart1_write_char(char c) + +void UART_IntrConfig(UART_Port uart_no, const UART_IntrConfTypeDef *pUARTIntrConf) { - if (c == '\n') - { - uart_tx_one_char(UART1, '\r'); - uart_tx_one_char(UART1, '\n'); - } - else if (c == '\r') - { - } - else - { - uart_tx_one_char(UART1, c); - } + uint32 reg_val = 0; + UART_ClearIntrStatus(uart_no, UART_INTR_MASK); + reg_val = READ_PERI_REG(UART_CONF1(uart_no)); + + reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_RXFIFO_TOUT_INT_ENA) ? + ((((pUARTIntrConf->UART_RX_TimeOutIntrThresh)&UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S) | UART_RX_TOUT_EN) : 0); + + reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_RXFIFO_FULL_INT_ENA) ? + (((pUARTIntrConf->UART_RX_FifoFullIntrThresh)&UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) : 0); + + reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_TXFIFO_EMPTY_INT_ENA) ? + (((pUARTIntrConf->UART_TX_FifoEmptyIntrThresh)&UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) : 0); + + WRITE_PERI_REG(UART_CONF1(uart_no), reg_val); + CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_INTR_MASK); + SET_PERI_REG_MASK(UART_INT_ENA(uart_no), pUARTIntrConf->UART_IntrEnMask); } -/****************************************************************************** - * FunctionName : uart0_tx_buffer - * Description : use uart0 to transfer buffer - * Parameters : uint8 *buf - point to send buffer - * uint16 len - buffer len - * Returns : -*******************************************************************************/ -void ICACHE_FLASH_ATTR -uart0_tx_buffer(uint8 *buf, uint16 len) -{ - uint16 i; - for (i = 0; i < len; i++) - { - uart_tx_one_char(UART0, buf[i]); - } -} - -/****************************************************************************** - * FunctionName : uart0_sendStr - * Description : use uart0 to transfer buffer - * Parameters : uint8 *buf - point to send buffer - * uint16 len - buffer len - * Returns : -*******************************************************************************/ -void ICACHE_FLASH_ATTR uart0_sendStr(const char *str) -{ - while(*str) - { - // uart_tx_one_char(UART0, *str++); - uart0_putc(*str++); - } -} - -/****************************************************************************** - * FunctionName : uart0_putc - * Description : use uart0 to transfer char - * Parameters : uint8 c - send char - * Returns : -*******************************************************************************/ -void ICACHE_FLASH_ATTR uart0_putc(const char c) -{ - if (c == '\n') - { - uart_tx_one_char(UART0, '\r'); - uart_tx_one_char(UART0, '\n'); - } - else if (c == '\r') - { - } - else - { - uart_tx_one_char(UART0, c); - } -} - -/****************************************************************************** - * FunctionName : uart0_rx_intr_handler - * Description : Internal used function - * UART0 interrupt handler, add self handle code inside - * Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg - * Returns : NONE -*******************************************************************************/ -LOCAL void -uart0_rx_intr_handler(void *para) +static void uart0_rx_intr_handler(void *para) { /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents - * uart1 and uart0 respectively - */ - RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para; - uint8 RcvChar; - bool got_input = false; + * uart1 and uart0 respectively + */ + uint8 uart_no = UART0; // TODO: support UART1 as well + uint8 fifo_len = 0; + uint32 uart_intr_status = READ_PERI_REG(UART_INT_ST(uart_no)) ; - if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) { - return; - } + while (uart_intr_status != 0x0) { + if (UART_FRM_ERR_INT_ST == (uart_intr_status & UART_FRM_ERR_INT_ST)) { + //os_printf_isr("FRM_ERR\r\n"); + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR); + } else if (UART_RXFIFO_FULL_INT_ST == (uart_intr_status & UART_RXFIFO_FULL_INT_ST)) { + //os_printf_isr("full\r\n"); + fifo_len = (READ_PERI_REG(UART_STATUS(uart_no)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; - WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR); - - while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) { - RcvChar = READ_PERI_REG(UART_FIFO(UART0)) & 0xFF; - - /* you can add your handle code below.*/ - - *(pRxBuff->pWritePos) = RcvChar; - - // insert here for get one command line from uart - if (RcvChar == '\r' || RcvChar == '\n' ) { - pRxBuff->BuffState = WRITE_OVER; - } - - if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) { - // overflow ...we may need more error handle here. - pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ; - } else { - pRxBuff->pWritePos++; - } - - if (pRxBuff->pWritePos == pRxBuff->pReadPos){ // overflow one byte, need push pReadPos one byte ahead - if (pRxBuff->pReadPos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE)) { - pRxBuff->pReadPos = pRxBuff->pRcvMsgBuff ; - } else { - pRxBuff->pReadPos++; + for (int i = 0; i < fifo_len; ++i) + { + char c = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff; + if (uartQ[uart_no]) + xQueueSendToBackFromISR (uartQ[uart_no], &c, NULL); } + + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR); + //CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA|UART_RXFIFO_TOUT_INT_ENA); + } else if (UART_RXFIFO_TOUT_INT_ST == (uart_intr_status & UART_RXFIFO_TOUT_INT_ST)) { + //os_printf_isr("timeout\r\n"); + fifo_len = (READ_PERI_REG(UART_STATUS(uart_no)) >> UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT; + + for (int i = 0; i < fifo_len; ++i) + { + char c = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff; + if (uartQ[uart_no]) + xQueueSendToBackFromISR (uartQ[uart_no], &c, NULL); + } + + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_TOUT_INT_CLR); + } else if (UART_TXFIFO_EMPTY_INT_ST == (uart_intr_status & UART_TXFIFO_EMPTY_INT_ST)) { + //os_printf_isr("empty\n\r"); + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_TXFIFO_EMPTY_INT_CLR); + CLEAR_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_TXFIFO_EMPTY_INT_ENA); + } else if (UART_RXFIFO_OVF_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_OVF_INT_ST)) { + WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_OVF_INT_CLR); + //os_printf_isr("RX OVF!!\r\n"); + } else { + //skip } - got_input = true; + uart_intr_status = READ_PERI_REG(UART_INT_ST(uart_no)) ; } - if (got_input && tsk) - task_post_low (tsk, false); + if (fifo_len && input_task) + task_post_low (input_task, false); } -static void -uart_autobaud_timeout(void *timer_arg) + +void uart_init_uart0_console (const UART_ConfigTypeDef *config, task_handle_t tsk) { - uint32_t uart_no = (uint32_t) timer_arg; - uint32_t divisor = uart_baudrate_detect(uart_no, 1); - static int called_count = 0; + input_task = tsk; + uartQ[0] = xQueueCreate (0x100, sizeof (char)); - // Shut off after two minutes to stop wasting CPU cycles if insufficient input received - if (called_count++ > 10 * 60 * 2 || divisor) { - os_timer_disarm(&autobaud_timer); - } + UART_WaitTxFifoEmpty(UART0); - if (divisor) { - uart_div_modify(uart_no, divisor); - } -} + UART_ParamConfig(UART0, config); -static void -uart_init_autobaud(uint32_t uart_no) -{ - os_timer_setfn(&autobaud_timer, uart_autobaud_timeout, (void *) uart_no); - os_timer_arm(&autobaud_timer, 100, TRUE); -} + UART_IntrConfTypeDef uart_intr; + uart_intr.UART_IntrEnMask = + UART_RXFIFO_TOUT_INT_ENA | + UART_FRM_ERR_INT_ENA | + UART_RXFIFO_FULL_INT_ENA | + UART_TXFIFO_EMPTY_INT_ENA; + uart_intr.UART_RX_FifoFullIntrThresh = 10; + uart_intr.UART_RX_TimeOutIntrThresh = 2; + uart_intr.UART_TX_FifoEmptyIntrThresh = 20; + UART_IntrConfig(UART0, &uart_intr); -static void -uart_stop_autobaud() -{ - os_timer_disarm(&autobaud_timer); -} - -/****************************************************************************** - * FunctionName : uart_init - * Description : user interface for init uart - * Parameters : UartBautRate uart0_br - uart0 bautrate - * UartBautRate uart1_br - uart1 bautrate - * uint8 task_prio - task priority to signal on input - * task_handle_t tsk_input - task to notify - * Returns : NONE -*******************************************************************************/ -void ICACHE_FLASH_ATTR -uart_init(UartBautRate uart0_br, UartBautRate uart1_br, task_handle_t tsk_input) -{ - tsk = tsk_input; - - // rom use 74880 baut_rate, here reinitialize - UartDev.baut_rate = uart0_br; - uart_config(UART0); - UartDev.baut_rate = uart1_br; - uart_config(UART1); + UART_SetPrintPort(UART0); + UART_intr_handler_register(uart0_rx_intr_handler, NULL); ETS_UART_INTR_ENABLE(); -#ifdef BIT_RATE_AUTOBAUD - uart_init_autobaud(0); +} + + +bool uart0_getc (char *c) +{ + return (uartQ[UART0] && (xQueueReceive (uartQ[UART0], c, 0) == pdTRUE)); +} + + +void uart0_alt (bool on) +{ +#if defined(__ESP8266__) + if (on) + { + PIN_PULLUP_DIS(PERIPHS_IO_MUX_MTDO_U); + PIN_PULLUP_EN(PERIPHS_IO_MUX_MTCK_U); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_U0CTS); + // now make RTS/CTS behave as TX/RX + IOSWAP |= (1 << IOSWAPU0); + } + else + { + PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD); + PIN_PULLUP_EN(PERIPHS_IO_MUX_U0RXD_U); + PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD); + // now make RX/TX behave as TX/RX + IOSWAP &= ~(1 << IOSWAPU0); + } +#else + printf("Alternate UART0 pins not supported on this chip\n"); #endif } -void ICACHE_FLASH_ATTR -uart_setup(uint8 uart_no) -{ -#ifdef BIT_RATE_AUTOBAUD - uart_stop_autobaud(); -#endif - ETS_UART_INTR_DISABLE(); - uart_config(uart_no); - ETS_UART_INTR_ENABLE(); -} diff --git a/app/include/driver/uart.h b/app/include/driver/uart.h index b9c5b130..4522a64f 100755 --- a/app/include/driver/uart.h +++ b/app/include/driver/uart.h @@ -1,38 +1,61 @@ -#ifndef UART_APP_H -#define UART_APP_H +/* + * ESPRSSIF MIT License + * + * Copyright (c) 2015 + * + * Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP32 only, in which case, + * it is free of charge, to any person obtaining a copy of this software and associated + * documentation files (the "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the Software is furnished + * to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all copies or + * substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ +#ifndef __UART_H__ +#define __UART_H__ + +#include "c_types.h" /* for BIT(n) definition */ #include "uart_register.h" -#include "eagle_soc.h" -#include "c_types.h" -#include "os_type.h" #include "task/task.h" -#define RX_BUFF_SIZE 0x100 -#define TX_BUFF_SIZE 100 +#ifdef __cplusplus +extern "C" { +#endif typedef enum { - FIVE_BITS = 0x0, - SIX_BITS = 0x1, - SEVEN_BITS = 0x2, - EIGHT_BITS = 0x3 -} UartBitsNum4Char; + UART_WordLength_5b = 0x0, + UART_WordLength_6b = 0x1, + UART_WordLength_7b = 0x2, + UART_WordLength_8b = 0x3 +} UART_WordLength; typedef enum { - ONE_STOP_BIT = 0x1, - ONE_HALF_STOP_BIT = 0x2, - TWO_STOP_BIT = 0x3 -} UartStopBitsNum; + USART_StopBits_1 = 0x1, + USART_StopBits_1_5 = 0x2, + USART_StopBits_2 = 0x3, +} UART_StopBits; typedef enum { - NONE_BITS = 0x2, - ODD_BITS = 1, - EVEN_BITS = 0 -} UartParityMode; + UART0 = 0x0, + UART1 = 0x1, +} UART_Port; typedef enum { - STICK_PARITY_DIS = 0, - STICK_PARITY_EN = 1 -} UartExistParity; + USART_Parity_None = 0x2, + USART_Parity_Even = 0x0, + USART_Parity_Odd = 0x1 +} UART_ParityMode; typedef enum { BIT_RATE_300 = 300, @@ -47,67 +70,263 @@ typedef enum { BIT_RATE_74880 = 74880, BIT_RATE_115200 = 115200, BIT_RATE_230400 = 230400, - BIT_RATE_256000 = 256000, BIT_RATE_460800 = 460800, BIT_RATE_921600 = 921600, BIT_RATE_1843200 = 1843200, BIT_RATE_3686400 = 3686400, -} UartBautRate; +} UART_BautRate; //you can add any rate you need in this range typedef enum { - NONE_CTRL, - HARDWARE_CTRL, - XON_XOFF_CTRL -} UartFlowCtrl; + USART_HardwareFlowControl_None = 0x0, + USART_HardwareFlowControl_RTS = 0x1, + USART_HardwareFlowControl_CTS = 0x2, + USART_HardwareFlowControl_CTS_RTS = 0x3 +} UART_HwFlowCtrl; typedef enum { - EMPTY, - UNDER_WRITE, - WRITE_OVER -} RcvMsgBuffState; + UART_None_Inverse = 0x0, + UART_Rxd_Inverse = UART_RXD_INV, + UART_CTS_Inverse = UART_CTS_INV, + UART_Txd_Inverse = UART_TXD_INV, + UART_RTS_Inverse = UART_RTS_INV, +} UART_LineLevelInverse; typedef struct { - uint32 RcvBuffSize; - uint8 *pRcvMsgBuff; - uint8 *pWritePos; - uint8 *pReadPos; - uint8 TrigLvl; //JLU: may need to pad - RcvMsgBuffState BuffState; -} RcvMsgBuff; + UART_BautRate baud_rate; + UART_WordLength data_bits; + UART_ParityMode parity; // chip size in byte + UART_StopBits stop_bits; + UART_HwFlowCtrl flow_ctrl; + uint8 UART_RxFlowThresh ; + uint32 UART_InverseMask; +} UART_ConfigTypeDef; typedef struct { - uint32 TrxBuffSize; - uint8 *pTrxBuff; -} TrxMsgBuff; + uint32 UART_IntrEnMask; + uint8 UART_RX_TimeOutIntrThresh; + uint8 UART_TX_FifoEmptyIntrThresh; + uint8 UART_RX_FifoFullIntrThresh; +} UART_IntrConfTypeDef; -typedef enum { - BAUD_RATE_DET, - WAIT_SYNC_FRM, - SRCH_MSG_HEAD, - RCV_MSG_BODY, - RCV_ESC_CHAR, -} RcvMsgState; +//======================================= -typedef struct { - UartBautRate baut_rate; - UartBitsNum4Char data_bits; - UartExistParity exist_parity; - UartParityMode parity; // chip size in byte - UartStopBitsNum stop_bits; - UartFlowCtrl flow_ctrl; - RcvMsgBuff rcv_buff; - TrxMsgBuff trx_buff; - RcvMsgState rcv_state; - int received; - int buff_uart_no; //indicate which uart use tx/rx buffer -} UartDevice; +/** \defgroup Driver_APIs Driver APIs + * @brief Driver APIs + */ -void uart_init(UartBautRate uart0_br, UartBautRate uart1_br, task_handle_t sig_input); -void uart0_alt(uint8 on); -void uart0_sendStr(const char *str); -void uart0_putc(const char c); -void uart0_tx_buffer(uint8 *buf, uint16 len); -void uart_setup(uint8 uart_no); -STATUS uart_tx_one_char(uint8 uart, uint8 TxChar); +/** @addtogroup Driver_APIs + * @{ + */ + +/** \defgroup UART_Driver_APIs UART Driver APIs + * @brief UART driver APIs + */ + +/** @addtogroup UART_Driver_APIs + * @{ + */ + + +/** + * @brief Set UART baud rate. + * + * Example : uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate)); + * + * @param UART_Port uart_no : UART0 or UART1 + * @param uint16 div : frequency divider + * + * @return null + */ +void uart_div_modify(UART_Port uart_no, uint16 div); + +/** + * @brief Wait uart tx fifo empty, do not use it if tx flow control enabled. + * + * @param UART_Port uart_no : UART0 or UART1 + * + * @return null + */ +void UART_WaitTxFifoEmpty(UART_Port uart_no); //do not use if tx flow control enabled + +/** + * @brief Clear uart tx fifo and rx fifo. + * + * @param UART_Port uart_no : UART0 or UART1 + * + * @return null + */ +void UART_ResetFifo(UART_Port uart_no); + +/** + * @brief Clear uart interrupt flags. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param uint32 clr_mask : To clear the interrupt bits + * + * @return null + */ +void UART_ClearIntrStatus(UART_Port uart_no, uint32 clr_mask); + +/** + * @brief Enable uart interrupts . + * + * @param UART_Port uart_no : UART0 or UART1 + * @param uint32 ena_mask : To enable the interrupt bits + * + * @return null + */ +void UART_SetIntrEna(UART_Port uart_no, uint32 ena_mask); + +/** + * @brief Register an application-specific interrupt handler for Uarts interrupts. + * + * @param void *fn : interrupt handler for Uart interrupts. + * @param void *arg : interrupt handler's arg. + * + * @return null + */ +void UART_intr_handler_register(void *fn, void *arg); + +/** + * @brief Config from which serial output printf function. + * + * @param UART_Port uart_no : UART0 or UART1 + * + * @return null + */ +void UART_SetPrintPort(UART_Port uart_no); + +/** + * @brief Config Common parameters of serial ports. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_ConfigTypeDef *pUARTConfig : parameters structure + * + * @return null + */ +void UART_ParamConfig(UART_Port uart_no, const UART_ConfigTypeDef *pUARTConfig); + +/** + * @brief Config types of uarts. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_IntrConfTypeDef *pUARTIntrConf : parameters structure + * + * @return null + */ +void UART_IntrConfig(UART_Port uart_no, const UART_IntrConfTypeDef *pUARTIntrConf); + +/** + * @brief Config the length of the uart communication data bits. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_WordLength len : the length of the uart communication data bits + * + * @return null + */ +void UART_SetWordLength(UART_Port uart_no, UART_WordLength len); + +/** + * @brief Config the length of the uart communication stop bits. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_StopBits bit_num : the length uart communication stop bits + * + * @return null + */ +void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num); + +/** + * @brief Configure whether to open the parity. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_ParityMode Parity_mode : the enum of uart parity configuration + * + * @return null + */ +void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) ; + +/** + * @brief Configure the Baud rate. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param uint32 baud_rate : the Baud rate + * + * @return null + */ +void UART_SetBaudrate(UART_Port uart_no, uint32 baud_rate); + +/** + * @brief Configure Hardware flow control. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_HwFlowCtrl flow_ctrl : Hardware flow control mode + * @param uint8 rx_thresh : threshold of Hardware flow control + * + * @return null + */ +void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh); + +/** + * @brief Configure trigging signal of uarts. + * + * @param UART_Port uart_no : UART0 or UART1 + * @param UART_LineLevelInverse inverse_mask : Choose need to flip the IO + * + * @return null + */ +void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) ; + +/** + * @} + */ + +/** + * @} + */ + + + +/** + * Set up uart0 for NodeMCU console use. + * @param config The UART params to apply. + * @param tsk NodeMCU task to be notified when there is input pending. + */ +void uart_init_uart0_console (const UART_ConfigTypeDef *config, task_handle_t tsk); + + +/** + * Generic UART send interface. + * @param uart_no Which UART to send on (UART0 or UART1). + * @param c The character to send. + */ +void uart_tx_one_char (uint32_t uart_no, uint8_t c); + + +/** + * Switch (or unswitch) UART0 to the alternate pins. + * Currently only ESP8266. + * @param on True to use alternate RX/TX pins, false to use default pins. + */ +void uart0_alt (bool on); + + +/** + * Attempts to pull a character off the UART0 receive queue. + * @param c Where to stash the received character, if any. + * @returns True if a character was stored in @c, false if no char available. + */ +bool uart0_getc (char *c); + +/** + * Convenience/consistency wrapper for UART0 output. + * @param c The character to output. + */ +static inline void uart0_putc (char c) { uart_tx_one_char (UART0, c); } + + +#ifdef __cplusplus +} #endif +#endif diff --git a/app/include/driver/uart_register.h b/app/include/driver/uart_register.h deleted file mode 100755 index 21f670f7..00000000 --- a/app/include/driver/uart_register.h +++ /dev/null @@ -1,151 +0,0 @@ -//Generated at 2012-07-03 18:44:06 -/* - * Copyright (c) 2010 - 2011 Espressif System - * - */ - -#ifndef UART_REGISTER_H_INCLUDED -#define UART_REGISTER_H_INCLUDED -#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00) -//version value:32'h062000 - -#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0) -#define UART_RXFIFO_RD_BYTE 0x000000FF -#define UART_RXFIFO_RD_BYTE_S 0 - -#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4) -#define UART_RXFIFO_TOUT_INT_RAW (BIT(8)) -#define UART_BRK_DET_INT_RAW (BIT(7)) -#define UART_CTS_CHG_INT_RAW (BIT(6)) -#define UART_DSR_CHG_INT_RAW (BIT(5)) -#define UART_RXFIFO_OVF_INT_RAW (BIT(4)) -#define UART_FRM_ERR_INT_RAW (BIT(3)) -#define UART_PARITY_ERR_INT_RAW (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1)) -#define UART_RXFIFO_FULL_INT_RAW (BIT(0)) - -#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8) -#define UART_RXFIFO_TOUT_INT_ST (BIT(8)) -#define UART_BRK_DET_INT_ST (BIT(7)) -#define UART_CTS_CHG_INT_ST (BIT(6)) -#define UART_DSR_CHG_INT_ST (BIT(5)) -#define UART_RXFIFO_OVF_INT_ST (BIT(4)) -#define UART_FRM_ERR_INT_ST (BIT(3)) -#define UART_PARITY_ERR_INT_ST (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_ST (BIT(1)) -#define UART_RXFIFO_FULL_INT_ST (BIT(0)) - -#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC) -#define UART_RXFIFO_TOUT_INT_ENA (BIT(8)) -#define UART_BRK_DET_INT_ENA (BIT(7)) -#define UART_CTS_CHG_INT_ENA (BIT(6)) -#define UART_DSR_CHG_INT_ENA (BIT(5)) -#define UART_RXFIFO_OVF_INT_ENA (BIT(4)) -#define UART_FRM_ERR_INT_ENA (BIT(3)) -#define UART_PARITY_ERR_INT_ENA (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1)) -#define UART_RXFIFO_FULL_INT_ENA (BIT(0)) - -#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10) -#define UART_RXFIFO_TOUT_INT_CLR (BIT(8)) -#define UART_BRK_DET_INT_CLR (BIT(7)) -#define UART_CTS_CHG_INT_CLR (BIT(6)) -#define UART_DSR_CHG_INT_CLR (BIT(5)) -#define UART_RXFIFO_OVF_INT_CLR (BIT(4)) -#define UART_FRM_ERR_INT_CLR (BIT(3)) -#define UART_PARITY_ERR_INT_CLR (BIT(2)) -#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1)) -#define UART_RXFIFO_FULL_INT_CLR (BIT(0)) - -#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14) -#define UART_CLKDIV_CNT 0x000FFFFF -#define UART_CLKDIV_S 0 - -#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18) -#define UART_GLITCH_FILT 0x000000FF -#define UART_GLITCH_FILT_S 8 -#define UART_AUTOBAUD_EN (BIT(0)) - -#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C) -#define UART_TXD (BIT(31)) -#define UART_RTSN (BIT(30)) -#define UART_DTRN (BIT(29)) -#define UART_TXFIFO_CNT 0x000000FF -#define UART_TXFIFO_CNT_S 16 -#define UART_RXD (BIT(15)) -#define UART_CTSN (BIT(14)) -#define UART_DSRN (BIT(13)) -#define UART_RXFIFO_CNT 0x000000FF -#define UART_RXFIFO_CNT_S 0 - -#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20) -#define UART_DTR_INV (BIT(24)) -#define UART_RTS_INV (BIT(23)) -#define UART_TXD_INV (BIT(22)) -#define UART_DSR_INV (BIT(21)) -#define UART_CTS_INV (BIT(20)) -#define UART_RXD_INV (BIT(19)) -#define UART_TXFIFO_RST (BIT(18)) -#define UART_RXFIFO_RST (BIT(17)) -#define UART_IRDA_EN (BIT(16)) -#define UART_TX_FLOW_EN (BIT(15)) -#define UART_LOOPBACK (BIT(14)) -#define UART_IRDA_RX_INV (BIT(13)) -#define UART_IRDA_TX_INV (BIT(12)) -#define UART_IRDA_WCTL (BIT(11)) -#define UART_IRDA_TX_EN (BIT(10)) -#define UART_IRDA_DPLX (BIT(9)) -#define UART_TXD_BRK (BIT(8)) -#define UART_SW_DTR (BIT(7)) -#define UART_SW_RTS (BIT(6)) -#define UART_STOP_BIT_NUM 0x00000003 -#define UART_STOP_BIT_NUM_S 4 -#define UART_BIT_NUM 0x00000003 -#define UART_BIT_NUM_S 2 -#define UART_PARITY_EN (BIT(1)) -#define UART_PARITY_EN_M 0x00000001 -#define UART_PARITY_EN_S 1 -#define UART_PARITY (BIT(0)) -#define UART_PARITY_M 0x00000001 -#define UART_PARITY_S 0 - -#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24) -#define UART_RX_TOUT_EN (BIT(31)) -#define UART_RX_TOUT_THRHD 0x0000007F -#define UART_RX_TOUT_THRHD_S 24 -#define UART_RX_FLOW_EN (BIT(23)) -#define UART_RX_FLOW_THRHD 0x0000007F -#define UART_RX_FLOW_THRHD_S 16 -#define UART_TXFIFO_EMPTY_THRHD 0x0000007F -#define UART_TXFIFO_EMPTY_THRHD_S 8 -#define UART_RXFIFO_FULL_THRHD 0x0000007F -#define UART_RXFIFO_FULL_THRHD_S 0 - -#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28) -#define UART_LOWPULSE_MIN_CNT 0x000FFFFF -#define UART_LOWPULSE_MIN_CNT_S 0 - -#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C) -#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF -#define UART_HIGHPULSE_MIN_CNT_S 0 - -#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30) -#define UART_PULSE_NUM_CNT 0x0003FF -#define UART_PULSE_NUM_CNT_S 0 - -#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78) -#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C) - -#define ESP8266_DREG(addr) *((volatile uint32_t *)(0x3FF00000+(addr))) - -//IO SWAP Register -#define IOSWAP ESP8266_DREG(0x28) -#define IOSWAPU 0 //Swaps UART -#define IOSWAPS 1 //Swaps SPI -#define IOSWAPU0 2 //Swaps UART 0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts) -#define IOSWAPU1 3 //Swaps UART 1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts) -#define IOSWAPHS 5 //Sets HSPI with higher prio -#define IOSWAP2HS 6 //Sets Two SPI Masters on HSPI -#define IOSWAP2CS 7 //Sets Two SPI Masters on CSPI - -#endif // UART_REGISTER_H_INCLUDED diff --git a/app/include/rom.h b/app/include/rom.h index 8476c3bb..ed3338e9 100644 --- a/app/include/rom.h +++ b/app/include/rom.h @@ -168,7 +168,6 @@ void ets_intr_unlock(void); int rand(void); void srand(unsigned int); -void uart_div_modify(int no, unsigned int freq); unsigned int uart_baudrate_detect(unsigned int uart_no, unsigned int async); diff --git a/app/lua/lua.c b/app/lua/lua.c index 88baae52..d381e4dc 100644 --- a/app/lua/lua.c +++ b/app/lua/lua.c @@ -549,7 +549,7 @@ static bool readline(lua_Load *load){ // NODE_DBG("readline() is called.\n"); bool need_dojob = false; char ch; - while (uart_getc(&ch)) + while (uart0_getc(&ch)) { if(run_input) { diff --git a/app/platform/platform.c b/app/platform/platform.c index cf3a1469..670ad850 100755 --- a/app/platform/platform.c +++ b/app/platform/platform.c @@ -336,10 +336,9 @@ void NO_INTR_CODE platform_gpio_intr_init( unsigned pin, GPIO_INT_TYPE type ) // UART // TODO: Support timeouts. -// UartDev is defined and initialized in rom code. -extern UartDevice UartDev; uint32_t platform_uart_setup( unsigned id, uint32_t baud, int databits, int parity, int stopbits ) { + UART_ConfigTypeDef cfg; switch( baud ) { case BIT_RATE_300: @@ -354,68 +353,61 @@ uint32_t platform_uart_setup( unsigned id, uint32_t baud, int databits, int pari case BIT_RATE_74880: case BIT_RATE_115200: case BIT_RATE_230400: - case BIT_RATE_256000: case BIT_RATE_460800: case BIT_RATE_921600: case BIT_RATE_1843200: case BIT_RATE_3686400: - UartDev.baut_rate = baud; + cfg.baud_rate = baud; break; default: - UartDev.baut_rate = BIT_RATE_9600; + cfg.baud_rate = BIT_RATE_9600; break; } switch( databits ) { case 5: - UartDev.data_bits = FIVE_BITS; + cfg.data_bits = UART_WordLength_5b; break; case 6: - UartDev.data_bits = SIX_BITS; + cfg.data_bits = UART_WordLength_6b; break; case 7: - UartDev.data_bits = SEVEN_BITS; + cfg.data_bits = UART_WordLength_7b; break; case 8: - UartDev.data_bits = EIGHT_BITS; - break; default: - UartDev.data_bits = EIGHT_BITS; + cfg.data_bits = UART_WordLength_8b; break; } switch (stopbits) { case PLATFORM_UART_STOPBITS_1_5: - UartDev.stop_bits = ONE_HALF_STOP_BIT; + cfg.stop_bits = USART_StopBits_1_5; break; case PLATFORM_UART_STOPBITS_2: - UartDev.stop_bits = TWO_STOP_BIT; + cfg.stop_bits = USART_StopBits_2; break; default: - UartDev.stop_bits = ONE_STOP_BIT; + cfg.stop_bits = USART_StopBits_1; break; } switch (parity) { case PLATFORM_UART_PARITY_EVEN: - UartDev.parity = EVEN_BITS; - UartDev.exist_parity = STICK_PARITY_EN; + cfg.parity = USART_Parity_Even; break; case PLATFORM_UART_PARITY_ODD: - UartDev.parity = ODD_BITS; - UartDev.exist_parity = STICK_PARITY_EN; + cfg.parity = USART_Parity_Odd; break; default: - UartDev.parity = NONE_BITS; - UartDev.exist_parity = STICK_PARITY_DIS; + cfg.parity = USART_Parity_None; break; } - uart_setup(id); - + UART_ParamConfig (id, &cfg); return baud; } diff --git a/app/user/user_main.c b/app/user/user_main.c index 2d233483..b16ff243 100644 --- a/app/user/user_main.c +++ b/app/user/user_main.c @@ -76,14 +76,14 @@ static void handle_input(task_param_t flag, task_prio_t priority) { lua_handle_input (flag); } -static task_handle_t input_sig; +static task_handle_t input_task; task_handle_t user_get_input_sig(void) { - return input_sig; + return input_task; } bool user_process_input(bool force) { - return task_post_low(input_sig, force); + return task_post_low(input_task, force); } void nodemcu_init(void) @@ -154,13 +154,18 @@ void user_init(void) rtctime_late_startup (); #endif -#if !defined(__ESP32__) - // FIXME - need UART driver for ESP32 - UartBautRate br = BIT_RATE_DEFAULT; + input_task = task_get_id (handle_input); - input_sig = task_get_id(handle_input); - uart_init (br, br, input_sig); -#endif + UART_ConfigTypeDef cfg; + cfg.baud_rate = BIT_RATE_DEFAULT; + cfg.data_bits = UART_WordLength_8b; + cfg.parity = USART_Parity_None; + cfg.stop_bits = USART_StopBits_1; + cfg.flow_ctrl = USART_HardwareFlowControl_None; + cfg.UART_RxFlowThresh = 120; + cfg.UART_InverseMask = UART_None_Inverse; + + uart_init_uart0_console (&cfg, input_task); #ifndef NODE_DEBUG system_set_os_print(0); diff --git a/sdk-overrides/esp8266-include/ets_sys.h b/sdk-overrides/esp8266-include/ets_sys.h index 67a98a93..519fe453 100644 --- a/sdk-overrides/esp8266-include/ets_sys.h +++ b/sdk-overrides/esp8266-include/ets_sys.h @@ -17,8 +17,6 @@ #define ETS_UART_INTR_ATTACH(fn,arg) _xt_isr_attach(ETS_UART_INUM, fn, arg) #define ETS_SPI_INTR_ATTACH(fn,arg) _xt_isr_attach(ETS_SPI_INUM, fn, arg) -#define ETS_UART_INTR_ENABLE() _xt_isr_unmask(1 << ETS_UART_INUM) -#define ETS_UART_INTR_DISABLE() _xt_isr_mask(1 << ETS_UART_INUM) #define ETS_GPIO_INTR_ENABLE() _xt_isr_unmask(1 << ETS_GPIO_INUM) #define ETS_GPIO_INTR_DISABLE() _xt_isr_mask(1 << ETS_GPIO_INUM) #define ETS_SPI_INTR_ENABLE() _xt_isr_unmask(1 << ETS_SPI_INUM) diff --git a/sdk-overrides/esp8266-include/ioswap.h b/sdk-overrides/esp8266-include/ioswap.h new file mode 100644 index 00000000..ff36fd5e --- /dev/null +++ b/sdk-overrides/esp8266-include/ioswap.h @@ -0,0 +1,14 @@ +#ifndef _SDK_OVERRIDES_IOSWAP_H_ +#define _SDK_OVERRIDES_IOSWAP_H_ + +#define ESP8266_DREG(addr) *((volatile uint32_t *)(0x3FF00000+(addr))) +#define IOSWAP ESP8266_DREG(0x28) +#define IOSWAPU 0 //Swaps UART +#define IOSWAPS 1 //Swaps SPI +#define IOSWAPU0 2 //Swaps UART 0 pins (u0rxd <-> u0cts), (u0txd <-> u0rts) +#define IOSWAPU1 3 //Swaps UART 1 pins (u1rxd <-> u1cts), (u1txd <-> u1rts) +#define IOSWAPHS 5 //Sets HSPI with higher prio +#define IOSWAP2HS 6 //Sets Two SPI Masters on HSPI +#define IOSWAP2CS 7 //Sets Two SPI Masters on CSPI + +#endif