SPI: Implemented CPOL=1
Reference: http://bbs.espressif.com/viewtopic.php?f=49&t=1570
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@ -87,14 +87,12 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD|SPI_RD_BYTE_ORDER|SPI_WR_BYTE_ORDER|SPI_DOUTDIN);
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//set clock polarity
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// TODO: This doesn't work
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//if (cpol == 1) {
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// SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (SPI_CK_OUT_HIGH_MODE<<SPI_CK_OUT_HIGH_MODE_S));
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//} else {
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// SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (SPI_CK_OUT_LOW_MODE<<SPI_CK_OUT_LOW_MODE_S));
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//}
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//os_printf("SPI_CTRL2 is %08x\n",READ_PERI_REG(SPI_CTRL2(spi_no)));
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//set clock polarity (Reference: http://bbs.espressif.com/viewtopic.php?f=49&t=1570)
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if (cpol == 1) {
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SET_PERI_REG_MASK(SPI_PIN(spi_no), SPI_IDLE_EDGE);
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} else {
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CLEAR_PERI_REG_MASK(SPI_PIN(spi_no), SPI_IDLE_EDGE);
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}
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//set clock phase
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if (cpha == 1) {
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@ -102,6 +102,7 @@
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#define SPI_CS2_DIS (BIT(2))
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#define SPI_CS1_DIS (BIT(1))
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#define SPI_CS0_DIS (BIT(0))
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#define SPI_IDLE_EDGE (BIT(29))
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#define SPI_SLAVE(i) (REG_SPI_BASE(i) + 0x30)
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#define SPI_SYNC_RESET (BIT(31))
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@ -30,10 +30,6 @@ static int spi_setup( lua_State *L )
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if (cpol != PLATFORM_SPI_CPOL_LOW && cpol != PLATFORM_SPI_CPOL_HIGH) {
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return luaL_error( L, "wrong arg type" );
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}
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// CPOL_HIGH is not implemented, see app/driver/spi.c spi_master_init()
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if (cpol == PLATFORM_SPI_CPOL_HIGH) {
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return luaL_error( L, "cpol=high is not implemented" );
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}
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if (cpha != PLATFORM_SPI_CPHA_LOW && cpha != PLATFORM_SPI_CPHA_HIGH) {
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return luaL_error( L, "wrong arg type" );
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