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Merge pull request #693 from devsaurus/dev-hspi_apiext 

Extend SPI module API with improved transaction handling
This commit is contained in:
devsaurus 2015-10-21 22:33:08 +02:00
parent 2412f0667d 75488639eb
commit c223ecfe5f
14 changed files with 406 additions and 94 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
README.md
View File

@ -405,7 +405,7 @@ All other pins can be assigned to any available GPIO:
Also refer to the initialization sequence eg in [u8g_graphics_test.lua](lua_examples/u8glib/u8g_graphics_test.lua):
```lua
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
```
@ -488,7 +488,7 @@ All other pins can be assigned to any available GPIO:
Also refer to the initialization sequence eg in [GraphicsTest.lua](lua_examples/ucglib/GraphicsRest.lua):
```lua
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
```
#####Library usage

212
app/driver/spi.c
View File

@ -64,7 +64,7 @@ void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit)
* Description : SPI master initial function for common byte units transmission
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
*******************************************************************************/
void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div)
void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_div)
{
uint32 regvalue;
@ -85,28 +85,29 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databi
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);//configure io to spi mode
}
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD|SPI_DOUTDIN|SPI_USR_MOSI);
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP|SPI_CS_HOLD|SPI_DOUTDIN|SPI_USR_MOSI|
SPI_RD_BYTE_ORDER|SPI_WR_BYTE_ORDER);
//set clock polarity
// TODO: This doesn't work
//if (cpol == 1) {
// SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (SPI_CK_OUT_HIGH_MODE<<SPI_CK_OUT_HIGH_MODE_S));
//} else {
// SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (SPI_CK_OUT_LOW_MODE<<SPI_CK_OUT_LOW_MODE_S));
//}
//os_printf("SPI_CTRL2 is %08x\n",READ_PERI_REG(SPI_CTRL2(spi_no)));
//set clock polarity
// TODO: This doesn't work
//if (cpol == 1) {
// SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (SPI_CK_OUT_HIGH_MODE<<SPI_CK_OUT_HIGH_MODE_S));
//} else {
// SET_PERI_REG_MASK(SPI_CTRL2(spi_no), (SPI_CK_OUT_LOW_MODE<<SPI_CK_OUT_LOW_MODE_S));
//}
//os_printf("SPI_CTRL2 is %08x\n",READ_PERI_REG(SPI_CTRL2(spi_no)));
//set clock phase
if (cpha == 1) {
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CK_OUT_EDGE|SPI_CK_I_EDGE);
} else {
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_CK_OUT_EDGE|SPI_CK_I_EDGE);
}
//set clock phase
if (cpha == 1) {
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CK_OUT_EDGE|SPI_CK_I_EDGE);
} else {
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_CK_OUT_EDGE|SPI_CK_I_EDGE);
}
CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_FLASH_MODE|SPI_WR_BYTE_ORDER|SPI_USR_MISO|
SPI_RD_BYTE_ORDER|SPI_USR_ADDR|SPI_USR_COMMAND|SPI_USR_DUMMY);
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE|SPI_USR_MISO|
SPI_USR_ADDR|SPI_USR_COMMAND|SPI_USR_DUMMY);
//clear Daul or Quad lines transmission mode
//clear Dual or Quad lines transmission mode
CLEAR_PERI_REG_MASK(SPI_CTRL(spi_no), SPI_QIO_MODE|SPI_DIO_MODE|SPI_DOUT_MODE|SPI_QOUT_MODE);
// SPI clock = CPU clock / clock_div
@ -132,24 +133,175 @@ void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databi
}
/******************************************************************************
* FunctionName : spi_mast_byte_write
* Description : SPI master 1 byte transmission function
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* uint8 data- transmitted data
* FunctionName : spi_mast_set_mosi
* Description : Enter provided data into MOSI buffer.
* The data is regarded as a sequence of bits with length 'bitlen'.
* It will be written left-aligned starting from position 'offset'.
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* uint8 offset - offset into MOSI buffer (number of bits)
* uint8 bitlen - valid number of bits in data
* uint32 data - data to be written into buffer
*******************************************************************************/
void spi_mast_byte_write(uint8 spi_no, uint8 *data)
void spi_mast_set_mosi(uint8 spi_no, uint8 offset, uint8 bitlen, uint32 data)
{
if(spi_no>1) return; //handle invalid input number
uint8 wn, wn_offset, wn_bitlen;
uint32 wn_data;
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR);
if (spi_no > 1)
return; // handle invalid input number
if (bitlen > 32)
return; // handle invalid input number
WRITE_PERI_REG(SPI_W0(spi_no), *data);
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
// determine which SPI_Wn register is addressed
wn = offset >> 5;
if (wn > 15)
return; // out of range
wn_offset = offset & 0x1f;
if (32 - wn_offset < bitlen)
{
// splitting required
wn_bitlen = 32 - wn_offset;
wn_data = data >> (bitlen - wn_bitlen);
}
else
{
wn_bitlen = bitlen;
wn_data = data;
}
do
{
// write payload data to SPI_Wn
SET_PERI_REG_BITS(REG_SPI_BASE(spi_no) +0x40 + wn*4, BIT(wn_bitlen) - 1, wn_data, 32 - (wn_offset + wn_bitlen));
// prepare writing of dangling data part
wn += 1;
wn_offset = 0;
if (wn <= 15)
bitlen -= wn_bitlen;
else
bitlen = 0; // force abort
wn_bitlen = bitlen;
wn_data = data;
} while (bitlen > 0);
}
/******************************************************************************
* FunctionName : spi_mast_get_miso
* Description : Retrieve data from MISO buffer.
* The data is regarded as a sequence of bits with length 'bitlen'.
* It will be read starting left-aligned from position 'offset'.
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* uint8 offset - offset into MISO buffer (number of bits)
* uint8 bitlen - requested number of bits in data
*******************************************************************************/
uint32 spi_mast_get_miso(uint8 spi_no, uint8 offset, uint8 bitlen)
{
uint8 wn, wn_offset, wn_bitlen;
uint32 wn_data = 0;
if (spi_no > 1)
return 0; // handle invalid input number
// determine which SPI_Wn register is addressed
wn = offset >> 5;
if (wn > 15)
return 0; // out of range
wn_offset = offset & 0x1f;
if (bitlen > (32 - wn_offset))
{
// splitting required
wn_bitlen = 32 - wn_offset;
}
else
{
wn_bitlen = bitlen;
}
do
{
wn_data |= (READ_PERI_REG(REG_SPI_BASE(spi_no) +0x40 + wn*4) >> (32 - (wn_offset + wn_bitlen))) & (BIT(wn_bitlen) - 1);
// prepare reading of dangling data part
wn_data <<= bitlen - wn_bitlen;
wn += 1;
wn_offset = 0;
if (wn <= 15)
bitlen -= wn_bitlen;
else
bitlen = 0; // force abort
wn_bitlen = bitlen;
} while (bitlen > 0);
return wn_data;
}
/******************************************************************************
* FunctionName : spi_mast_transaction
* Description : Start a transaction and wait for completion.
* Parameters : uint8 spi_no - SPI module number, Only "SPI" and "HSPI" are valid
* uint8 cmd_bitlen - Valid number of bits in cmd_data.
* uint16 cmd_data - Command data.
* uint8 addr_bitlen - Valid number of bits in addr_data.
* uint32 addr_data - Address data.
* uint8 mosi_bitlen - Valid number of bits in MOSI buffer.
* uint8 dummy_bitlen - Number of dummy cycles.
* uint8 miso_bitlen - number of bits to be captured in MISO buffer.
*******************************************************************************/
void spi_mast_transaction(uint8 spi_no, uint8 cmd_bitlen, uint16 cmd_data, uint8 addr_bitlen, uint32 addr_data,
uint8 mosi_bitlen, uint8 dummy_bitlen, uint8 miso_bitlen)
{
if (spi_no > 1)
return; // handle invalid input number
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
// default disable COMMAND, ADDR, MOSI, DUMMY, MISO
CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND|SPI_USR_ADDR|SPI_USR_MOSI|SPI_USR_DUMMY|SPI_USR_MISO);
// default set bit lengths
WRITE_PERI_REG(SPI_USER1(spi_no),
((addr_bitlen - 1) & SPI_USR_ADDR_BITLEN) << SPI_USR_ADDR_BITLEN_S |
((mosi_bitlen - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S |
((dummy_bitlen - 1) & SPI_USR_DUMMY_CYCLELEN) << SPI_USR_DUMMY_CYCLELEN_S |
((miso_bitlen - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S);
// handle the transaction components
if (cmd_bitlen > 0)
{
uint16 cmd = cmd_data << (16 - cmd_bitlen); // align to MSB
cmd = (cmd >> 8) | (cmd << 8); // swap byte order
WRITE_PERI_REG(SPI_USER2(spi_no),
((cmd_bitlen - 1 & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) |
(cmd & SPI_USR_COMMAND_VALUE));
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND);
}
if (addr_bitlen > 0)
{
WRITE_PERI_REG(SPI_ADDR(spi_no), addr_data << (32 - addr_bitlen));
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR);
}
if (mosi_bitlen > 0)
{
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI);
}
if (dummy_bitlen > 0)
{
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_DUMMY);
}
if (miso_bitlen > 0)
{
SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO);
}
// start transaction
SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR);
while(READ_PERI_REG(SPI_CMD(spi_no))&SPI_USR);
*data = (uint8)(READ_PERI_REG(SPI_W0(spi_no))&0xff);
}
while(READ_PERI_REG(SPI_CMD(spi_no)) & SPI_USR);
}
/******************************************************************************
* FunctionName : spi_byte_write_espslave

11
app/include/driver/spi.h
View File

@ -18,9 +18,14 @@ void spi_lcd_mode_init(uint8 spi_no);
void spi_lcd_9bit_write(uint8 spi_no,uint8 high_bit,uint8 low_8bit);
//spi master init funtion
void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div);
//use spi send 8bit data
void spi_mast_byte_write(uint8 spi_no,uint8 *data);
void spi_master_init(uint8 spi_no, unsigned cpol, unsigned cpha, uint32_t clock_div);
// fill MOSI buffer
void spi_set_mosi(uint8 spi_no, uint8 offset, uint8 bitlen, uint32 data);
// retrieve data from MISO buffer
uint32 spi_get_miso(uint8 spi_no, uint8 offset, uint8 bitlen);
// initiate SPI transaction
void spi_mast_transaction(uint8 spi_no, uint8 cmd_bitlen, uint16 cmd_data, uint8 addr_bitlen, uint32 addr_data,
uint8 mosi_bitlen, uint8 dummy_bitlen, uint8 miso_bitlen);
//transmit data to esp8266 slave buffer,which needs 16bit transmission ,
//first byte is master command 0x04, second byte is master data

175
app/modules/spi.c
View File

@ -7,15 +7,17 @@
#include "auxmods.h"
#include "lrotable.h"
static u8 spi_databits[NUM_SPI] = {0, 0};
// Lua: = spi.setup( id, mode, cpol, cpha, databits, clock_div )
static int spi_setup( lua_State *L )
{
unsigned id = luaL_checkinteger( L, 1 );
unsigned mode = luaL_checkinteger( L, 2 );
unsigned cpol = luaL_checkinteger( L, 3 );
unsigned cpha = luaL_checkinteger( L, 4 );
unsigned databits = luaL_checkinteger( L, 5 );
uint32_t clock_div = luaL_checkinteger( L, 6 );
int id = luaL_checkinteger( L, 1 );
int mode = luaL_checkinteger( L, 2 );
int cpol = luaL_checkinteger( L, 3 );
int cpha = luaL_checkinteger( L, 4 );
int databits = luaL_checkinteger( L, 5 );
u32 clock_div = luaL_checkinteger( L, 6 );
MOD_CHECK_ID( spi, id );
@ -31,15 +33,18 @@ static int spi_setup( lua_State *L )
return luaL_error( L, "wrong arg type" );
}
if (databits != PLATFORM_SPI_DATABITS_8 && databits != PLATFORM_SPI_DATABITS_16) {
return luaL_error( L, "wrong arg type" );
if (databits < 0 || databits > 32) {
return luaL_error( L, "out of range" );
}
if (clock_div < 4) {
return luaL_error( L, "invalid clock divider" );
// defaulting to 8
clock_div = 8;
}
u32 res = platform_spi_setup(id, mode, cpol, cpha, databits, clock_div);
spi_databits[id] = databits;
u32 res = platform_spi_setup(id, mode, cpol, cpha, clock_div);
lua_pushinteger( L, res );
return 1;
}
@ -66,9 +71,7 @@ static int spi_send( lua_State *L )
if( lua_type( L, argn ) == LUA_TNUMBER )
{
numdata = ( int )luaL_checkinteger( L, argn );
if( numdata < 0 || numdata > 255 )
return luaL_error( L, "wrong arg range" );
platform_spi_send_recv( id, numdata );
platform_spi_send( id, spi_databits[id], numdata );
wrote ++;
}
else if( lua_istable( L, argn ) )
@ -79,9 +82,7 @@ static int spi_send( lua_State *L )
lua_rawgeti( L, argn, i + 1 );
numdata = ( int )luaL_checkinteger( L, -1 );
lua_pop( L, 1 );
if( numdata < 0 || numdata > 255 )
return luaL_error( L, "wrong arg range" );
platform_spi_send_recv( id, numdata );
platform_spi_send( id, spi_databits[id], numdata );
}
wrote += i;
if( i < datalen )
@ -91,7 +92,7 @@ static int spi_send( lua_State *L )
{
pdata = luaL_checklstring( L, argn, &datalen );
for( i = 0; i < datalen; i ++ )
platform_spi_send_recv( id, pdata[ i ] );
platform_spi_send( id, spi_databits[id], pdata[ i ] );
wrote += i;
if( i < datalen )
break;
@ -105,11 +106,10 @@ static int spi_send( lua_State *L )
// Lua: read = spi.recv( id, size )
static int spi_recv( lua_State *L )
{
unsigned id = luaL_checkinteger( L, 1 );
u32 size = ( u32 )luaL_checkinteger( L, 2 ), i;
int id = luaL_checkinteger( L, 1 );
int size = luaL_checkinteger( L, 2 ), i;
luaL_Buffer b;
spi_data_type data;
MOD_CHECK_ID( spi, id );
if (size == 0) {
@ -117,23 +117,139 @@ static int spi_recv( lua_State *L )
}
luaL_buffinit( L, &b );
for (i=0; i<size; i++) {
data = platform_spi_send_recv(id, 0xFF);
luaL_addchar( &b, ( char )data);
for (i=0; i<size; i++)
{
if (PLATFORM_OK != platform_spi_transaction( id, 0, 0, 0, 0, 0, 0, spi_databits[id] )) {
return luaL_error( L, "failed" );
}
luaL_addchar( &b, ( char )platform_spi_get_miso( id, 0, spi_databits[id] ) );
}
luaL_pushresult( &b );
return 1;
}
// Lua: spi.set_mosi( id, offset, bitlen, data1, [data2], ..., [datan] )
static int spi_set_mosi( lua_State *L )
{
int id = luaL_checkinteger( L, 1 );
int offset = luaL_checkinteger( L, 2 );
int bitlen = luaL_checkinteger( L, 3 );
int argn;
MOD_CHECK_ID( spi, id );
if (offset < 0 || offset > 511) {
return luaL_error( L, "offset out of range" );
}
if (bitlen < 1 || bitlen > 32) {
return luaL_error( L, "bitlen out of range" );
}
if (lua_gettop( L ) < 4) {
return luaL_error( L, "too few args" );
}
for (argn = 4; argn <= lua_gettop( L ); argn++, offset += bitlen )
{
u32 data = ( u32 )luaL_checkinteger(L, argn );
if (offset + bitlen > 512) {
return luaL_error( L, "data range exceeded > 512 bits" );
}
if (PLATFORM_OK != platform_spi_set_mosi( id, offset, bitlen, data )) {
return luaL_error( L, "failed" );
}
}
return 0;
}
// Lua: data = spi.get_miso( id, offset, bitlen, num )
static int spi_get_miso( lua_State *L )
{
int id = luaL_checkinteger( L, 1 );
int offset = luaL_checkinteger( L, 2 );
int bitlen = luaL_checkinteger( L, 3 );
int num = luaL_checkinteger( L, 4 ), i;
MOD_CHECK_ID( spi, id );
if (offset < 0 || offset > 511) {
return luaL_error( L, "out of range" );
}
if (bitlen < 1 || bitlen > 32) {
return luaL_error( L, "bitlen out of range" );
}
if (offset + bitlen * num > 512) {
return luaL_error( L, "out of range" );
}
for (i = 0; i < num; i++)
{
lua_pushinteger( L, platform_spi_get_miso( id, offset + (bitlen * i), bitlen ) );
}
return num;
}
// Lua: spi.transaction( id, cmd_bitlen, cmd_data, addr_bitlen, addr_data, mosi_bitlen, dummy_bitlen, miso_bitlen )
static int spi_transaction( lua_State *L )
{
int id = luaL_checkinteger( L, 1 );
int cmd_bitlen = luaL_checkinteger( L, 2 );
u16 cmd_data = ( u16 )luaL_checkinteger( L, 3 );
int addr_bitlen = luaL_checkinteger( L, 4 );
u32 addr_data = ( u32 )luaL_checkinteger( L, 5 );
int mosi_bitlen = luaL_checkinteger( L, 6 );
int dummy_bitlen = luaL_checkinteger( L, 7 );
int miso_bitlen = luaL_checkinteger( L, 8 );
MOD_CHECK_ID( spi, id );
if (cmd_bitlen < 0 || cmd_bitlen > 16) {
return luaL_error( L, "cmd_bitlen out of range" );
}
if (addr_bitlen < 0 || addr_bitlen > 32) {
return luaL_error( L, "addr_bitlen out of range" );
}
if (mosi_bitlen < 0 || mosi_bitlen > 512) {
return luaL_error( L, "mosi_bitlen out of range" );
}
if (dummy_bitlen < 0 || dummy_bitlen > 256) {
return luaL_error( L, "dummy_bitlen out of range" );
}
if (miso_bitlen < 0 || miso_bitlen > 511) {
return luaL_error( L, "miso_bitlen out of range" );
}
if (PLATFORM_OK != platform_spi_transaction( id, cmd_bitlen, cmd_data, addr_bitlen, addr_data,
mosi_bitlen, dummy_bitlen, miso_bitlen) ) {
return luaL_error( L, "failed" );
}
return 0;
}
// Module function map
#define MIN_OPT_LEVEL 2
#include "lrodefs.h"
const LUA_REG_TYPE spi_map[] =
{
{ LSTRKEY( "setup" ), LFUNCVAL( spi_setup ) },
{ LSTRKEY( "send" ), LFUNCVAL( spi_send ) },
{ LSTRKEY( "recv" ), LFUNCVAL( spi_recv ) },
{ LSTRKEY( "setup" ), LFUNCVAL( spi_setup ) },
{ LSTRKEY( "send" ), LFUNCVAL( spi_send ) },
{ LSTRKEY( "recv" ), LFUNCVAL( spi_recv ) },
{ LSTRKEY( "set_mosi" ), LFUNCVAL( spi_set_mosi ) },
{ LSTRKEY( "get_miso" ), LFUNCVAL( spi_get_miso ) },
{ LSTRKEY( "transaction" ), LFUNCVAL( spi_transaction ) },
#if LUA_OPTIMIZE_MEMORY > 0
{ LSTRKEY( "MASTER" ), LNUMVAL( PLATFORM_SPI_MASTER ) },
{ LSTRKEY( "SLAVE" ), LNUMVAL( PLATFORM_SPI_SLAVE) },
@ -141,8 +257,7 @@ const LUA_REG_TYPE spi_map[] =
{ LSTRKEY( "CPHA_HIGH" ), LNUMVAL( PLATFORM_SPI_CPHA_HIGH) },
{ LSTRKEY( "CPOL_LOW" ), LNUMVAL( PLATFORM_SPI_CPOL_LOW) },
{ LSTRKEY( "CPOL_HIGH" ), LNUMVAL( PLATFORM_SPI_CPOL_HIGH) },
{ LSTRKEY( "DATABITS_8" ), LNUMVAL( PLATFORM_SPI_DATABITS_8) },
{ LSTRKEY( "DATABITS_16" ), LNUMVAL( PLATFORM_SPI_DATABITS_16) },
{ LSTRKEY( "DATABITS_8" ), LNUMVAL( 8 ) },
#endif // #if LUA_OPTIMIZE_MEMORY > 0
{ LNILKEY, LNILVAL }
};
@ -161,10 +276,8 @@ LUALIB_API int luaopen_spi( lua_State *L )
MOD_REG_NUMBER( L, "CPHA_HIGH", PLATFORM_SPI_CPHA_HIGH);
MOD_REG_NUMBER( L, "CPOL_LOW" , PLATFORM_SPI_CPOL_LOW);
MOD_REG_NUMBER( L, "CPOL_HIGH", PLATFORM_SPI_CPOL_HIGH);
MOD_REG_NUMBER( L, "DATABITS_8" , PLATFORM_SPI_DATABITS_8);
MOD_REG_NUMBER( L, "DATABITS_16" , PLATFORM_SPI_DATABITS_16);
MOD_REG_NUMBER( L, "DATABITS_8", 8 );
return 1;
#endif // #if LUA_OPTIMIZE_MEMORY > 0
}

4
app/modules/u8g.c
View File

@ -861,7 +861,7 @@ uint8_t u8g_com_esp8266_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void
break;
case U8G_COM_MSG_WRITE_BYTE:
platform_spi_send_recv( 1, arg_val );
platform_spi_send( 1, 8, arg_val );
break;
case U8G_COM_MSG_WRITE_SEQ:
@ -870,7 +870,7 @@ uint8_t u8g_com_esp8266_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void
register uint8_t *ptr = arg_ptr;
while( arg_val > 0 )
{
platform_spi_send_recv( 1, *ptr++ );
platform_spi_send( 1, 8, *ptr++ );
arg_val--;
}
}

18
app/modules/ucg.c
View File

@ -752,36 +752,36 @@ static int16_t ucg_com_esp8266_hw_spi(ucg_t *ucg, int16_t msg, uint16_t arg, uin
break;
case UCG_COM_MSG_SEND_BYTE:
platform_spi_send_recv( 1, arg );
platform_spi_send( 1, 8, arg );
break;
case UCG_COM_MSG_REPEAT_1_BYTE:
while( arg > 0 ) {
platform_spi_send_recv( 1, data[0] );
platform_spi_send( 1, 8, data[0] );
arg--;
}
break;
case UCG_COM_MSG_REPEAT_2_BYTES:
while( arg > 0 ) {
platform_spi_send_recv( 1, data[0] );
platform_spi_send_recv( 1, data[1] );
platform_spi_send( 1, 8, data[0] );
platform_spi_send( 1, 8, data[1] );
arg--;
}
break;
case UCG_COM_MSG_REPEAT_3_BYTES:
while( arg > 0 ) {
platform_spi_send_recv( 1, data[0] );
platform_spi_send_recv( 1, data[1] );
platform_spi_send_recv( 1, data[2] );
platform_spi_send( 1, 8, data[0] );
platform_spi_send( 1, 8, data[1] );
platform_spi_send( 1, 8, data[2] );
arg--;
}
break;
case UCG_COM_MSG_SEND_STR:
while( arg > 0 ) {
platform_spi_send_recv( 1, *data++ );
platform_spi_send( 1, 8, *data++ );
arg--;
}
break;
@ -802,7 +802,7 @@ static int16_t ucg_com_esp8266_hw_spi(ucg_t *ucg, int16_t msg, uint16_t arg, uin
}
}
data++;
platform_spi_send_recv( 1, *data );
platform_spi_send( 1, 8, *data );
data++;
arg--;
}

48
app/platform/platform.c
View File

@ -437,16 +437,54 @@ int platform_i2c_recv_byte( unsigned id, int ack ){
// *****************************************************************************
// SPI platform interface
uint32_t platform_spi_setup( unsigned id, int mode, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div)
uint32_t platform_spi_setup( uint8_t id, int mode, unsigned cpol, unsigned cpha, uint32_t clock_div)
{
spi_master_init(id, cpol, cpha, databits, clock_div);
spi_master_init(id, cpol, cpha, clock_div);
return 1;
}
spi_data_type platform_spi_send_recv( unsigned id, spi_data_type data )
int platform_spi_send( uint8_t id, uint8_t bitlen, spi_data_type data )
{
spi_mast_byte_write(id, &data);
return data;
if (bitlen > 32)
return PLATFORM_ERR;
spi_mast_transaction( id, 0, 0, bitlen, data, 0, 0, 0 );
return PLATFORM_OK;
}
int platform_spi_set_mosi( uint8_t id, uint8_t offset, uint8_t bitlen, spi_data_type data )
{
if (offset + bitlen > 512)
return PLATFORM_ERR;
spi_mast_set_mosi( id, offset, bitlen, data );
return PLATFORM_OK;
}
spi_data_type platform_spi_get_miso( uint8_t id, uint8_t offset, uint8_t bitlen )
{
if (offset + bitlen > 512)
return 0;
return spi_mast_get_miso( id, offset, bitlen );
}
int platform_spi_transaction( uint8_t id, uint8_t cmd_bitlen, spi_data_type cmd_data,
uint8_t addr_bitlen, spi_data_type addr_data,
uint8_t mosi_bitlen, uint8_t dummy_bitlen, uint8_t miso_bitlen )
{
if ((cmd_bitlen > 16) ||
(addr_bitlen > 32) ||
(mosi_bitlen > 512) ||
(dummy_bitlen > 256) ||
(miso_bitlen > 512))
return PLATFORM_ERR;
spi_mast_transaction( id, cmd_bitlen, cmd_data, addr_bitlen, addr_data, mosi_bitlen, dummy_bitlen, miso_bitlen );
return PLATFORM_OK;
}
// ****************************************************************************

14
app/platform/platform.h
View File

@ -89,9 +89,6 @@ int platform_can_recv( unsigned id, uint32_t *canid, uint8_t *idtype, uint8_t *l
// SPI clock polarity
#define PLATFORM_SPI_CPOL_LOW 0
#define PLATFORM_SPI_CPOL_HIGH 1
// SPI databits
#define PLATFORM_SPI_DATABITS_8 8
#define PLATFORM_SPI_DATABITS_16 16
// Data types
@ -99,10 +96,17 @@ typedef uint32_t spi_data_type;
// The platform SPI functions
int platform_spi_exists( unsigned id );
uint32_t platform_spi_setup( unsigned id, int mode, unsigned cpol, unsigned cpha, unsigned databits, uint32_t clock_div);
spi_data_type platform_spi_send_recv( unsigned id, spi_data_type data );
uint32_t platform_spi_setup( uint8_t id, int mode, unsigned cpol, unsigned cpha, uint32_t clock_div);
int platform_spi_send( uint8_t id, uint8_t bitlen, spi_data_type data );
void platform_spi_select( unsigned id, int is_select );
int platform_spi_set_mosi( uint8_t id, uint8_t offset, uint8_t bitlen, spi_data_type data );
spi_data_type platform_spi_get_miso( uint8_t id, uint8_t offset, uint8_t bitlen );
int platform_spi_transaction( uint8_t id, uint8_t cmd_bitlen, spi_data_type cmd_data,
uint8_t addr_bitlen, spi_data_type addr_data,
uint8_t mosi_bitlen, uint8_t dummy_bitlen, uint8_t miso_bitlen );
// *****************************************************************************
// UART subsection

2
lua_examples/u8glib/u8g_bitmaps.lua
View File

@ -30,7 +30,7 @@ function init_spi_display()
local dc = 4 -- GPIO2
local res = 0 -- GPIO16
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
disp = u8g.ssd1306_128x64_hw_spi(cs, dc, res)
end

2
lua_examples/u8glib/u8g_graphics_test.lua
View File

@ -29,7 +29,7 @@ function init_spi_display()
local dc = 4 -- GPIO2
local res = 0 -- GPIO16
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
disp = u8g.ssd1306_128x64_hw_spi(cs, dc, res)
end

2
lua_examples/u8glib/u8g_rotation.lua
View File

@ -30,7 +30,7 @@ function init_spi_display()
local dc = 4 -- GPIO2
local res = 0 -- GPIO16
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
disp = u8g.ssd1306_128x64_hw_spi(cs, dc, res)
end

2
lua_examples/ucglib/GraphicsTest.lua
View File

@ -8,7 +8,7 @@ function init_spi_display()
local dc = 4 -- GPIO2
local res = 0 -- GPIO16
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
-- initialize the matching driver for your display
-- see app/include/ucg_config.h

2
lua_examples/ucglib/HelloWorld.lua
View File

@ -8,7 +8,7 @@ function init_spi_display()
local dc = 4 -- GPIO2
local res = 0 -- GPIO16
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
disp = ucg.ili9341_18x240x320_hw_spi(cs, dc, res)
end

4
lua_examples/ucglib/UcgLogo.lua
View File

@ -8,8 +8,8 @@ function init_spi_display()
local dc = 4 -- GPIO2
local res = 0 -- GPIO16
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, spi.DATABITS_8, 8)
disp = ucg.ili9341_18x240x320_hw_spi(cs, dc, res)
spi.setup(1, spi.MASTER, spi.CPOL_LOW, spi.CPHA_LOW, 8, 8)
disp = ucg.st7735_18x128x160_hw_spi(cs, dc, res)
end