SDK-3.0 tranche updates (#2757)

includes some dRAM -> iRAM optimisations
2019-05-17 13:04:19 +01:00 · 2019-05-17 13:04:19 +01:00 · f1b5dfc34e
parent 1990f95740
commit f1b5dfc34e
12 changed files with 65 additions and 34 deletions
--- a/37
+++ b/37
@ -9,18 +9,23 @@ TOP_DIR:=$(abspath $(dir $(lastword $(MAKEFILE_LIST))))
 # RELEASE = lastest pulls the latest V3.0.0 branch version as at the issue of this make
 # otherwise it pulls the labelled version in the SDK version's release directory
 #
-ifeq ("$(RELEASE)","latest")
-  export RELEASE:=$(RELEASE)
-  SDK_VER        := 3.0.0-dev-190412
-  SDK_COMMIT_SHA1:= 39ec2d4573eb77fda73f6afcf6dd1b3c41e74fcd
-  SDK_FILE_SHA1  := 44f7724490739536526fc4298d6fcc2fa2d29471
-  SDK_ZIP_ROOT   := ESP8266_NONOS_SDK-$(SDK_COMMIT_SHA1)
-  SDK_FILE_VER   := $(SDK_COMMIT_SHA1)
-else
-  SDK_VER        := 3.0
-  SDK_FILE_SHA1  := 029fc23fe87e03c9852de636490b2d7b9e07f01a
+ifeq ("$(RELEASE)","latest-3.0")
+  SDK_VER        := 3.0.0
+  SDK_FILE_SHA1  := NA
+  SDK_ZIP_ROOT   := ESP8266_NONOS_SDK-release-v$(SDK_VER)
+  SDK_FILE_VER   := release/v$(SDK_VER)
+else ifeq ("$(RELEASE)","master")
+  SDK_VER        := master
+  SDK_FILE_SHA1  := NA
  SDK_ZIP_ROOT   := ESP8266_NONOS_SDK-$(SDK_VER)
-  SDK_FILE_VER   := v$(SDK_VER)
+  SDK_FILE_VER   := $(SDK_VER)
+else
+# SDK_VER        := 3.0
+# SDK_FILE_VER   := v$(SDK_VER)
+  SDK_FILE_VER   := e4434aa730e78c63040ace360493aef420ec267c
+  SDK_VER        := 3.0-e4434aa
+  SDK_FILE_SHA1  := ac6528a6a206d3d4c220e4035ced423eb314cfbf
+  SDK_ZIP_ROOT   := ESP8266_NONOS_SDK-$(SDK_FILE_VER)
 endif
 SDK_REL_DIR      := sdk/esp_iot_sdk_v$(SDK_VER)
 SDK_DIR          := $(TOP_DIR)/$(SDK_REL_DIR)
@ -314,10 +319,10 @@ $(TOP_DIR)/sdk/.extracted-$(SDK_VER): $(TOP_DIR)/cache/$(SDK_FILE_VER).zip
 	(cd "$(dir $@)" && \
 	 rm -fr esp_iot_sdk_v$(SDK_VER) ESP8266_NONOS_SDK-* && \
 	 unzip $(TOP_DIR)/cache/$(SDK_FILE_VER).zip \
-	       '$(SDK_ZIP_ROOT)/lib/*' \
-	       '$(SDK_ZIP_ROOT)/ld/*.v6.ld' \
-	       '$(SDK_ZIP_ROOT)/include/*' \
-	       '$(SDK_ZIP_ROOT)/bin/esp_init_data_default_v05.bin' \
+	       '*/lib/*' \
+	       '*/ld/*.v6.ld' \
+	       '*/include/*' \
+	       '*/bin/esp_init_data_default_v05.bin' \
 	)
 	mv $(dir $@)/$(SDK_ZIP_ROOT) $(dir $@)/esp_iot_sdk_v$(SDK_VER)
 	touch $@
@ -334,7 +339,7 @@ $(TOP_DIR)/cache/$(SDK_FILE_VER).zip:
 	mkdir -p "$(dir $@)"
 	$(summary) WGET $(patsubst $(TOP_DIR)/%,%,$@)
 	$(WGET) $(GITHUB_SDK)/archive/$(SDK_FILE_VER).zip -O $@ || { rm -f "$@"; exit 1; }
-	(echo "$(SDK_FILE_SHA1)  $@" | sha1sum -c -) || { rm -f "$@"; exit 1; }
+	if test "$(SDK_FILE_SHA1)" != "NA"; then echo "$(SDK_FILE_SHA1)  $@" | sha1sum -c - || { rm -f "$@"; exit 1; }; fi

 clean:
 	$(foreach d, $(SUBDIRS), $(MAKE) -C $(d) clean;)
--- a/app/Makefile
+++ b/app/Makefile
@ -143,6 +143,7 @@ CONFIGURATION_DEFINES =	-D__ets__ 		\
 			-DEBUF_LWIP		\
 			-DUSE_OPTIMIZE_PRINTF	\
 			-DMBEDTLS_USER_CONFIG_FILE=\"user_mbedtls.h\"  \
+			-DMEM_DEFAULT_USE_DRAM

 DEFINES += 					\
 	$(UNIVERSAL_TARGET_DEFINES) 		\
--- a/app/esp-gdbstub/gdbstub.c
+++ b/app/esp-gdbstub/gdbstub.c
@ -107,7 +107,7 @@ extern void xthal_set_intenable(int);
 #define OBUFLEN 32

 //The asm stub saves the Xtensa registers here when a debugging exception happens.
-struct XTensa_exception_frame_s gdbstub_savedRegs;
+struct XTensa_exception_frame_s IRAM_DATA_ATTR gdbstub_savedRegs;
 #if GDBSTUB_USE_OWN_STACK
 //This is the debugging exception stack.
 int exceptionStack[256];
--- a/app/include/user_config.h
+++ b/app/include/user_config.h
@ -278,6 +278,8 @@ extern void luaL_dbgbreak(void);
 #define ICACHE_FLASH_RESERVED_ATTR \
  __attribute__((section(".irom.reserved." __FILE__ "." ICACHE_STRING(__LINE__)),\
                 used,unused,aligned(INTERNAL_FLASH_SECTOR_SIZE)))
+#define IRAM_DATA_ATTR \
+  __attribute__((section(".iram0.data." __FILE__ "." ICACHE_STRING(__LINE__))))

 #ifdef  GPIO_SAFE_NO_INTR_ENABLE
 #define NO_INTR_CODE ICACHE_RAM_ATTR __attribute__ ((noinline))
--- a/app/lua/lauxlib.c
+++ b/app/lua/lauxlib.c
@ -918,6 +918,11 @@ static int l_check_memlimit(lua_State *L, size_t needbytes) {
  return (g->totalbytes >= limit) ? 1 : 0;
 }

+#ifndef LUA_CROSS_COMPILER
+#define REALLOC(p,o,n) (void *) this_realloc(p,o,n)
+#else
+#define REALLOC(p,o,n) (void *) (ptr? this_realloc(p,o,n) : c_malloc(n))
+#endif

 static void *l_alloc (void *ud, void *ptr, size_t osize, size_t nsize) {
  lua_State *L = (lua_State *)ud;
@ -946,10 +951,11 @@ static void *l_alloc (void *ud, void *ptr, size_t osize, size_t nsize) {
    if(G(L)->memlimit > 0 && (mode & EGC_ON_MEM_LIMIT) && l_check_memlimit(L, nsize - osize))
      return NULL;
  }
-  nptr = (void *)this_realloc(ptr, osize, nsize);
+  nptr = REALLOC(ptr, osize, nsize);
  if (nptr == NULL && L != NULL && (mode & EGC_ON_ALLOC_FAILURE)) {
+    dbg_printf("Emergency full collection\n");  /**** DEBUG ***/
    luaC_fullgc(L); /* emergency full collection. */
-    nptr = (void *)this_realloc(ptr, osize, nsize); /* try allocation again */
+    nptr = REALLOC(ptr, osize, nsize); /* try allocation again */
  }
  return nptr;
 }
--- a/app/lua/lrotable.c
+++ b/app/lua/lrotable.c
@ -14,6 +14,12 @@
 #else
 #define ALIGNED_STRING (__attribute__((aligned(4))) char *)
 #endif
+
+#ifdef LUA_CROSS_COMPILER
+#undef IRAM_DATA_ATTR
+#define IRAM_DATA_ATTR
+#endif
+
 #define LA_LINES 32
 #define LA_SLOTS 4
 //#define COLLECT_STATS
@ -36,13 +42,15 @@
 * Note that this hash does a couple of prime multiples and a modulus 2^X
 * with is all evaluated in H/W, and adequately randomizes the lookup.
 */
-#define HASH(a,b) ((((519*(size_t)(a)))>>4) + ((b) ? (b)->tsv.hash: 0))
+#define HASH(a,b) (unsigned)((((519*(size_t)(a)))>>4) + ((b) ? (b)->tsv.hash: 0))

-static struct {
+typedef struct {
  unsigned hash;
  unsigned addr:24;
  unsigned ndx:8;
-} cache[LA_LINES][LA_SLOTS];
+} cache_line_t;
+
+static cache_line_t IRAM_DATA_ATTR cache[LA_LINES][LA_SLOTS];

 #ifdef COLLECT_STATS
 unsigned cache_stats[3];
@ -55,10 +63,10 @@ static int lookup_cache(unsigned hash, ROTable *rotable) {
  int i = (hash>>2) & (LA_LINES-1), j;

  for (j = 0; j<LA_SLOTS; j++) {
-    if (cache[i][j].hash == hash &&
-        ((size_t)rotable & 0xffffffu) == cache[i][j].addr) {
+    cache_line_t cl = cache[i][j];
+    if (cl.hash == hash && ((size_t)rotable & 0xffffffu) == cl.addr) {
      COUNT(0);
-      return cache[i][j].ndx;
+      return cl.ndx;
    }
  }
  COUNT(1);
@ -67,14 +75,21 @@ static int lookup_cache(unsigned hash, ROTable *rotable) {

 static void update_cache(unsigned hash, ROTable *rotable, unsigned ndx) {
  int i = (hash)>>2 & (LA_LINES-1), j;
+#ifndef _MSC_VER
+  cache_line_t cl = {hash, (size_t) rotable, ndx};
+#else
+  cache_line_t cl;             // MSC doesn't allow non-scalar initialisers, which
+  cl.hash = hash;              // is a pity because xtensa gcc generates optimum   
+  cl.addr = (size_t) rotable;  // code using them.
+  cl.ndx  = ndx;
+#endif
+
  COUNT(2);
  if (ndx>0xffu)
    return;
  for (j = LA_SLOTS-1; j>0; j--)
    cache[i][j] = cache[i][j-1];
-  cache[i][0].hash = hash;
-  cache[i][0].addr = (size_t) rotable;
-  cache[i][0].ndx  = ndx;
+  cache[i][0] = cl;
 }
 /*
 * Find a string key entry in a rotable and return it.  Note that this internally
--- a/app/lwip/core/dns.c
+++ b/app/lwip/core/dns.c
@ -222,7 +222,7 @@ static void dns_check_entries(void);
 /* DNS variables */
 static struct udp_pcb        *dns_pcb;
 static u8_t                   dns_seqno;
-static struct dns_table_entry dns_table[DNS_TABLE_SIZE];
+static struct dns_table_entry IRAM_DATA_ATTR dns_table[DNS_TABLE_SIZE];
 static ip_addr_t              dns_servers[DNS_MAX_SERVERS];
 /** Contiguous buffer for processing responses */
 //static u8_t                   dns_payload_buffer[LWIP_MEM_ALIGN_BUFFER(DNS_MSG_SIZE)];
--- a/app/modules/node.c
+++ b/app/modules/node.c
@ -771,7 +771,7 @@ LROT_BEGIN(node)
  LROT_FUNCENTRY( dsleepMax, dsleepMax )
  LROT_FUNCENTRY( sleep, node_sleep )
 #ifdef PMSLEEP_ENABLE
-  PMSLEEP_INT_MAP,
+  PMSLEEP_INT_MAP
 #endif
 #ifdef DEVELOPMENT_TOOLS
  LROT_FUNCENTRY( readrcr, node_readrcr )
--- a/app/spiffs/spiffs.c
+++ b/app/spiffs/spiffs.c
@ -28,10 +28,10 @@ static spiffs fs;
 #define MASK_1MB (0x100000-1)
 #define ALIGN (0x2000)

-static u8_t spiffs_work_buf[LOG_PAGE_SIZE*2];
+static u8_t IRAM_DATA_ATTR spiffs_work_buf[LOG_PAGE_SIZE*2];
 static u8_t spiffs_fds[sizeof(spiffs_fd) * SPIFFS_MAX_OPEN_FILES];
 #if SPIFFS_CACHE
-static u8_t myspiffs_cache[20 + (LOG_PAGE_SIZE+20)*4];
+static u8_t IRAM_DATA_ATTR myspiffs_cache[20 + (LOG_PAGE_SIZE+20)*4];
 #endif

 static s32_t my_spiffs_read(u32_t addr, u32_t size, u8_t *dst) {
--- a/app/user/user_main.c
+++ b/app/user/user_main.c
@ -144,7 +144,7 @@ void user_pre_init(void) {
        os_printf("system SPI FI size:%u, Flash size: %u\n", fs_size_code, flash_size );
    }

-    pt = os_malloc(i);  // We will work on and register a RAM copy of the PT
+    pt = os_malloc_iram(i);  // We will work on and register a copy of the PT in iRAM
    // Return if anything is amiss; The SDK will halt if the PT hasn't been registered
    if ( !rcr_pt || !pt || n * sizeof(partition_item_t) != i) {
        return;
--- a/ld/nodemcu.ld
+++ b/ld/nodemcu.ld
@ -124,6 +124,7 @@ SECTIONS
    /* *libwps.a:*(.literal .text) - tested that safe to keep in iROM */

    *(.iram.text .iram0.text .iram0.text.*)
+    *(.iram0.data.*)

    *(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)

--- a/tools/nodemcu-partition.py
+++ b/tools/nodemcu-partition.py
@ -22,7 +22,8 @@

 import os
 import sys
-sys.path.append(os.path.realpath(os.path.dirname(__file__) + '/toolchains/'))
+print os.path.dirname(os.path.realpath(__file__))
+sys.path.append(os.path.dirname(os.path.realpath(__file__)) + '/toolchains/')
 import esptool

 import io