Arnim Läuger
416d53eb39
Add string support for spi.set_mosi() and spi.get_miso() ( #1753 )
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clean-up endianess handling in spi driver
2017-02-06 13:55:26 +01:00
Arnim Läuger
ecf8bd98d6
Add FatFs and SD card support ( #1397 )
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* Add FatFs
* enable BUILD_FATFS for all-module build
* push vfs into rest of firmware
* align maximum filename length
* increase timeout for acmd41 during card initialization
* switch from DOS to Unix path semantics chdrive() is substituted by chdir()
* update to fatfs R.012a incl. patches 1-6
* add callback for rtc provisioning in file
* update docs
2016-09-05 20:17:13 +02:00
Arnim Läuger
d445ae97fb
Enable spi clock_div < 4. ( #1283 )
2016-06-15 21:01:52 +02:00
Jason Follas
e16204d4f4
Corrected SPI CPOL/CPHA relationships
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* Corrected CPOL/CPHA relationships
* Simplified to remove duplicated code
* Removed comments about when MISO is sampled. ESP seems to sample MISO on same clock edge as when MOSI is set.
2016-04-02 19:26:07 +02:00
Marcel Stör
2e37a52aaa
Merge pull request #1030 from devsaurus/spi_pinconfig
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Enable spi functionality on pins after internal config has been applied.
2016-02-10 07:06:13 +01:00
devsaurus
5d8848ecaf
Enable spi functionality on pins after internal config has been applied.
2016-02-09 23:26:40 +01:00
devsaurus
dc2e1efefb
Extend data type for spi miso/mosi buffer offset to 16 bit.
2016-02-09 22:05:05 +01:00
jfollas
bf74b617d0
SPI: Implemented CPOL=1
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Reference: http://bbs.espressif.com/viewtopic.php?f=49&t=1570
2016-01-13 22:39:15 -05:00
devsaurus
9444ae28df
simplify spi api
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duplex_mode configuration enables/disables receiving with spi.send()
spi.send_recv removed
2015-10-27 23:30:33 +01:00
devsaurus
7d77398921
introduce full/half duplex transactions and add spi.send_recv()
2015-10-25 22:58:06 +01:00
devsaurus
19092712e5
remove obsolete spi_mast_send and rename platform_spi_send
2015-10-18 11:13:56 +02:00
devsaurus
f238673772
rework of (H)SPI API
2015-10-18 11:13:55 +02:00
devsaurus
9cde0bbb83
add SPI transaction support
2015-10-18 11:13:55 +02:00
devsaurus
4cf5f37450
address SPI_CLKDIV_PRE requirements
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* respect N-1
* avoid range overflow
2015-10-04 16:57:50 +02:00
devsaurus
ac50f9c6a5
add divider for arbitrary HSPI clock frequencies
2015-10-04 00:40:21 +02:00
funshine
1740841e4f
fix #175
2015-02-05 01:42:14 +08:00
iabdalkader
3c16014641
Add SPI Module
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* Add SPI support (master mode only)
* Issue #50
2015-01-16 22:41:34 +02:00
funshine
cdd13b1af3
source file first commit, folder structure refact
2014-12-22 19:35:05 +08:00