580 lines
15 KiB
C
580 lines
15 KiB
C
// Platform-dependent functions
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#include "platform.h"
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#include "c_stdio.h"
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#include "c_string.h"
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#include "c_stdlib.h"
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#include "gpio.h"
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#include "user_interface.h"
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#include "driver/uart.h"
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// Platform specific includes
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static void pwms_init();
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int platform_init()
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{
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// Setup PWMs
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pwms_init();
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cmn_platform_init();
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// All done
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return PLATFORM_OK;
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}
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// ****************************************************************************
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// KEY_LED functions
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uint8_t platform_key_led( uint8_t level){
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uint8_t temp;
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gpio16_output_set(1); // set to high first, for reading key low level
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gpio16_input_conf();
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temp = gpio16_input_get();
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gpio16_output_conf();
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gpio16_output_set(level);
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return temp;
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}
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// ****************************************************************************
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// GPIO functions
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#ifdef GPIO_INTERRUPT_ENABLE
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extern void lua_gpio_unref(unsigned pin);
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#endif
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int platform_gpio_mode( unsigned pin, unsigned mode, unsigned pull )
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{
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// NODE_DBG("Function platform_gpio_mode() is called. pin_mux:%d, func:%d\n",pin_mux[pin],pin_func[pin]);
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if (pin >= NUM_GPIO)
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return -1;
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if(pin == 0){
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if(mode==PLATFORM_GPIO_INPUT)
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gpio16_input_conf();
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else
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gpio16_output_conf();
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return 1;
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}
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platform_pwm_close(pin); // closed from pwm module, if it is used in pwm
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switch(pull){
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case PLATFORM_GPIO_PULLUP:
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PIN_PULLUP_EN(pin_mux[pin]);
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break;
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case PLATFORM_GPIO_FLOAT:
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PIN_PULLUP_DIS(pin_mux[pin]);
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break;
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default:
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PIN_PULLUP_DIS(pin_mux[pin]);
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break;
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}
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switch(mode){
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case PLATFORM_GPIO_INPUT:
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#ifdef GPIO_INTERRUPT_ENABLE
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lua_gpio_unref(pin); // unref the lua ref call back.
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#endif
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GPIO_DIS_OUTPUT(pin_num[pin]);
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case PLATFORM_GPIO_OUTPUT:
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ETS_GPIO_INTR_DISABLE();
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#ifdef GPIO_INTERRUPT_ENABLE
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pin_int_type[pin] = GPIO_PIN_INTR_DISABLE;
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#endif
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PIN_FUNC_SELECT(pin_mux[pin], pin_func[pin]);
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//disable interrupt
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gpio_pin_intr_state_set(GPIO_ID_PIN(pin_num[pin]), GPIO_PIN_INTR_DISABLE);
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//clear interrupt status
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(pin_num[pin]));
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GPIO_REG_WRITE(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin])), GPIO_REG_READ(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin]))) & (~ GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_ENABLE))); //disable open drain;
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ETS_GPIO_INTR_ENABLE();
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break;
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#ifdef GPIO_INTERRUPT_ENABLE
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case PLATFORM_GPIO_INT:
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ETS_GPIO_INTR_DISABLE();
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PIN_FUNC_SELECT(pin_mux[pin], pin_func[pin]);
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GPIO_DIS_OUTPUT(pin_num[pin]);
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gpio_register_set(GPIO_PIN_ADDR(GPIO_ID_PIN(pin_num[pin])), GPIO_PIN_INT_TYPE_SET(GPIO_PIN_INTR_DISABLE)
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| GPIO_PIN_PAD_DRIVER_SET(GPIO_PAD_DRIVER_DISABLE)
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| GPIO_PIN_SOURCE_SET(GPIO_AS_PIN_SOURCE));
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ETS_GPIO_INTR_ENABLE();
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break;
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#endif
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default:
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break;
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}
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return 1;
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}
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int platform_gpio_write( unsigned pin, unsigned level )
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{
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// NODE_DBG("Function platform_gpio_write() is called. pin:%d, level:%d\n",GPIO_ID_PIN(pin_num[pin]),level);
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if (pin >= NUM_GPIO)
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return -1;
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if(pin == 0){
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gpio16_output_conf();
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gpio16_output_set(level);
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return 1;
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}
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GPIO_OUTPUT_SET(GPIO_ID_PIN(pin_num[pin]), level);
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}
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int platform_gpio_read( unsigned pin )
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{
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// NODE_DBG("Function platform_gpio_read() is called. pin:%d\n",GPIO_ID_PIN(pin_num[pin]));
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if (pin >= NUM_GPIO)
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return -1;
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if(pin == 0){
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// gpio16_input_conf();
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return 0x1 & gpio16_input_get();
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}
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// GPIO_DIS_OUTPUT(pin_num[pin]);
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return 0x1 & GPIO_INPUT_GET(GPIO_ID_PIN(pin_num[pin]));
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}
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#ifdef GPIO_INTERRUPT_ENABLE
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static void platform_gpio_intr_dispatcher( platform_gpio_intr_handler_fn_t cb){
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uint8 i, level;
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uint32 gpio_status = GPIO_REG_READ(GPIO_STATUS_ADDRESS);
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for (i = 0; i < GPIO_PIN_NUM; i++) {
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if (pin_int_type[i] && (gpio_status & BIT(pin_num[i])) ) {
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//disable interrupt
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gpio_pin_intr_state_set(GPIO_ID_PIN(pin_num[i]), GPIO_PIN_INTR_DISABLE);
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//clear interrupt status
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, gpio_status & BIT(pin_num[i]));
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level = 0x1 & GPIO_INPUT_GET(GPIO_ID_PIN(pin_num[i]));
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if(cb){
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cb(i, level);
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}
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gpio_pin_intr_state_set(GPIO_ID_PIN(pin_num[i]), pin_int_type[i]);
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}
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}
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}
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void platform_gpio_init( platform_gpio_intr_handler_fn_t cb )
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{
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ETS_GPIO_INTR_ATTACH(platform_gpio_intr_dispatcher, cb);
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}
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int platform_gpio_intr_init( unsigned pin, GPIO_INT_TYPE type )
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{
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if (pin >= NUM_GPIO)
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return -1;
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ETS_GPIO_INTR_DISABLE();
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//clear interrupt status
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GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, BIT(pin_num[pin]));
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pin_int_type[pin] = type;
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//enable interrupt
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gpio_pin_intr_state_set(GPIO_ID_PIN(pin_num[pin]), type);
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ETS_GPIO_INTR_ENABLE();
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}
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#endif
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// ****************************************************************************
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// UART
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// TODO: Support timeouts.
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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uint32_t platform_uart_setup( unsigned id, uint32_t baud, int databits, int parity, int stopbits )
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{
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switch( baud )
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{
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case BIT_RATE_300:
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case BIT_RATE_600:
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case BIT_RATE_1200:
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case BIT_RATE_2400:
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case BIT_RATE_4800:
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case BIT_RATE_9600:
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case BIT_RATE_19200:
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case BIT_RATE_38400:
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case BIT_RATE_57600:
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case BIT_RATE_74880:
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case BIT_RATE_115200:
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case BIT_RATE_230400:
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case BIT_RATE_460800:
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case BIT_RATE_921600:
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case BIT_RATE_1843200:
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case BIT_RATE_3686400:
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UartDev.baut_rate = baud;
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break;
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default:
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UartDev.baut_rate = BIT_RATE_9600;
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break;
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}
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switch( databits )
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{
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case 5:
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UartDev.data_bits = FIVE_BITS;
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break;
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case 6:
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UartDev.data_bits = SIX_BITS;
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break;
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case 7:
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UartDev.data_bits = SEVEN_BITS;
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break;
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case 8:
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UartDev.data_bits = EIGHT_BITS;
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break;
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default:
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UartDev.data_bits = EIGHT_BITS;
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break;
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}
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switch (stopbits)
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{
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case PLATFORM_UART_STOPBITS_1:
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UartDev.stop_bits = ONE_STOP_BIT;
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break;
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case PLATFORM_UART_STOPBITS_2:
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UartDev.stop_bits = TWO_STOP_BIT;
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break;
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default:
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UartDev.stop_bits = ONE_STOP_BIT;
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break;
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}
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switch (parity)
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{
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case PLATFORM_UART_PARITY_EVEN:
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UartDev.parity = EVEN_BITS;
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break;
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case PLATFORM_UART_PARITY_ODD:
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UartDev.parity = ODD_BITS;
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break;
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default:
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UartDev.parity = NONE_BITS;
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break;
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}
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uart_setup(id);
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return baud;
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}
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// Send: version with and without mux
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void platform_uart_send( unsigned id, u8 data )
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{
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uart_tx_one_char(id, data);
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}
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// ****************************************************************************
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// PWMs
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static uint16_t pwms_duty[NUM_PWM] = {0};
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static void pwms_init()
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{
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int i;
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for(i=0;i<NUM_PWM;i++){
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pwms_duty[i] = DUTY(0);
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}
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pwm_init(500, NULL);
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// NODE_DBG("Function pwms_init() is called.\n");
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}
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// Return the PWM clock
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// NOTE: Can't find a function to query for the period set for the timer,
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// therefore using the struct.
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// This may require adjustment if driver libraries are updated.
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uint32_t platform_pwm_get_clock( unsigned pin )
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{
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// NODE_DBG("Function platform_pwm_get_clock() is called.\n");
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if( pin >= NUM_PWM)
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return 0;
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if(!pwm_exist(pin))
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return 0;
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return (uint32_t)pwm_get_freq(pin);
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}
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// Set the PWM clock
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uint32_t platform_pwm_set_clock( unsigned pin, uint32_t clock )
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{
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// NODE_DBG("Function platform_pwm_set_clock() is called.\n");
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if( pin >= NUM_PWM)
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return 0;
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if(!pwm_exist(pin))
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return 0;
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pwm_set_freq((uint16_t)clock, pin);
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pwm_start();
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return (uint32_t)pwm_get_freq( pin );
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}
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uint32_t platform_pwm_get_duty( unsigned pin )
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{
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// NODE_DBG("Function platform_pwm_get_duty() is called.\n");
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if( pin < NUM_PWM){
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if(!pwm_exist(pin))
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return 0;
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// return NORMAL_DUTY(pwm_get_duty(pin));
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return pwms_duty[pin];
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}
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return 0;
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}
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// Set the PWM duty
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uint32_t platform_pwm_set_duty( unsigned pin, uint32_t duty )
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{
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// NODE_DBG("Function platform_pwm_set_duty() is called.\n");
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if ( pin < NUM_PWM)
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{
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if(!pwm_exist(pin))
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return 0;
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pwm_set_duty(DUTY(duty), pin);
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} else {
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return 0;
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}
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pwm_start();
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pwms_duty[pin] = NORMAL_DUTY(pwm_get_duty(pin));
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return pwms_duty[pin];
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}
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uint32_t platform_pwm_setup( unsigned pin, uint32_t frequency, unsigned duty )
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{
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uint32_t clock;
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if ( pin < NUM_PWM)
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{
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platform_gpio_mode(pin, PLATFORM_GPIO_OUTPUT, PLATFORM_GPIO_FLOAT); // disable gpio interrupt first
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if(!pwm_add(pin))
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return 0;
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// pwm_set_duty(DUTY(duty), pin);
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pwm_set_duty(0, pin);
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pwms_duty[pin] = duty;
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pwm_set_freq((uint16_t)frequency, pin);
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} else {
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return 0;
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}
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clock = platform_pwm_get_clock( pin );
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pwm_start();
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return clock;
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}
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void platform_pwm_close( unsigned pin )
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{
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// NODE_DBG("Function platform_pwm_stop() is called.\n");
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if ( pin < NUM_PWM)
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{
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pwm_delete(pin);
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pwm_start();
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}
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}
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void platform_pwm_start( unsigned pin )
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{
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// NODE_DBG("Function platform_pwm_start() is called.\n");
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if ( pin < NUM_PWM)
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{
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if(!pwm_exist(pin))
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return;
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pwm_set_duty(DUTY(pwms_duty[pin]), pin);
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pwm_start();
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}
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}
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void platform_pwm_stop( unsigned pin )
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{
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// NODE_DBG("Function platform_pwm_stop() is called.\n");
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if ( pin < NUM_PWM)
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{
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if(!pwm_exist(pin))
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return;
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pwm_set_duty(0, pin);
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pwm_start();
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}
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}
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// *****************************************************************************
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// I2C platform interface
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uint32_t platform_i2c_setup( unsigned id, uint8_t sda, uint8_t scl, uint32_t speed ){
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if (sda >= NUM_GPIO || scl >= NUM_GPIO)
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return 0;
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// platform_pwm_close(sda);
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// platform_pwm_close(scl);
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// disable gpio interrupt first
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platform_gpio_mode(sda, PLATFORM_GPIO_INPUT, PLATFORM_GPIO_PULLUP); // inside this func call platform_pwm_close
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platform_gpio_mode(scl, PLATFORM_GPIO_INPUT, PLATFORM_GPIO_PULLUP); // disable gpio interrupt first
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i2c_master_gpio_init(sda, scl);
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return PLATFORM_I2C_SPEED_SLOW;
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}
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void platform_i2c_send_start( unsigned id ){
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i2c_master_start();
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}
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void platform_i2c_send_stop( unsigned id ){
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i2c_master_stop();
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}
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int platform_i2c_send_address( unsigned id, uint16_t address, int direction ){
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// Convert enum codes to R/w bit value.
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// If TX == 0 and RX == 1, this test will be removed by the compiler
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if ( ! ( PLATFORM_I2C_DIRECTION_TRANSMITTER == 0 &&
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PLATFORM_I2C_DIRECTION_RECEIVER == 1 ) ) {
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direction = ( direction == PLATFORM_I2C_DIRECTION_TRANSMITTER ) ? 0 : 1;
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}
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i2c_master_writeByte( (uint8_t) ((address << 1) | direction ));
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// Low-level returns nack (0=acked); we return ack (1=acked).
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return ! i2c_master_getAck();
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}
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int platform_i2c_send_byte( unsigned id, uint8_t data ){
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i2c_master_writeByte(data);
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// Low-level returns nack (0=acked); we return ack (1=acked).
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return ! i2c_master_getAck();
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}
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int platform_i2c_recv_byte( unsigned id, int ack ){
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uint8_t r = i2c_master_readByte();
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i2c_master_setAck( !ack );
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return r;
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}
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static uint8_t platform_spi_fdplx[NUM_SPI] = {0, 0};
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// *****************************************************************************
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// SPI platform interface
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uint32_t platform_spi_setup( uint8_t id, int mode, unsigned cpol, unsigned cpha,
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uint32_t clock_div, uint8 full_duplex )
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{
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platform_spi_fdplx[id] = full_duplex;
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spi_master_init( id, cpol, cpha, clock_div, full_duplex );
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return 1;
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}
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int platform_spi_send( uint8_t id, uint8_t bitlen, spi_data_type data )
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{
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if (bitlen > 32)
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return PLATFORM_ERR;
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spi_mast_transaction( id, 0, 0, bitlen, data, 0, 0, 0 );
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return PLATFORM_OK;
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}
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spi_data_type platform_spi_send_recv( uint8_t id, uint8_t bitlen, spi_data_type data )
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{
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if (bitlen > 32)
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return 0;
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spi_mast_set_mosi( id, 0, bitlen, data );
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spi_mast_transaction( id, 0, 0, 0, 0, bitlen, 0, platform_spi_fdplx[id] > 0 ? 0 : bitlen );
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return spi_mast_get_miso( id, 0, bitlen );
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}
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int platform_spi_set_mosi( uint8_t id, uint8_t offset, uint8_t bitlen, spi_data_type data )
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{
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if (offset + bitlen > 512)
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return PLATFORM_ERR;
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spi_mast_set_mosi( id, offset, bitlen, data );
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return PLATFORM_OK;
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}
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spi_data_type platform_spi_get_miso( uint8_t id, uint8_t offset, uint8_t bitlen )
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{
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if (offset + bitlen > 512)
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return 0;
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return spi_mast_get_miso( id, offset, bitlen );
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}
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int platform_spi_transaction( uint8_t id, uint8_t cmd_bitlen, spi_data_type cmd_data,
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uint8_t addr_bitlen, spi_data_type addr_data,
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uint8_t mosi_bitlen, uint8_t dummy_bitlen, uint8_t miso_bitlen )
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{
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if ((cmd_bitlen > 16) ||
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(addr_bitlen > 32) ||
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(mosi_bitlen > 512) ||
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(dummy_bitlen > 256) ||
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(miso_bitlen > 512))
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return PLATFORM_ERR;
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spi_mast_transaction( id, cmd_bitlen, cmd_data, addr_bitlen, addr_data, mosi_bitlen, dummy_bitlen, miso_bitlen );
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return PLATFORM_OK;
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}
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// ****************************************************************************
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// Flash access functions
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/*
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* Assumptions:
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* > toaddr is INTERNAL_FLASH_WRITE_UNIT_SIZE aligned
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* > size is a multiple of INTERNAL_FLASH_WRITE_UNIT_SIZE
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*/
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uint32_t platform_s_flash_write( const void *from, uint32_t toaddr, uint32_t size )
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{
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toaddr -= INTERNAL_FLASH_START_ADDRESS;
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SpiFlashOpResult r;
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const uint32_t blkmask = INTERNAL_FLASH_WRITE_UNIT_SIZE - 1;
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uint32_t *apbuf = NULL;
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uint32_t fromaddr = (uint32_t)from;
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if( (fromaddr & blkmask ) || (fromaddr >= INTERNAL_FLASH_START_ADDRESS)) {
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apbuf = (uint32_t *)c_malloc(size);
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if(!apbuf)
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return 0;
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c_memcpy(apbuf, from, size);
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}
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system_soft_wdt_feed ();
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r = flash_write(toaddr, apbuf?(uint32 *)apbuf:(uint32 *)from, size);
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if(apbuf)
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c_free(apbuf);
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if(SPI_FLASH_RESULT_OK == r)
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return size;
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else{
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NODE_ERR( "ERROR in flash_write: r=%d at %08X\n", ( int )r, ( unsigned )toaddr+INTERNAL_FLASH_START_ADDRESS );
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return 0;
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}
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}
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/*
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* Assumptions:
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* > fromaddr is INTERNAL_FLASH_READ_UNIT_SIZE aligned
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* > size is a multiple of INTERNAL_FLASH_READ_UNIT_SIZE
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*/
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uint32_t platform_s_flash_read( void *to, uint32_t fromaddr, uint32_t size )
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{
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if (size==0)
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return 0;
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fromaddr -= INTERNAL_FLASH_START_ADDRESS;
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SpiFlashOpResult r;
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system_soft_wdt_feed ();
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const uint32_t blkmask = (INTERNAL_FLASH_READ_UNIT_SIZE - 1);
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if( ((uint32_t)to) & blkmask )
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{
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uint32_t size2=size-INTERNAL_FLASH_READ_UNIT_SIZE;
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uint32* to2=(uint32*)((((uint32_t)to)&(~blkmask))+INTERNAL_FLASH_READ_UNIT_SIZE);
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r = flash_read(fromaddr, to2, size2);
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if(SPI_FLASH_RESULT_OK == r)
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{
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os_memmove(to,to2,size2);
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char back[ INTERNAL_FLASH_READ_UNIT_SIZE ] __attribute__ ((aligned(INTERNAL_FLASH_READ_UNIT_SIZE)));
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r=flash_read(fromaddr+size2,(uint32*)back,INTERNAL_FLASH_READ_UNIT_SIZE);
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os_memcpy((uint8_t*)to+size2,back,INTERNAL_FLASH_READ_UNIT_SIZE);
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}
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}
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else
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r = flash_read(fromaddr, (uint32 *)to, size);
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if(SPI_FLASH_RESULT_OK == r)
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return size;
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else{
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NODE_ERR( "ERROR in flash_read: r=%d at %08X\n", ( int )r, ( unsigned )fromaddr+INTERNAL_FLASH_START_ADDRESS );
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return 0;
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}
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}
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int platform_flash_erase_sector( uint32_t sector_id )
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{
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system_soft_wdt_feed ();
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return flash_erase( sector_id ) == SPI_FLASH_RESULT_OK ? PLATFORM_OK : PLATFORM_ERR;
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}
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