242 lines
7.4 KiB
C
242 lines
7.4 KiB
C
/**
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* @section License
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017, Thomas Barth, barth-dev.de
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include "CAN.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/queue.h"
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#include "esp_intr_alloc.h"
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#include "soc/dport_reg.h"
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#include <math.h>
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#include "driver/gpio.h"
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#include "can_regdef.h"
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#include "CAN_config.h"
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static void CAN_read_frame();
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static void CAN_isr(void *arg_p);
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static void CAN_isr(void *arg_p){
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uint8_t interrupt;
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// Read interrupt status and clears flags
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interrupt = MODULE_CAN->IR.U;
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// Handle TX complete interrupt
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if ((interrupt & __CAN_IRQ_TX) != 0) {
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}
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// Handle RX frame available interrupt
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if ((interrupt & __CAN_IRQ_RX) != 0) {
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if (CAN_cfg.rx_queue == NULL)
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return;
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CAN_read_frame();
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}
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// Handle error interrupts.
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if ((interrupt & (__CAN_IRQ_ERR //0x4
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| __CAN_IRQ_DATA_OVERRUN //0x8
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| __CAN_IRQ_WAKEUP //0x10
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| __CAN_IRQ_ERR_PASSIVE //0x20
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| __CAN_IRQ_ARB_LOST //0x40
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| __CAN_IRQ_BUS_ERR //0x80
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)) != 0) {
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}
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}
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static void CAN_read_frame(){
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//byte iterator
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uint8_t __byte_i;
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//frame read buffer
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CAN_frame_t __frame;
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// for extended format frames, FF is 1.
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if(MODULE_CAN->MBX_CTRL.FCTRL.FIR.B.FF==1){
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//Get Message ID
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__frame.MsgID = (((uint32_t)MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[0] << 21)
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| (MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[1] << 13)
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| (MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[2] << 5)
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| (MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[3] >> 3));
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//get DLC
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__frame.DLC = MODULE_CAN->MBX_CTRL.FCTRL.FIR.B.DLC;
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__frame.Extended = 1;
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//deep copy data bytes
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for(__byte_i=0;__byte_i<__frame.DLC;__byte_i++)
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__frame.data.u8[__byte_i]=MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.data[__byte_i];
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} else {
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//Get Message ID
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__frame.MsgID = (((uint32_t)MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.STD.ID[0] << 3) | (MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.STD.ID[1]>>5));
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//get DLC
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__frame.DLC = MODULE_CAN->MBX_CTRL.FCTRL.FIR.B.DLC;
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__frame.Extended = 0;
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//deep copy data bytes
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for(__byte_i=0;__byte_i<__frame.DLC;__byte_i++)
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__frame.data.u8[__byte_i]=MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.STD.data[__byte_i];
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}
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// Let the hardware know the frame has been read.
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MODULE_CAN->CMR.B.RRB=1;
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//send frame to input queue
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xQueueSendFromISR(CAN_cfg.rx_queue,&__frame,0);
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}
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int CAN_write_frame(const CAN_frame_t* p_frame){
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//byte iterator
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uint8_t __byte_i;
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if(p_frame->Extended) {
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MODULE_CAN->MBX_CTRL.FCTRL.FIR.U=p_frame->DLC | 0x80;
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//Write message ID
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[0] = ((p_frame->MsgID & 0x1fe00000) >> 21);
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[1] = ((p_frame->MsgID & 0x001fe000) >> 13);
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[2] = ((p_frame->MsgID & 0x00001fe0) >> 5);
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.ID[3] = ((p_frame->MsgID & 0x0000001f) << 3);
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// Copy the frame data to the hardware
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for(__byte_i=0;__byte_i<p_frame->DLC;__byte_i++)
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.EXT.data[__byte_i]=p_frame->data.u8[__byte_i];
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} else {
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//set frame format to standard and no RTR (needs to be done in a single write)
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MODULE_CAN->MBX_CTRL.FCTRL.FIR.U=p_frame->DLC;
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//Write message ID
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.STD.ID[0] = ((p_frame->MsgID) >> 3);
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.STD.ID[1] = ((p_frame->MsgID) << 5);
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// Copy the frame data to the hardware
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for(__byte_i=0;__byte_i<p_frame->DLC;__byte_i++)
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MODULE_CAN->MBX_CTRL.FCTRL.TX_RX.STD.data[__byte_i]=p_frame->data.u8[__byte_i];
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}
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// Transmit frame
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MODULE_CAN->CMR.B.TR=1;
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return 0;
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}
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int CAN_init(){
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//enable module
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DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_CAN_CLK_EN);
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DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_CAN_RST);
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//configure TX pin
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gpio_set_direction(CAN_cfg.tx_pin_id,GPIO_MODE_OUTPUT);
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gpio_matrix_out(CAN_cfg.tx_pin_id,CAN_TX_IDX,0,0);
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gpio_pad_select_gpio(CAN_cfg.tx_pin_id);
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//configure RX pin
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gpio_set_direction(CAN_cfg.rx_pin_id,GPIO_MODE_INPUT);
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gpio_matrix_in(CAN_cfg.rx_pin_id,CAN_RX_IDX,0);
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gpio_pad_select_gpio(CAN_cfg.rx_pin_id);
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//set to PELICAN mode
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MODULE_CAN->CDR.B.CAN_M=0x1;
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//synchronization jump width is the same for all baud rates
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MODULE_CAN->BTR0.B.SJW =0x1;
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//select time quantum and set TSEG1
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switch(CAN_cfg.speed){
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case CAN_SPEED_1000KBPS:
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case CAN_SPEED_800KBPS:
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MODULE_CAN->BTR1.B.TSEG1 = 8 - 1;
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MODULE_CAN->BTR1.B.TSEG2 = 1 - 1;
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MODULE_CAN->BTR0.B.BRP = APB_CLK_FREQ / CAN_cfg.speed / 2000 / (1 + 8 + 1) - 1;
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break;
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default:
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MODULE_CAN->BTR1.B.TSEG1 = 13 - 1;
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MODULE_CAN->BTR1.B.TSEG2 = 2 - 1;
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MODULE_CAN->BTR0.B.BRP = APB_CLK_FREQ / CAN_cfg.speed/ 2000 / (1 + 13 + 2) - 1;
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}
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/* Set sampling
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* 1 -> triple; the bus is sampled three times; recommended for low/medium speed buses (class A and B) where filtering spikes on the bus line is beneficial
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* 0 -> single; the bus is sampled once; recommended for high speed buses (SAE class C)*/
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MODULE_CAN->BTR1.B.SAM =0x1;
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//enable all interrupts
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MODULE_CAN->IER.U = 0xff;
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MODULE_CAN->MOD.B.AFM = CAN_cfg.dual_filter? 0 : 1;
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//no acceptance filtering, as we want to fetch all messages
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MODULE_CAN->MBX_CTRL.ACC.CODE[0] = CAN_cfg.code >> 24;
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MODULE_CAN->MBX_CTRL.ACC.CODE[1] = (CAN_cfg.code >> 16) & 0x00ff;
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MODULE_CAN->MBX_CTRL.ACC.CODE[2] = (CAN_cfg.code >> 8) & 0x00ff;
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MODULE_CAN->MBX_CTRL.ACC.CODE[3] = CAN_cfg.code & 0x00ff;
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MODULE_CAN->MBX_CTRL.ACC.MASK[0] = CAN_cfg.mask >> 24;
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MODULE_CAN->MBX_CTRL.ACC.MASK[1] = (CAN_cfg.mask >> 16) & 0x00ff;
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MODULE_CAN->MBX_CTRL.ACC.MASK[2] = (CAN_cfg.mask >> 8) & 0x00ff;
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MODULE_CAN->MBX_CTRL.ACC.MASK[3] = CAN_cfg.mask & 0x00ff;
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//set to normal mode
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MODULE_CAN->OCR.B.OCMODE=__CAN_OC_NOM;
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//clear error counters
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MODULE_CAN->TXERR.U = 0;
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MODULE_CAN->RXERR.U = 0;
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(void)MODULE_CAN->ECC;
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//clear interrupt flags
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(void)MODULE_CAN->IR.U;
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//install CAN ISR
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esp_intr_alloc(ETS_CAN_INTR_SOURCE,0,CAN_isr,NULL,NULL);
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//Showtime. Release Reset Mode.
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MODULE_CAN->MOD.B.RM = 0;
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return 0;
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}
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int CAN_stop(){
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MODULE_CAN->MOD.B.RM = 1;
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return 0;
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}
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