178 lines
5.3 KiB
C
178 lines
5.3 KiB
C
// Headers to the various functions in the rom (as we discover them)
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#ifndef _ROM_H_
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#define _ROM_H_
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#include "c_types.h"
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#include "ets_sys.h"
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/* Change GPIO pin output by setting, clearing, or disabling pins.
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* In general, it is expected that a bit will be set in at most one
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* of these masks. If a bit is clear in all masks, the output state
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* remains unchanged.
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*
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* There is no particular ordering guaranteed; so if the order of
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* writes is significant, calling code should divide a single call
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* into multiple calls.
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*/
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void gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask);
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/* Set the specified GPIO register to the specified value.
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* This is a very general and powerful interface that is not
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* expected to be used during normal operation. It is intended
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* mainly for debug, or for unusual requirements.
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*/
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void gpio_register_set(uint32_t reg_id, uint32_t value);
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// SHA1 is assumed to match the netbsd sha1.h headers
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#define SHA1_DIGEST_LENGTH 20
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#define SHA1_DIGEST_STRING_LENGTH 41
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typedef struct {
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uint32_t state[5];
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uint32_t count[2];
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uint8_t buffer[64];
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} SHA1_CTX;
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extern void SHA1Transform(uint32_t[5], const uint8_t[64]);
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extern void SHA1Init(SHA1_CTX *);
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extern void SHA1Final(uint8_t[SHA1_DIGEST_LENGTH], SHA1_CTX *);
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extern void SHA1Update(SHA1_CTX *, const uint8_t *, unsigned int);
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// MD5 is assumed to match the NetBSD md5.h header
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#define MD5_DIGEST_LENGTH 16
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typedef struct
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{
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uint32_t state[5];
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uint32_t count[2];
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uint8_t buffer[64];
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} MD5_CTX;
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extern void MD5Init(MD5_CTX *);
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extern void MD5Update(MD5_CTX *, const unsigned char *, unsigned int);
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extern void MD5Final(unsigned char[MD5_DIGEST_LENGTH], MD5_CTX *);
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// base64_encode/decode derived by Cal
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// Appears to match base64.h from netbsd wpa utils.
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extern unsigned char * base64_encode(const unsigned char *src, size_t len, size_t *out_len);
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extern unsigned char * base64_decode(const unsigned char *src, size_t len, size_t *out_len);
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// Unfortunately it that seems to require the ROM memory management to be
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// initialized because it uses mem_malloc
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// Interrupt Service Routine functions
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typedef void (*ets_isr_fn) (void *arg);
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extern int ets_isr_attach (unsigned int interrupt, ets_isr_fn, void *arg);
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extern void ets_isr_mask (unsigned intr);
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extern void ets_isr_unmask (unsigned intr);
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// 2, 3 = reset (module dependent?), 4 = wdt
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int rtc_get_reset_reason (void);
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// Hardware exception handling
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struct exception_frame
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{
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uint32_t epc;
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uint32_t ps;
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uint32_t sar;
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uint32_t unused;
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union {
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struct {
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uint32_t a0;
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// note: no a1 here!
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uint32_t a2;
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uint32_t a3;
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uint32_t a4;
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uint32_t a5;
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uint32_t a6;
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uint32_t a7;
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uint32_t a8;
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uint32_t a9;
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uint32_t a10;
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uint32_t a11;
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uint32_t a12;
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uint32_t a13;
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uint32_t a14;
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uint32_t a15;
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};
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uint32_t a_reg[15];
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};
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uint32_t cause;
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};
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/**
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* C-level exception handler callback prototype.
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*
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* Does not need an RFE instruction - it is called through a wrapper which
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* performs state capture & restore, as well as the actual RFE.
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*
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* @param ef An exception frame containing the relevant state from the
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* exception triggering. This state may be manipulated and will
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* be applied on return.
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* @param cause The exception cause number.
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*/
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typedef void (*exception_handler_fn) (struct exception_frame *ef, uint32_t cause);
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/**
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* Sets the exception handler function for a particular exception cause.
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* @param handler The exception handler to install.
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* If NULL, reverts to the XTOS default handler.
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* @returns The previous exception handler, or NULL if none existed prior.
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*/
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//exception_handler_fn _xtos_set_exception_handler (uint32_t cause, exception_handler_fn handler);
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void ets_update_cpu_frequency (uint32_t mhz);
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uint32_t ets_get_cpu_frequency (void);
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void *ets_memcpy (void *dst, const void *src, size_t n);
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void *ets_memmove (void *dst, const void *src, size_t n);
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void *ets_memset (void *dst, int c, size_t n);
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int ets_memcmp (const void *s1, const void *s2, size_t n);
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char *ets_strcpy (char *dst, const char *src);
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size_t ets_strlen (const char *s);
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int ets_strcmp (const char *s1, const char *s2);
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int ets_strncmp (const char *s1, const char *s2, size_t n);
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char *ets_strncpy(char *dest, const char *src, size_t n);
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char *ets_strstr(const char *haystack, const char *needle);
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void ets_delay_us (uint32_t us);
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int ets_printf(const char *format, ...) __attribute__ ((format (printf, 1, 2)));
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void ets_str2macaddr (uint8_t *dst, const char *str);
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typedef void (*ETSTimerFunc)(void *arg);
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typedef struct ETSTimer
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{
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struct ETSTimer *timer_next;
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void *timer_handle;
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uint32_t timer_expire;
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uint32_t timer_period;
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ETSTimerFunc timer_func;
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bool timer_repeat_flag;
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void *timer_arg;
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} ETSTimer;
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void ets_timer_disarm (ETSTimer *a);
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void ets_timer_setfn (ETSTimer *t, ETSTimerFunc *fn, void *parg);
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void Cache_Read_Enable(uint32_t b0, uint32_t b1, uint32_t use_40108000);
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void Cache_Read_Disable(void);
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void ets_intr_lock(void);
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void ets_intr_unlock(void);
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int rand(void);
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void srand(unsigned int);
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unsigned int uart_baudrate_detect(unsigned int uart_no, unsigned int async);
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/* Returns 0 on success, 1 on failure */
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uint8_t SPIRead(uint32_t src_addr, uint32_t *des_addr, uint32_t size);
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#endif
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