295 lines
9.1 KiB
Plaintext
295 lines
9.1 KiB
Plaintext
/* boot.bin @ 0x00000 */
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/* drom0.bin @ 0xX4000 */
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/* irom0_flash.bin @ 0xX0000+0x40000 */
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/* Flash Map */
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/* |..|...............|...........................................|..| */
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/* ^ ^ ^ ^ */
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/* |_boot.bin(0x0000) |_irom0_flash.bin(0xX0000+0x40000) | */
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/* |_drom0.bin(0xX4000) |_system param area(Flash size - 0x4000) */
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/* RAM Map */
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/* Pro CPU iRAM, Total len 0x28000 */
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/* |......................................................| */
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/* ^ */
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/* |_iram1_0 : 0x40040000 (0x20000) */
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/* |........| */
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/* ^ */
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/* |_cache for Pro CPU : (0x8000) */
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/* Share Memory, Total len 0x28000 */
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/* |..........| */
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/* ^ */
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/* |_dram0_0 : 0x3FFD8000 (dynamic len) */
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/* |................................................| */
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/* ^ */
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/* |_ heap area */
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/* |.....| */
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/* ^ */
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/* |_ used for Pro CPU's rom code : 0x3FFFC000 (0x4000) */
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/* NOTICE: */
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/* 1. drom0.bin + irom0_flash.bin = user.ota */
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/* 2. drom0.bin and irom0_flash.bin must locate at 0xX4000 and 0xX0000+0x40000, */
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/* here 0xX0000 must 256KB align. */
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/* 3. Make sure each user.ota not overlap other. */
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/* 4. Make sure each user.ota not overlap system param area or user param area. */
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/* 5. We support a maximum of 5 user.ota */
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/* 6. We support 1MB/2MB/4MB/8MB/16MB flash, */
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/* but make suer user.ota not exceed 16MB. */
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/* 7. rodata at drom0_0, drom0.bin. */
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/* 8. Pay attention to any modification. */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFD8000, len = 0x24000
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iram1_0_seg : org = 0x40040000, len = 0x20000
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irom0_0_seg : org = 0x40080010, len = 0x37FFF0
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drom0_0_seg : org = 0x3FE04010, len = 0x3BFF0
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}
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PHDRS
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{
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dport0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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iram1_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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drom0_0_phdr PT_LOAD;
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}
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/* Default entry point: */
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ENTRY(call_user_start)
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EXTERN(_Level2Vector)
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EXTERN(_Level3Vector)
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EXTERN(_Level4Vector)
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EXTERN(_Level5Vector)
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EXTERN(_DebugExceptionVector)
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EXTERN(_NMIExceptionVector)
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EXTERN(_KernelExceptionVector)
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EXTERN(_DoubleExceptionVector)
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PROVIDE(_memmap_vecbase_reset = 0x40000000);
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/* Various memory-map dependent cache attribute settings: */
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_memmap_cacheattr_wb_base = 0x00000110;
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_memmap_cacheattr_wt_base = 0x00000110;
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_memmap_cacheattr_bp_base = 0x00000220;
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_memmap_cacheattr_unused_mask = 0xFFFFF00F;
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_memmap_cacheattr_wb_trapnull = 0x2222211F;
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_memmap_cacheattr_wba_trapnull = 0x2222211F;
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_memmap_cacheattr_wbna_trapnull = 0x2222211F;
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_memmap_cacheattr_wt_trapnull = 0x2222211F;
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_memmap_cacheattr_bp_trapnull = 0x2222222F;
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_memmap_cacheattr_wb_strict = 0xFFFFF11F;
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_memmap_cacheattr_wt_strict = 0xFFFFF11F;
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_memmap_cacheattr_bp_strict = 0xFFFFF22F;
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_memmap_cacheattr_wb_allvalid = 0x22222112;
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_memmap_cacheattr_wt_allvalid = 0x22222112;
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_memmap_cacheattr_bp_allvalid = 0x22222222;
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PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
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SECTIONS
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{
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.dport0.rodata : ALIGN(4)
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{
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_dport0_rodata_start = ABSOLUTE(.);
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*(.dport0.rodata)
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*(.dport.rodata)
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_dport0_rodata_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.literal : ALIGN(4)
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{
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_dport0_literal_start = ABSOLUTE(.);
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*(.dport0.literal)
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*(.dport.literal)
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_dport0_literal_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.data : ALIGN(4)
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{
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_dport0_data_start = ABSOLUTE(.);
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*(.dport0.data)
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*(.dport.data)
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_dport0_data_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.drom0.text : ALIGN(4)
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{
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_drom0_text_start = ABSOLUTE(.);
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*(.drom0.literal .drom0.text.literal .drom0.text)
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*(.rodata*)
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_drom0_text_end = ABSOLUTE(.);
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} >drom0_0_seg :drom0_0_phdr
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.data : ALIGN(4)
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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.rodata : ALIGN(4)
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{
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_rodata_start = ABSOLUTE(.);
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*(.gnu.linkonce.r.*)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = (. + 3) & ~ 3;
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/* C++ constructor and destructor tables, properly ordered: */
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__init_array_start = ABSOLUTE(.);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4); /* this table MUST be 4-byte aligned */
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_bss_table_start = ABSOLUTE(.);
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LONG(_bss_start)
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LONG(_bss_end)
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_bss_table_end = ABSOLUTE(.);
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_rodata_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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.UserExceptionVector.literal : AT(LOADADDR(.rodata) + (ADDR(.UserExceptionVector.literal) - ADDR(.rodata))) ALIGN(4)
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{
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_UserExceptionVector_literal_start = ABSOLUTE(.);
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*(.UserExceptionVector.literal)
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_UserExceptionVector_literal_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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.bss ALIGN(8) (NOLOAD) : ALIGN(4)
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{
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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.share.mem (NOLOAD) : ALIGN(4)
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{
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_share_mem_start = ABSOLUTE(.);
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*(.share.mem)
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_share_mem_end = ABSOLUTE(.);
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_heap_sentry = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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_end = 0x3fffc000;
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.text : ALIGN(4)
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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. = 0x0;
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*(.WindowVectors.text)
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. = 0x180;
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*(.Level2InterruptVector.text)
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. = 0x1c0;
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*(.Level3InterruptVector.text)
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. = 0x200;
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*(.Level4InterruptVector.text)
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. = 0x240;
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*(.Level5InterruptVector.text)
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. = 0x280;
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*(.DebugExceptionVector.text)
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. = 0x2c0;
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*(.NMIExceptionVector.text)
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. = 0x300;
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*(.KernelExceptionVector.text)
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. = 0x340;
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*(.UserExceptionVector.text)
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. = 0x3c0;
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*(.DoubleExceptionVector.text)
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. = 0x400;
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*(.UserEnter.literal);
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*(.UserEnter.text);
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. = ALIGN (16);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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*(.iram1.*)
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*libmain.a:(.literal .text .literal.* .text.*)
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*libfreertos.a:(.literal .text .literal.* .text.*)
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*libpp.a:(.literal .text .literal.* .text.*)
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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} >iram1_0_seg :iram1_0_phdr
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.irom0.text : ALIGN(4)
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{
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_irom0_text_start = ABSOLUTE(.);
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*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
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*(.literal .text .literal.* .text.*)
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/* Link-time arrays containing the defs for the included modules */
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. = ALIGN(4);
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lua_libs = ABSOLUTE(.);
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/* Allow either empty define or defined-to-1 to include the module */
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KEEP(*(.lua_libs))
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LONG(0) LONG(0) /* Null-terminate the array */
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lua_rotable = ABSOLUTE(.);
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KEEP(*(.lua_rotable))
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LONG(0) LONG(0) /* Null-terminate the array */
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_irom0_text_end = ABSOLUTE(.);
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_flash_used_end = ABSOLUTE(.);
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} >irom0_0_seg :irom0_0_phdr
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.lit4 : ALIGN(4)
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{
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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} >iram1_0_seg :iram1_0_phdr
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}
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INCLUDE "pro.rom.addr.ld"
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