198 lines
6.3 KiB
C
198 lines
6.3 KiB
C
/*
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* Copyright 2016 Dius Computing Pty Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of the copyright holders nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* @author Johny Mattsson <jmattsson@dius.com.au>
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*/
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#include "driver/console.h"
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#include "driver/uart.h"
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#include "esp_intr_alloc.h"
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#include "soc/soc.h"
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#include "soc/uart_reg.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/queue.h"
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#include "sys/reent.h"
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#include <unistd.h>
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#include "rom/libc_stubs.h"
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#include "rom/uart.h"
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#define UART_INPUT_QUEUE_SZ 0x100
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// These used to be available in soc/uart_register.h:
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#define UART_GET_RXFIFO_RD_BYTE(i) GET_PERI_REG_BITS2(UART_FIFO_REG(i) , UART_RXFIFO_RD_BYTE_V, UART_RXFIFO_RD_BYTE_S)
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#define UART_GET_RXFIFO_CNT(i) GET_PERI_REG_BITS2(UART_STATUS_REG(i) , UART_RXFIFO_CNT_V, UART_RXFIFO_CNT_S)
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#define UART_SET_AUTOBAUD_EN(i,val) SET_PERI_REG_BITS(UART_AUTOBAUD_REG(i) ,UART_AUTOBAUD_EN_V,(val),UART_AUTOBAUD_EN_S)
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typedef int (*_read_r_fn) (struct _reent *r, int fd, void *buf, int size);
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static _read_r_fn _read_r_app;
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#if !defined(CONFIG_IDF_TARGET_ESP32C3)
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static _read_r_fn _read_r_pro;
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#endif
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static xQueueHandle uart0Q;
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static task_handle_t input_task = 0;
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// --- Syscall support for reading from STDIN_FILENO ---------------
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static int console_read_r (struct _reent *r, int fd, void *buf, int size, _read_r_fn next)
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{
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if (fd == STDIN_FILENO)
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{
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static _lock_t stdin_lock;
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_lock_acquire_recursive (&stdin_lock);
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char *c = (char *)buf;
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int i = 0;
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for (; i < size; ++i)
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{
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if (!console_getc (c++))
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break;
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}
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_lock_release_recursive (&stdin_lock);
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return i;
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}
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else if (next)
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return next (r, fd, buf, size);
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else
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return -1;
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}
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#if !defined(CONFIG_IDF_TARGET_ESP32C3)
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static int console_read_r_pro (struct _reent *r, int fd, void *buf, int size)
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{
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return console_read_r (r, fd, buf, size, _read_r_pro);
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}
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#endif
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static int console_read_r_app (struct _reent *r, int fd, void *buf, int size)
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{
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return console_read_r (r, fd, buf, size, _read_r_app);
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}
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// --- End syscall support -------------------------------------------
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static void uart0_rx_intr_handler (void *arg)
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{
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(void)arg;
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bool received = false;
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uint32_t status = READ_PERI_REG(UART_INT_ST_REG(CONSOLE_UART));
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while (status)
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{
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if (status & UART_FRM_ERR_INT_ENA)
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{
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// TODO: report somehow?
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WRITE_PERI_REG(UART_INT_CLR_REG(CONSOLE_UART), UART_FRM_ERR_INT_ENA);
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}
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if ((status & UART_RXFIFO_TOUT_INT_ENA) ||
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(status & UART_RXFIFO_FULL_INT_ENA))
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{
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uint32_t fifo_len = UART_GET_RXFIFO_CNT(CONSOLE_UART);
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for (uint32_t i = 0; i < fifo_len; ++i)
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{
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received = true;
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char c = UART_GET_RXFIFO_RD_BYTE(CONSOLE_UART);
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if (uart0Q)
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xQueueSendToBackFromISR (uart0Q, &c, NULL);
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}
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WRITE_PERI_REG(UART_INT_CLR_REG(CONSOLE_UART),
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UART_RXFIFO_TOUT_INT_ENA | UART_RXFIFO_FULL_INT_ENA);
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}
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status = READ_PERI_REG(UART_INT_ST_REG(CONSOLE_UART));
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}
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if (received && input_task)
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task_post_isr_low (input_task, false);
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}
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void console_setup (const ConsoleSetup_t *cfg)
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{
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esp_rom_uart_tx_wait_idle (CONSOLE_UART);
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uart_config_t uart_conf = {
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.baud_rate = cfg->bit_rate,
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.data_bits =
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cfg->data_bits == CONSOLE_NUM_BITS_5 ? UART_DATA_5_BITS :
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cfg->data_bits == CONSOLE_NUM_BITS_6 ? UART_DATA_6_BITS :
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cfg->data_bits == CONSOLE_NUM_BITS_7 ? UART_DATA_7_BITS :
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UART_DATA_8_BITS,
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.stop_bits =
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cfg->stop_bits == CONSOLE_STOP_BITS_1 ? UART_STOP_BITS_1 :
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cfg->stop_bits == CONSOLE_STOP_BITS_2 ? UART_STOP_BITS_2 :
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UART_STOP_BITS_1_5,
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.parity =
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cfg->parity == CONSOLE_PARITY_NONE ? UART_PARITY_DISABLE :
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cfg->parity == CONSOLE_PARITY_EVEN ? UART_PARITY_EVEN :
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UART_PARITY_ODD,
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
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};
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uart_param_config(CONSOLE_UART, &uart_conf);
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#if !defined(CONFIG_IDF_TARGET_ESP32C3)
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// TODO: Make this actually work
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UART_SET_AUTOBAUD_EN(CONSOLE_UART, cfg->auto_baud);
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#endif
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}
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void console_init (const ConsoleSetup_t *cfg, task_handle_t tsk)
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{
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input_task = tsk;
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uart0Q = xQueueCreate (UART_INPUT_QUEUE_SZ, sizeof (char));
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console_setup (cfg);
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uart_isr_register(CONSOLE_UART, uart0_rx_intr_handler, NULL, 0, NULL);
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uart_set_rx_timeout(CONSOLE_UART, 2);
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uart_set_rx_full_threshold(CONSOLE_UART, 10);
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uart_enable_intr_mask(CONSOLE_UART,
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UART_RXFIFO_TOUT_INT_ENA_M |
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UART_RXFIFO_FULL_INT_ENA_M |
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UART_FRM_ERR_INT_ENA_M);
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// Register our console_read_r_xxx functions to support stdin input
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#if defined(CONFIG_IDF_TARGET_ESP32C3)
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_read_r_app = syscall_table_ptr->_read_r;
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syscall_table_ptr->_read_r = console_read_r_app;
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#else
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_read_r_app = syscall_table_ptr_app->_read_r;
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_read_r_pro = syscall_table_ptr_pro->_read_r;
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syscall_table_ptr_app->_read_r = console_read_r_app;
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syscall_table_ptr_pro->_read_r = console_read_r_pro;
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#endif
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}
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bool console_getc (char *c)
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{
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return (uart0Q && (xQueueReceive (uart0Q, c, 0) == pdTRUE));
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}
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