From 3e903834990dd9b7fd00e0f89c61448289f9b002 Mon Sep 17 00:00:00 2001 From: joan Date: Sun, 21 Oct 2018 08:54:37 +0100 Subject: [PATCH] V67+: tided up I2C/SPI documentation --- pigpio.3 | 64 +++++++++++++++++++++++++++++++++++++++---------- pigpio.h | 40 +++++++++++++++++++++---------- pigpio.py | 62 +++++++++++++++++++++++------------------------ pigpiod_if.3 | 66 ++++++++++++++++++++++++++++++++++++++++----------- pigpiod_if.h | 42 +++++++++++++++++++++----------- pigpiod_if2.3 | 66 ++++++++++++++++++++++++++++++++++++++++----------- pigpiod_if2.h | 42 +++++++++++++++++++++----------- pigs.1 | 52 ++++++++++++++++++++++++++++++---------- 8 files changed, 308 insertions(+), 126 deletions(-) diff --git a/pigpio.3 b/pigpio.3 index a6ea7f2..0bb28c8 100644 --- a/pigpio.3 +++ b/pigpio.3 @@ -2644,6 +2644,21 @@ will be available if a kernel supported bus multiplexor is being used. .br +.br +The GPIO used are given in the following table. + +.br + +.br + SDA SCL +.br +I2C 0 0 1 +.br +I2C 1 2 3 +.br + +.br + .br Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR, PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED. @@ -4159,17 +4174,40 @@ active low chip select. .br .br -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the flags. -The auxiliary device has 3 chip selects and a selectable word -size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +.br + +.br +The main SPI has two chip selects (channels), the auxiliary has +three. + +.br + +.br +The auxiliary SPI is available on all models but the A and B. + +.br + +.br +The GPIO used are given in the following table. + +.br + +.br + MISO MOSI SCLK CE0 CE1 CE2 +.br +Main SPI 9 10 11 8 7 - +.br +Aux SPI 19 20 21 18 17 16 +.br .br .br .EX - spiChan: 0-1 (0-2 for the auxiliary SPI device) + spiChan: 0-1 (0-2 for the auxiliary SPI) .br baud: 32K-125M (values above 30M are unlikely to work) .br @@ -4209,7 +4247,7 @@ mm defines the SPI mode. .br .br -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. .br @@ -4242,40 +4280,40 @@ ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. .br .br -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. .br .br -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. .br .br nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. .br .br T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. .br .br R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. .br .br bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. .br diff --git a/pigpio.h b/pigpio.h index f9300ee..e9216f6 100644 --- a/pigpio.h +++ b/pigpio.h @@ -2296,6 +2296,12 @@ No flags are currently defined. This parameter should be set to zero. Physically buses 0 and 1 are available on the Pi. Higher numbered buses will be available if a kernel supported bus multiplexor is being used. +The GPIO used are given in the following table. + + @ SDA @ SCL +I2C 0 @ 0 @ 1 +I2C 1 @ 2 @ 3 + Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR, PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED. @@ -3151,13 +3157,21 @@ Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of 4-wire operation, mode 0, active low chip select. -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the flags. -The auxiliary device has 3 chip selects and a selectable word -size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +The main SPI has two chip selects (channels), the auxiliary has +three. + +The auxiliary SPI is available on all models but the A and B. + +The GPIO used are given in the following table. + + @ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2 +Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ - +Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16 . . - spiChan: 0-1 (0-2 for the auxiliary SPI device) + spiChan: 0-1 (0-2 for the auxiliary SPI) baud: 32K-125M (values above 30M are unlikely to work) spiFlags: see below . . @@ -3174,7 +3188,7 @@ spiFlags consists of the least significant 22 bits. mm defines the SPI mode. -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. . . Mode POL PHA @@ -3188,25 +3202,25 @@ px is 0 if CEx is active low (default) and 1 for active high. ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. The [*spiRead*], [*spiWrite*], and [*spiXfer*] functions transfer data packed into 1, 2, or 4 bytes according to diff --git a/pigpio.py b/pigpio.py index 1f1eca9..269c185 100644 --- a/pigpio.py +++ b/pigpio.py @@ -2598,15 +2598,16 @@ class pi(): i2c_address:= 0-0x7F. i2c_flags:= 0, no flags are currently defined. - Normally you would only use the [*i2c_**] functions if - you are or will be connecting to the Pi over a network. If - you will always run on the local Pi use the standard SMBus - module instead. - Physically buses 0 and 1 are available on the Pi. Higher numbered buses will be available if a kernel supported bus multiplexor is being used. + The GPIO used are given in the following table. + + @ SDA @ SCL + I2C 0 @ 0 @ 1 + I2C 1 @ 2 @ 3 + For the SMBus commands the low level transactions are shown at the end of the function description. The following abbreviations are used: @@ -3736,25 +3737,28 @@ class pi(): def spi_open(self, spi_channel, baud, spi_flags=0): """ - Returns a handle for the SPI device on channel. Data will be - transferred at baud bits per second. The flags may be used to - modify the default behaviour of 4-wire operation, mode 0, - active low chip select. + Returns a handle for the SPI device on the channel. Data + will be transferred at baud bits per second. The flags + may be used to modify the default behaviour of 4-wire + operation, mode 0, active low chip select. - An auxiliary SPI device is available on all models but the - A and B and may be selected by setting the A bit in the - flags. The auxiliary device has 3 chip selects and a - selectable word size in bits. + The Pi has two SPI peripherals: main and auxiliary. - spi_channel:= 0-1 (0-2 for the auxiliary SPI device). + The main SPI has two chip selects (channels), the auxiliary + has three. + + The auxiliary SPI is available on all models but the A and B. + + The GPIO used are given in the following table. + + @ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2 + Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ - + Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16 + + spi_channel:= 0-1 (0-2 for the auxiliary SPI). baud:= 32K-125M (values above 30M are unlikely to work). spi_flags:= see below. - Normally you would only use the [*spi_**] functions if - you are or will be connecting to the Pi over a network. If - you will always run on the local Pi use the standard SPI - module instead. - spi_flags consists of the least significant 22 bits. . . @@ -3765,7 +3769,7 @@ class pi(): mm defines the SPI mode. WARNING: modes 1 and 3 do not appear to work on - the auxiliary device. + the auxiliary SPI. . . Mode POL PHA @@ -3780,25 +3784,25 @@ class pi(): ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. - A is 0 for the standard SPI device, 1 for the auxiliary SPI. + A is 0 for the main SPI, 1 for the auxiliary SPI. W is 0 if the device is not 3-wire, 1 if the device is 3-wire. - Standard SPI device only. + Main SPI only. nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field - is ignored if W is not set. Standard SPI device only. + is ignored if W is not set. Main SPI only. T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out - first. Auxiliary SPI device only. + first. Auxiliary SPI only. R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit - first. Auxiliary SPI device only. + first. Auxiliary SPI only. bbbbbb defines the word size in bits (0-32). The default (0) - sets 8 bits per word. Auxiliary SPI device only. + sets 8 bits per word. Auxiliary SPI only. The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions transfer data packed into 1, 2, or 4 bytes according to @@ -5414,9 +5418,6 @@ def xref(): host: The name or IP address of the Pi running the pigpio daemon. - i2c_*: - One of the i2c_ functions. - i2c_address: 0-0x7F The address of a device on the I2C bus. @@ -5577,9 +5578,6 @@ def xref(): The default of True prints the probable failure reasons to standard output. - spi_*: - One of the spi_ functions. - spi_channel: 0-2 A SPI channel. diff --git a/pigpiod_if.3 b/pigpiod_if.3 index 52cfbc9..c079c78 100644 --- a/pigpiod_if.3 +++ b/pigpiod_if.3 @@ -2417,6 +2417,21 @@ will be available if a kernel supported bus multiplexor is being used. .br +.br +The GPIO used are given in the following table. + +.br + +.br + SDA SCL +.br +I2C 0 0 1 +.br +I2C 1 2 3 +.br + +.br + .br Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR, PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED. @@ -3323,7 +3338,7 @@ End .IP "\fBint spi_open(unsigned spi_channel, unsigned baud, unsigned spi_flags)\fP" .IP "" 4 -This function returns a handle for the SPI device on channel. +This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of 4-wire operation, mode 0, active low chip select. @@ -3331,17 +3346,40 @@ active low chip select. .br .br -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the -flags. The auxiliary device has 3 chip selects and a -selectable word size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +.br + +.br +The main SPI has two chip selects (channels), the auxiliary has +three. + +.br + +.br +The auxiliary SPI is available on all models but the A and B. + +.br + +.br +The GPIO used are given in the following table. + +.br + +.br + MISO MOSI SCLK CE0 CE1 CE2 +.br +Main SPI 9 10 11 8 7 - +.br +Aux SPI 19 20 21 18 17 16 +.br .br .br .EX -spi_channel: 0-1 (0-2 for the auxiliary SPI device). +spi_channel: 0-1 (0-2 for the auxiliary SPI). .br baud: 32K-125M (values above 30M are unlikely to work). .br @@ -3381,7 +3419,7 @@ mm defines the SPI mode. .br .br -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. .br @@ -3414,40 +3452,40 @@ ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. .br .br -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. .br .br -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. .br .br nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. .br .br T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. .br .br R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. .br .br bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. .br diff --git a/pigpiod_if.h b/pigpiod_if.h index 550d029..e2b52b4 100644 --- a/pigpiod_if.h +++ b/pigpiod_if.h @@ -1627,6 +1627,12 @@ No flags are currently defined. This parameter should be set to zero. Physically buses 0 and 1 are available on the Pi. Higher numbered buses will be available if a kernel supported bus multiplexor is being used. +The GPIO used are given in the following table. + + @ SDA @ SCL +I2C 0 @ 0 @ 1 +I2C 1 @ 2 @ 3 + Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR, PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED. @@ -2150,18 +2156,26 @@ D*/ /*F*/ int spi_open(unsigned spi_channel, unsigned baud, unsigned spi_flags); /*D -This function returns a handle for the SPI device on channel. +This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of 4-wire operation, mode 0, active low chip select. -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the -flags. The auxiliary device has 3 chip selects and a -selectable word size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +The main SPI has two chip selects (channels), the auxiliary has +three. + +The auxiliary SPI is available on all models but the A and B. + +The GPIO used are given in the following table. + + @ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2 +Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ - +Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16 . . -spi_channel: 0-1 (0-2 for the auxiliary SPI device). +spi_channel: 0-1 (0-2 for the auxiliary SPI). baud: 32K-125M (values above 30M are unlikely to work). spi_flags: see below. . . @@ -2178,7 +2192,7 @@ spi_flags consists of the least significant 22 bits. mm defines the SPI mode. -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. . . Mode POL PHA @@ -2192,25 +2206,25 @@ px is 0 if CEx is active low (default) and 1 for active high. ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions transfer data packed into 1, 2, or 4 bytes according to diff --git a/pigpiod_if2.3 b/pigpiod_if2.3 index 6357f88..d91c686 100644 --- a/pigpiod_if2.3 +++ b/pigpiod_if2.3 @@ -2870,6 +2870,21 @@ will be available if a kernel supported bus multiplexor is being used. .br +.br +The GPIO used are given in the following table. + +.br + +.br + SDA SCL +.br +I2C 0 0 1 +.br +I2C 1 2 3 +.br + +.br + .br Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR, PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED. @@ -4135,7 +4150,7 @@ int main(int argc, char *argv[]) .IP "\fBint spi_open(int pi, unsigned spi_channel, unsigned baud, unsigned spi_flags)\fP" .IP "" 4 -This function returns a handle for the SPI device on channel. +This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of 4-wire operation, mode 0, active low chip select. @@ -4143,10 +4158,33 @@ active low chip select. .br .br -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the -flags. The auxiliary device has 3 chip selects and a -selectable word size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +.br + +.br +The main SPI has two chip selects (channels), the auxiliary has +three. + +.br + +.br +The auxiliary SPI is available on all models but the A and B. + +.br + +.br +The GPIO used are given in the following table. + +.br + +.br + MISO MOSI SCLK CE0 CE1 CE2 +.br +Main SPI 9 10 11 8 7 - +.br +Aux SPI 19 20 21 18 17 16 +.br .br @@ -4155,7 +4193,7 @@ selectable word size in bits. .EX pi: >=0 (as returned by \fBpigpio_start\fP). .br -spi_channel: 0-1 (0-2 for the auxiliary device). +spi_channel: 0-1 (0-2 for the auxiliary SPI). .br baud: 32K-125M (values above 30M are unlikely to work). .br @@ -4195,7 +4233,7 @@ mm defines the SPI mode. .br .br -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. .br @@ -4228,40 +4266,40 @@ ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. .br .br -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. .br .br -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. .br .br nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. .br .br T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. .br .br R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. .br .br bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. .br diff --git a/pigpiod_if2.h b/pigpiod_if2.h index 76d6ab0..062f71c 100644 --- a/pigpiod_if2.h +++ b/pigpiod_if2.h @@ -1887,6 +1887,12 @@ No flags are currently defined. This parameter should be set to zero. Physically buses 0 and 1 are available on the Pi. Higher numbered buses will be available if a kernel supported bus multiplexor is being used. +The GPIO used are given in the following table. + + @ SDA @ SCL +I2C 0 @ 0 @ 1 +I2C 1 @ 2 @ 3 + Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR, PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED. @@ -2601,19 +2607,27 @@ D*/ /*F*/ int spi_open(int pi, unsigned spi_channel, unsigned baud, unsigned spi_flags); /*D -This function returns a handle for the SPI device on channel. +This function returns a handle for the SPI device on the channel. Data will be transferred at baud bits per second. The flags may be used to modify the default behaviour of 4-wire operation, mode 0, active low chip select. -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the -flags. The auxiliary device has 3 chip selects and a -selectable word size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +The main SPI has two chip selects (channels), the auxiliary has +three. + +The auxiliary SPI is available on all models but the A and B. + +The GPIO used are given in the following table. + + @ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2 +Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ - +Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16 . . pi: >=0 (as returned by [*pigpio_start*]). -spi_channel: 0-1 (0-2 for the auxiliary device). +spi_channel: 0-1 (0-2 for the auxiliary SPI). baud: 32K-125M (values above 30M are unlikely to work). spi_flags: see below. . . @@ -2630,7 +2644,7 @@ spi_flags consists of the least significant 22 bits. mm defines the SPI mode. -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. . . Mode POL PHA @@ -2644,25 +2658,25 @@ px is 0 if CEx is active low (default) and 1 for active high. ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions transfer data packed into 1, 2, or 4 bytes according to diff --git a/pigs.1 b/pigs.1 index df8fcb5..ebb0777 100644 --- a/pigs.1 +++ b/pigs.1 @@ -1845,6 +1845,18 @@ Physically buses 0 and 1 are available on the Pi. Higher numbered buses will be available if a kernel supported bus multiplexor is being used. +.br +The GPIO used are given in the following table. + +.br + +.EX + SDA SCL +I2C 0 0 1 +I2C 1 2 3 + +.EE + .br No flags are currently defined. The parameter \fBif\fP should be 0. @@ -3944,10 +3956,26 @@ Speeds between 32kbps and 125Mbps are allowed. Speeds above 30Mbps are unlikely to work. .br -An auxiliary SPI device is available on all models but the -A and B and may be selected by setting the A bit in the -flags. The auxiliary device has 3 chip selects and a -selectable word size in bits. +The Pi has two SPI peripherals: main and auxiliary. + +.br +The main SPI has two chip selects (channels), the auxiliary has +three. + +.br +The auxiliary SPI is available on all models but the A and B. + +.br +The GPIO used are given in the following table. + +.br + +.EX + MISO MOSI SCLK CE0 CE1 CE2 +Main SPI 9 10 11 8 7 - +Aux SPI 19 20 21 18 17 16 + +.EE .br The flags consists of the least significant 22 bits. @@ -3966,7 +3994,7 @@ The flags consists of the least significant 22 bits. mm defines the SPI mode. .br -Warning: modes 1 and 3 do not appear to work on the auxiliary device. +Warning: modes 1 and 3 do not appear to work on the auxiliary SPI. .br @@ -3991,30 +4019,30 @@ px is 0 if CEx is active low (default) and 1 for active high. ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise. .br -A is 0 for the standard SPI device, 1 for the auxiliary SPI. +A is 0 for the main SPI, 1 for the auxiliary SPI. .br -W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard -SPI device only. +W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main +SPI only. .br nnnn defines the number of bytes (0-15) to write before switching the MOSI line to MISO to read data. This field is ignored -if W is not set. Standard SPI device only. +if W is not set. Main SPI only. .br T is 1 if the least significant bit is transmitted on MOSI first, the default (0) shifts the most significant bit out first. Auxiliary SPI -device only. +only. .br R is 1 if the least significant bit is received on MISO first, the default (0) receives the most significant bit first. Auxiliary SPI -device only. +only. .br bbbbbb defines the word size in bits (0-32). The default (0) -sets 8 bits per word. Auxiliary SPI device only. +sets 8 bits per word. Auxiliary SPI only. .br The \fBSPIR\fP, \fBSPIW\fP, and \fBSPIX\fP commands transfer data