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V47

This commit is contained in:
joan 2016-03-01 21:41:36 +00:00
parent 89fca37587
commit 46eb4d6056
15 changed files with 1803 additions and 1486 deletions
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80
command.c
View File

@ -26,7 +26,7 @@ For more information, please refer to <http://unlicense.org/>
*/
/*
This version is for pigpio version 46+
This version is for pigpio version 47+
*/
#include <stdio.h>
@ -172,6 +172,7 @@ cmdInfo_t cmdInfo[]=
{PI_CMD_WVAG, "WVAG", 192, 2}, // gpioWaveAddGeneric
{PI_CMD_WVAS, "WVAS", 196, 2}, // gpioWaveAddSerial
{PI_CMD_WVTAT, "WVTAT", 101, 2}, // gpioWaveTxAt
{PI_CMD_WVBSY, "WVBSY", 101, 2}, // gpioWaveTxBusy
{PI_CMD_WVCHA, "WVCHA", 197, 0}, // gpioWaveChain
{PI_CMD_WVCLR, "WVCLR", 101, 0}, // gpioWaveClear
@ -235,15 +236,15 @@ cmdInfo_t cmdInfo[]=
char * cmdUsage = "\n\
BC1 bits Clear gpios in bank 1\n\
BC2 bits Clear gpios in bank 2\n\
BC1 bits Clear GPIO in bank 1\n\
BC2 bits Clear GPIO in bank 2\n\
BI2CC sda Close bit bang I2C\n\
BI2CO sda scl baud | Open bit bang I2C\n\
BI2CZ sda ... I2C bit bang multiple transactions\n\
BR1 Read bank 1 gpios\n\
BR2 Read bank 2 gpios\n\
BS1 bits Set gpios in bank 2\n\
BS2 bits Set gpios in bank 2\n\
BR1 Read bank 1 GPIO\n\
BR2 Read bank 2 GPIO\n\
BS1 bits Set GPIO in bank 2\n\
BS2 bits Set GPIO in bank 2\n\
\n\
CF1 ... Custom function 1\n\
CF2 ... Custom function 2\n\
@ -251,11 +252,11 @@ CF2 ... Custom function 2\n\
CGI Configuration get internals\n\
CSI v Configuration set internals\n\
\n\
FG g steady Set glitch filter on gpio\n\
FN g steady active | Set noise filter on gpio\n\
FG g steady Set glitch filter on GPIO\n\
FN g steady active | Set noise filter on GPIO\n\
\n\
GDC g Get PWM dutycycle for gpio\n\
GPW g Get servo pulsewidth for gpio\n\
GDC g Get PWM dutycycle for GPIO\n\
GPW g Get servo pulsewidth for GPIO\n\
\n\
H/HELP Display command help\n\
HC g f Set hardware clock frequency\n\
@ -281,8 +282,8 @@ I2CWS h b SMBus Write Byte: write byte\n\
I2CWW h r word SMBus Write Word Data: write word to register\n\
I2CZ h ... I2C multiple transactions\n\
\n\
M/MODES g mode Set gpio mode\n\
MG/MODEG g Get gpio mode\n\
M/MODES g mode Set GPIO mode\n\
MG/MODEG g Get GPIO mode\n\
MICS n Delay for microseconds\n\
MILS n Delay for milliseconds\n\
\n\
@ -291,24 +292,24 @@ NC h Close notification\n\
NO Request a notification\n\
NP h Pause notification\n\
\n\
P/PWM g v Set gpio PWM value\n\
P/PWM g v Set GPIO PWM value\n\
PARSE text Validate script\n\
PFG g Get gpio PWM frequency\n\
PFS g v Set gpio PWM frequency\n\
PFG g Get GPIO PWM frequency\n\
PFS g v Set GPIO PWM frequency\n\
PIGPV Get pigpio library version\n\
PRG g Get gpio PWM range\n\
PRG g Get GPIO PWM range\n\
PROC text Store script\n\
PROCD sid Delete script\n\
PROCP sid Get script status and parameters\n\
PROCR sid ... Run script\n\
PROCS sid Stop script\n\
PRRG g Get gpio PWM real range\n\
PRS g v Set gpio PWM range\n\
PUD g pud Set gpio pull up/down\n\
PRRG g Get GPIO PWM real range\n\
PRS g v Set GPIO PWM range\n\
PUD g pud Set GPIO pull up/down\n\
\n\
R/READ g Read gpio level\n\
R/READ g Read GPIO level\n\
\n\
S/SERVO g v Set gpio servo pulsewidth\n\
S/SERVO g v Set GPIO servo pulsewidth\n\
SERC h Close serial handle\n\
SERDA h Check for serial data ready to read\n\
SERO text baud flags | Open serial device at baud with flags\n\
@ -316,9 +317,9 @@ SERR h n Read bytes from serial handle\n\
SERRB h Read byte from serial handle\n\
SERW h ... Write bytes to serial handle\n\
SERWB h byte Write byte to serial handle\n\
SLR g v Read bit bang serial data from gpio\n\
SLRC g Close gpio for bit bang serial data\n\
SLRO g baud bitlen | Open gpio for bit bang serial data\n\
SLR g v Read bit bang serial data from GPIO\n\
SLRC g Close GPIO for bit bang serial data\n\
SLRO g baud bitlen | Open GPIO for bit bang serial data\n\
SLRI g invert Invert serial logic (1 invert, 0 normal)\n\
SPIC h SPI close handle\n\
SPIO channel baud flags | SPI open channel at baud with flags\n\
@ -327,10 +328,10 @@ SPIW h ... SPI write bytes to handle\n\
SPIX h ... SPI transfer bytes to handle\n\
\n\
T/TICK Get current tick\n\
TRIG g micros l Trigger level for micros on gpio\n\
TRIG g micros l Trigger level for micros on GPIO\n\
\n\
W/WRITE g l Write level to gpio\n\
WDOG g millis Set millisecond watchdog on gpio\n\
W/WRITE g l Write level to GPIO\n\
WDOG g millis Set millisecond watchdog on GPIO\n\
WVAG triplets Wave add generic pulses\n\
WVAS g baud bitlen stopbits offset ... | Wave add serial data\n\
WVBSY Check if wave busy\n\
@ -345,6 +346,7 @@ WVNEW Start a new empty wave\n\
WVSC 0,1,2 Wave get DMA control block stats\n\
WVSM 0,1,2 Wave get micros stats\n\
WVSP 0,1,2 Wave get pulses stats\n\
WVTAT Returns the current transmitting wave\n\
WVTX wid Transmit wave as one-shot\n\
WVTXM wid wmde Transmit wave using mode\n\
WVTXR wid Transmit wave repeatedly\n\
@ -364,8 +366,8 @@ typedef struct
static errInfo_t errInfo[]=
{
{PI_INIT_FAILED , "pigpio initialisation failed"},
{PI_BAD_USER_GPIO , "gpio not 0-31"},
{PI_BAD_GPIO , "gpio not 0-53"},
{PI_BAD_USER_GPIO , "GPIO not 0-31"},
{PI_BAD_GPIO , "GPIO not 0-53"},
{PI_BAD_MODE , "mode not 0-7"},
{PI_BAD_LEVEL , "level not 0-1"},
{PI_BAD_PUD , "pud not 0-2"},
@ -400,11 +402,11 @@ static errInfo_t errInfo[]=
{PI_BAD_WAVE_BAUD , "baud rate not 50-250K(RX)/50-1M(TX)"},
{PI_TOO_MANY_PULSES , "waveform has too many pulses"},
{PI_TOO_MANY_CHARS , "waveform has too many chars"},
{PI_NOT_SERIAL_GPIO , "no bit bang serial read in progress on gpio"},
{PI_NOT_SERIAL_GPIO , "no bit bang serial read in progress on GPIO"},
{PI_BAD_SERIAL_STRUC , "bad (null) serial structure parameter"},
{PI_BAD_SERIAL_BUF , "bad (null) serial buf parameter"},
{PI_NOT_PERMITTED , "no permission to update gpio"},
{PI_SOME_PERMITTED , "no permission to update one or more gpios"},
{PI_NOT_PERMITTED , "no permission to update GPIO"},
{PI_SOME_PERMITTED , "no permission to update one or more GPIO"},
{PI_BAD_WVSC_COMMND , "bad WVSC subcommand"},
{PI_BAD_WVSM_COMMND , "bad WVSM subcommand"},
{PI_BAD_WVSP_COMMND , "bad WVSP subcommand"},
@ -412,7 +414,7 @@ static errInfo_t errInfo[]=
{PI_BAD_SCRIPT , "invalid script"},
{PI_BAD_SCRIPT_ID , "unknown script id"},
{PI_BAD_SER_OFFSET , "add serial data offset > 30 minute"},
{PI_GPIO_IN_USE , "gpio already in use"},
{PI_GPIO_IN_USE , "GPIO already in use"},
{PI_BAD_SERIAL_COUNT , "must read at least a byte at a time"},
{PI_BAD_PARAM_NUM , "script parameter id not 0-9"},
{PI_DUP_TAG , "script has duplicate tag"},
@ -454,10 +456,10 @@ static errInfo_t errInfo[]=
{PI_SPI_XFER_FAILED , "spi xfer/read/write failed"},
{PI_BAD_POINTER , "bad (NULL) pointer"},
{PI_NO_AUX_SPI , "need a B+ for auxiliary SPI"},
{PI_NOT_PWM_GPIO , "gpio is not in use for PWM"},
{PI_NOT_SERVO_GPIO , "gpio is not in use for servo pulses"},
{PI_NOT_HCLK_GPIO , "gpio has no hardware clock"},
{PI_NOT_HPWM_GPIO , "gpio has no hardware PWM"},
{PI_NOT_PWM_GPIO , "GPIO is not in use for PWM"},
{PI_NOT_SERVO_GPIO , "GPIO is not in use for servo pulses"},
{PI_NOT_HCLK_GPIO , "GPIO has no hardware clock"},
{PI_NOT_HPWM_GPIO , "GPIO has no hardware PWM"},
{PI_BAD_HPWM_FREQ , "hardware PWM frequency not 1-125M"},
{PI_BAD_HPWM_DUTY , "hardware PWM dutycycle not 0-1M"},
{PI_BAD_HCLK_FREQ , "hardware clock frequency not 4689-250M"},
@ -470,7 +472,7 @@ static errInfo_t errInfo[]=
{PI_TOO_MANY_SEGS , "too many I2C transaction segments"},
{PI_BAD_I2C_SEG , "an I2C transaction segment failed"},
{PI_BAD_SMBUS_CMD , "SMBus command not supported by driver"},
{PI_NOT_I2C_GPIO , "no bit bang I2C in progress on gpio"},
{PI_NOT_I2C_GPIO , "no bit bang I2C in progress on GPIO"},
{PI_BAD_I2C_WLEN , "bad I2C write length"},
{PI_BAD_I2C_RLEN , "bad I2C read length"},
{PI_BAD_I2C_CMD , "bad I2C command"},

429
pigpio.3
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90
pigpio.c
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@ -25,7 +25,7 @@ OTHER DEALINGS IN THE SOFTWARE.
For more information, please refer to <http://unlicense.org/>
*/
/* pigpio version 46 */
/* pigpio version 47 */
/* include ------------------------------------------------------- */
@ -2181,6 +2181,8 @@ static int myDoCommand(uint32_t *p, unsigned bufSize, char *buf)
}
break;
case PI_CMD_WVTAT: res = gpioWaveTxAt(); break;
case PI_CMD_WVTX:
res = gpioWaveTxSend(p[1], PI_WAVE_MODE_ONE_SHOT); break;
@ -4789,6 +4791,53 @@ static unsigned dmaNowAtICB(void)
/* ----------------------------------------------------------------------- */
static int dmaNowAtOCB(void)
{
unsigned cb;
unsigned page;
uint32_t cbAddr;
cbAddr = dmaOut[DMA_CONBLK_AD];
if (!cbAddr) return -PI_NO_TX_WAVE;
page = 0;
/* which page are we dma'ing? */
while (1)
{
cb = (cbAddr - ((int)dmaOBus[page])) / 32;
if (cb < CBS_PER_OPAGE) return (page*CBS_PER_OPAGE) + cb;
if (page++ >= DMAO_PAGES) break;
}
/* Try twice */
cbAddr = dmaOut[DMA_CONBLK_AD];
if (!cbAddr) return -PI_NO_TX_WAVE;
page = 0;
/* which page are we dma'ing? */
while (1)
{
cb = (cbAddr - ((int)dmaOBus[page])) / 32;
if (cb < CBS_PER_OPAGE) return (page*CBS_PER_OPAGE) + cb;
if (page++ >= DMAO_PAGES) break;
}
return -PI_WAVE_NOT_FOUND;
}
/* ----------------------------------------------------------------------- */
unsigned rawWaveCB(void)
{
unsigned cb;
@ -8560,7 +8609,7 @@ int rawWaveAddSPI(
unsigned spiBitLast,
unsigned spiBits)
{
int p, dbv, bit, halfbit;
int p, bit, dbv, halfbit;
int rising_edge[2], read_cycle[2];
uint32_t on_bits, off_bits;
int tx_bit_pos;
@ -8600,27 +8649,32 @@ int rawWaveAddSPI(
p++;
}
/* preset initial mosi bit in case it's read at leading clock bit */
on_bits = 0;
off_bits = 0;
tx_bit_pos = 0;
/* preset initial mosi bit */
if (getBitInBytes(tx_bit_pos, buf, spiTxBits))
{
dbv = 1;
on_bits |= (1<<(spi->mosi));
dbv = 1;
}
else
{
dbv = 0;
off_bits |= (1<<(spi->mosi));
dbv = 0;
}
if (!spi->clk_pha) tx_bit_pos ++;
if (spi->ss_pol) off_bits |= (1<<spiSS);
else on_bits |= (1<<spiSS);
if (spi->clk_pol) on_bits |= (1<<(spi->clk));
else off_bits |= (1<<(spi->clk));
wf[2][p].gpioOn = on_bits;
wf[2][p].gpioOff = off_bits;
wf[2][p].flags = 0;
@ -9345,6 +9399,30 @@ int gpioWaveTxBusy(void)
return 0;
}
/*-------------------------------------------------------------------------*/
int gpioWaveTxAt(void)
{
int i, cb;
DBG(DBG_USER, "");
CHECK_INITED;
cb = dmaNowAtOCB();
if (cb < 0) return -cb;
for (i=0; i<PI_MAX_WAVES; i++)
{
if ( !waveInfo[i].deleted &&
(cb >= waveInfo[i].botCB) &&
(cb <= waveInfo[i].topCB) ) return i;
}
return PI_WAVE_NOT_FOUND;
}
/* ----------------------------------------------------------------------- */
int gpioWaveTxStop(void)

515
pigpio.h
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440
pigpio.py
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32
pigpiod.1
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@ -35,7 +35,7 @@ DMA memory allocation mode
default AUTO
.IP "\fB-b value\fP"
gpio sample buffer in milliseconds
GPIO sample buffer in milliseconds
100-10000
default 120
@ -90,9 +90,9 @@ display pigpio version and exit
.IP "\fB-x mask\fP"
gpios which may be updated
A 54 bit mask with (1<<n) set if the user may update gpio #n.
default is the set of user gpios for the board revision
GPIO which may be updated
A 54 bit mask with (1<<n) set if the user may update GPIO #n.
default is the set of user GPIO for the board revision
.br
@ -125,12 +125,12 @@ pigpio provides a rudimentary permissions system for commands issued via the soc
.br
.br
All gpios may be read.
All GPIO may be read.
.br
.br
Only the user gpios for the board type or those specified by the -x option may be updated.
Only the user GPIO for the board type or those specified by the -x option may be updated.
.br
@ -154,21 +154,21 @@ In this context an update includes the following:
.br
.br
gpio mode set
GPIO mode set
.br
gpio pull/up down
GPIO pull/up down
.br
gpio write
GPIO write
.br
gpio set PWM (including range and frequency)
GPIO set PWM (including range and frequency)
.br
gpio set servo
GPIO set servo
.br
.br
In addition the bank clear and set commands, and the wave commands will only
affect updateable gpios.
affect updateable GPIO.
.br
@ -178,18 +178,18 @@ There are several special cases.
.br
.br
The activity LED (green) may be written (gpio 16 for type 1 and 2
boards, gpio 47 for type 3 boards)
The activity LED (green) may be written (GPIO 16 for type 1 and 2
boards, GPIO 47 for type 3 boards)
.br
.br
The power LED (red) may be written on type 3 boards (gpio 35).
The power LED (red) may be written on type 3 boards (GPIO 35).
.br
.br
The high USB power mode gpio may be written (gpio 38 for type 3 boards).
The high USB power mode GPIO may be written (GPIO 38 for type 3 boards).
.SH SEE ALSO

264
pigpiod_if.3
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@ -27,7 +27,7 @@ USE THE MORE VERSATILE pigpiod_if2 LIBRARY.
.br
pigpiod_if is a C library for the Raspberry which allows control
of the gpios via the socket interface to the pigpio daemon.
of the GPIO via the socket interface to the pigpio daemon.
.br
.br
@ -37,17 +37,17 @@ of the gpios via the socket interface to the pigpio daemon.
.br
.br
o PWM on any of gpios 0-31
o PWM on any of GPIO 0-31
.br
.br
o servo pulses on any of gpios 0-31
o servo pulses on any of GPIO 0-31
.br
.br
o callbacks when any of gpios 0-31 change state
o callbacks when any of GPIO 0-31 change state
.br
@ -57,17 +57,17 @@ o callbacks at timed intervals
.br
.br
o reading/writing all of the gpios in a bank as one operation
o reading/writing all of the GPIO in a bank as one operation
.br
.br
o individually setting gpio modes, reading and writing
o individually setting GPIO modes, reading and writing
.br
.br
o notifications when any of gpios 0-31 change state
o notifications when any of GPIO 0-31 change state
.br
@ -77,7 +77,7 @@ o the construction of output waveforms with microsecond timing
.br
.br
o rudimentary permission control over gpios
o rudimentary permission control over GPIO
.br
@ -97,11 +97,11 @@ o creating and running scripts on the pigpio daemon
.br
.br
.SS gpios
.SS GPIO
.br
.br
ALL gpios are identified by their Broadcom number.
ALL GPIO are identified by their Broadcom number.
.br
@ -304,7 +304,7 @@ resources used by the library.
.IP "\fBint set_mode(unsigned gpio, unsigned mode)\fP"
.IP "" 4
Set the gpio mode.
Set the GPIO mode.
.br
@ -328,7 +328,7 @@ or PI_NOT_PERMITTED.
.IP "\fBint get_mode(unsigned gpio)\fP"
.IP "" 4
Get the gpio mode.
Get the GPIO mode.
.br
@ -343,11 +343,11 @@ gpio: 0-53.
.br
.br
Returns the gpio mode if OK, otherwise PI_BAD_GPIO.
Returns the GPIO mode if OK, otherwise PI_BAD_GPIO.
.IP "\fBint set_pull_up_down(unsigned gpio, unsigned pud)\fP"
.IP "" 4
Set or clear the gpio pull-up/down resistor.
Set or clear the GPIO pull-up/down resistor.
.br
@ -369,7 +369,7 @@ or PI_NOT_PERMITTED.
.IP "\fBint gpio_read(unsigned gpio)\fP"
.IP "" 4
Read the gpio level.
Read the GPIO level.
.br
@ -384,11 +384,11 @@ gpio:0-53.
.br
.br
Returns the gpio level if OK, otherwise PI_BAD_GPIO.
Returns the GPIO level if OK, otherwise PI_BAD_GPIO.
.IP "\fBint gpio_write(unsigned gpio, unsigned level)\fP"
.IP "" 4
Write the gpio level.
Write the GPIO level.
.br
@ -416,11 +416,11 @@ Notes
.br
.br
If PWM or servo pulses are active on the gpio they are switched off.
If PWM or servo pulses are active on the GPIO they are switched off.
.IP "\fBint set_PWM_dutycycle(unsigned user_gpio, unsigned dutycycle)\fP"
.IP "" 4
Start (non-zero dutycycle) or stop (0) PWM pulses on the gpio.
Start (non-zero dutycycle) or stop (0) PWM pulses on the GPIO.
.br
@ -449,7 +449,7 @@ default range of 255.
.IP "\fBint get_PWM_dutycycle(unsigned user_gpio)\fP"
.IP "" 4
Return the PWM dutycycle in use on a gpio.
Return the PWM dutycycle in use on a GPIO.
.br
@ -470,23 +470,23 @@ Returns 0 if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
.br
For normal PWM the dutycycle will be out of the defined range
for the gpio (see \fBget_PWM_range\fP).
for the GPIO (see \fBget_PWM_range\fP).
.br
.br
If a hardware clock is active on the gpio the reported dutycycle
If a hardware clock is active on the GPIO the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported dutycycle
If hardware PWM is active on the GPIO the reported dutycycle
will be out of a 1000000 (1M).
.IP "\fBint set_PWM_range(unsigned user_gpio, unsigned range)\fP"
.IP "" 4
Set the range of PWM values to be used on the gpio.
Set the range of PWM values to be used on the GPIO.
.br
@ -514,14 +514,14 @@ Notes
.br
.br
If PWM is currently active on the gpio its dutycycle will be
If PWM is currently active on the GPIO its dutycycle will be
scaled to reflect the new range.
.br
.br
The real range, the number of steps between fully off and fully on
for each of the 18 available gpio frequencies is
for each of the 18 available GPIO frequencies is
.br
@ -544,7 +544,7 @@ The real value set by set_PWM_range is (dutycycle * real range) / range.
.IP "\fBint get_PWM_range(unsigned user_gpio)\fP"
.IP "" 4
Get the range of PWM values being used on the gpio.
Get the range of PWM values being used on the GPIO.
.br
@ -559,18 +559,18 @@ user_gpio: 0-31.
.br
.br
Returns the dutycycle range used for the gpio if OK,
Returns the dutycycle range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
.br
.br
If a hardware clock or hardware PWM is active on the gpio the
If a hardware clock or hardware PWM is active on the GPIO the
reported range will be 1000000 (1M).
.IP "\fBint get_PWM_real_range(unsigned user_gpio)\fP"
.IP "" 4
Get the real underlying range of PWM values being used on the gpio.
Get the real underlying range of PWM values being used on the GPIO.
.br
@ -585,19 +585,19 @@ user_gpio: 0-31.
.br
.br
Returns the real range used for the gpio if OK,
Returns the real range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
.br
.br
If a hardware clock is active on the gpio the reported
If a hardware clock is active on the GPIO the reported
real range will be 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported real range
If hardware PWM is active on the GPIO the reported real range
will be approximately 250M divided by the set PWM frequency.
.br
@ -606,7 +606,7 @@ will be approximately 250M divided by the set PWM frequency.
.IP "\fBint set_PWM_frequency(unsigned user_gpio, unsigned frequency)\fP"
.IP "" 4
Set the frequency (in Hz) of the PWM to be used on the gpio.
Set the frequency (in Hz) of the PWM to be used on the GPIO.
.br
@ -636,13 +636,13 @@ sample rate is set when the C pigpio library is started.
.br
.br
Each gpio can be independently set to one of 18 different
Each GPIO can be independently set to one of 18 different
PWM frequencies.
.br
.br
If PWM is currently active on the gpio it will be switched
If PWM is currently active on the GPIO it will be switched
off and then back on at the new frequency.
.br
@ -689,7 +689,7 @@ off and then back on at the new frequency.
.IP "\fBint get_PWM_frequency(unsigned user_gpio)\fP"
.IP "" 4
Get the frequency of PWM being used on the gpio.
Get the frequency of PWM being used on the GPIO.
.br
@ -704,30 +704,30 @@ user_gpio: 0-31.
.br
.br
For normal PWM the frequency will be that defined for the gpio by
For normal PWM the frequency will be that defined for the GPIO by
\fBset_PWM_frequency\fP.
.br
.br
If a hardware clock is active on the gpio the reported frequency
If a hardware clock is active on the GPIO the reported frequency
will be that set by \fBhardware_clock\fP.
.br
.br
If hardware PWM is active on the gpio the reported frequency
If hardware PWM is active on the GPIO the reported frequency
will be that set by \fBhardware_PWM\fP.
.br
.br
Returns the frequency (in hertz) used for the gpio if OK,
Returns the frequency (in hertz) used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
.IP "\fBint set_servo_pulsewidth(unsigned user_gpio, unsigned pulsewidth)\fP"
.IP "" 4
Start (500-2500) or stop (0) servo pulses on the gpio.
Start (500-2500) or stop (0) servo pulses on the GPIO.
.br
@ -803,7 +803,7 @@ the servo pulsewidth.
.br
.br
E.g. If you want to update a servo connected to gpio 25 at 400Hz
E.g. If you want to update a servo connected to GPIO 25 at 400Hz
.br
@ -826,7 +826,7 @@ e.g. set_PWM_dutycycle(25, 1500) will set a 1500 us pulse.
.IP "\fBint get_servo_pulsewidth(unsigned user_gpio)\fP"
.IP "" 4
Return the servo pulsewidth in use on a gpio.
Return the servo pulsewidth in use on a GPIO.
.br
@ -856,7 +856,7 @@ otherwise PI_NO_HANDLE.
.br
.br
A notification is a method for being notified of gpio state
A notification is a method for being notified of GPIO state
changes via a pipe.
.br
@ -886,7 +886,7 @@ Start notifications on a previously opened handle.
.EX
handle: 0-31 (as returned by \fBnotify_open\fP)
.br
bits: a mask indicating the gpios to be notified.
bits: a mask indicating the GPIO to be notified.
.br
.EE
@ -899,7 +899,7 @@ Returns 0 if OK, otherwise PI_BAD_HANDLE.
.br
.br
The notification sends state changes for each gpio whose
The notification sends state changes for each GPIO whose
corresponding bit in bits is set.
.br
@ -975,7 +975,7 @@ Returns 0 if OK, otherwise PI_BAD_HANDLE.
.IP "\fBint set_watchdog(unsigned user_gpio, unsigned timeout)\fP"
.IP "" 4
Sets a watchdog for a gpio.
Sets a watchdog for a GPIO.
.br
@ -1003,7 +1003,7 @@ The watchdog is nominally in milliseconds.
.br
.br
Only one watchdog may be registered per gpio.
Only one watchdog may be registered per GPIO.
.br
@ -1013,24 +1013,24 @@ The watchdog may be cancelled by setting timeout to 0.
.br
.br
If no level change has been detected for the gpio for timeout
milliseconds any notification for the gpio has a report written
If no level change has been detected for the GPIO for timeout
milliseconds any notification for the GPIO has a report written
to the fifo with the flags set to indicate a watchdog timeout.
.br
.br
The \fBcallback\fP and \fBcallback_ex\fP functions interpret the flags
and will call registered callbacks for the gpio with level TIMEOUT.
and will call registered callbacks for the GPIO with level TIMEOUT.
.IP "\fBint set_glitch_filter(unsigned user_gpio, unsigned steady)\fP"
.IP "" 4
Sets a glitch filter on a gpio.
Sets a glitch filter on a GPIO.
.br
.br
Level changes on the gpio are not reported unless the level
Level changes on the GPIO are not reported unless the level
has been stable for at least \fBsteady\fP microseconds. The
level is then reported. Level changes of less than \fBsteady\fP
microseconds are ignored.
@ -1060,14 +1060,14 @@ after it was first detected.
.IP "\fBint set_noise_filter(unsigned user_gpio, unsigned steady, unsigned active)\fP"
.IP "" 4
Sets a noise filter on a gpio.
Sets a noise filter on a GPIO.
.br
.br
Level changes on the gpio are ignored until a level which has
Level changes on the GPIO are ignored until a level which has
been stable for \fBsteady\fP microseconds is detected. Level changes
on the gpio are then reported for \fBactive\fP microseconds after
on the GPIO are then reported for \fBactive\fP microseconds after
which the process repeats.
.br
@ -1098,34 +1098,34 @@ such reports.
.IP "\fBuint32_t read_bank_1(void)\fP"
.IP "" 4
Read the levels of the bank 1 gpios (gpios 0-31).
Read the levels of the bank 1 GPIO (GPIO 0-31).
.br
.br
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<n).
GPIO is logic 1. GPIO n has bit value (1<<n).
.IP "\fBuint32_t read_bank_2(void)\fP"
.IP "" 4
Read the levels of the bank 2 gpios (gpios 32-53).
Read the levels of the bank 2 GPIO (GPIO 32-53).
.br
.br
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<(n-32)).
GPIO is logic 1. GPIO n has bit value (1<<(n-32)).
.IP "\fBint clear_bank_1(uint32_t bits)\fP"
.IP "" 4
Clears gpios 0-31 if the corresponding bit in bits is set.
Clears GPIO 0-31 if the corresponding bit in bits is set.
.br
.br
.EX
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be cleared.
.br
@ -1141,18 +1141,18 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint clear_bank_2(uint32_t bits)\fP"
.IP "" 4
Clears gpios 32-53 if the corresponding bit (0-21) in bits is set.
Clears GPIO 32-53 if the corresponding bit (0-21) in bits is set.
.br
.br
.EX
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be cleared.
.br
@ -1168,18 +1168,18 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint set_bank_1(uint32_t bits)\fP"
.IP "" 4
Sets gpios 0-31 if the corresponding bit in bits is set.
Sets GPIO 0-31 if the corresponding bit in bits is set.
.br
.br
.EX
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be set.
.br
@ -1195,18 +1195,18 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint set_bank_2(uint32_t bits)\fP"
.IP "" 4
Sets gpios 32-53 if the corresponding bit (0-21) in bits is set.
Sets GPIO 32-53 if the corresponding bit (0-21) in bits is set.
.br
.br
.EX
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be set.
.br
@ -1222,11 +1222,11 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint hardware_clock(unsigned gpio, unsigned clkfreq)\fP"
.IP "" 4
Starts a hardware clock on a gpio at the specified frequency.
Starts a hardware clock on a GPIO at the specified frequency.
Frequencies above 30MHz are unlikely to work.
.br
@ -1250,13 +1250,13 @@ PI_NOT_HCLK_GPIO, PI_BAD_HCLK_FREQ,or PI_BAD_HCLK_PASS.
.br
.br
The same clock is available on multiple gpios. The latest
frequency setting will be used by all gpios which share a clock.
The same clock is available on multiple GPIO. The latest
frequency setting will be used by all GPIO which share a clock.
.br
.br
The gpio must be one of the following.
The GPIO must be one of the following.
.br
@ -1265,13 +1265,13 @@ The gpio must be one of the following.
.EX
4 clock 0 All models
.br
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
5 clock 1 All models but A and B (reserved for system use)
.br
6 clock 2 A+/B+/Pi2 and compute module only
6 clock 2 All models but A and B
.br
20 clock 0 A+/B+/Pi2 and compute module only
20 clock 0 All models but A and B
.br
21 clock 1 All models but Rev.2 B (reserved for system use)
21 clock 1 All models but A and Rev.2 B (reserved for system use)
.br
.br
@ -1293,11 +1293,11 @@ The gpio must be one of the following.
.br
Access to clock 1 is protected by a password as its use will likely
crash the Pi. The password is given by or'ing 0x5A000000 with the
gpio number.
GPIO number.
.IP "\fBint hardware_PWM(unsigned gpio, unsigned PWMfreq, uint32_t PWMduty)\fP"
.IP "" 4
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Starts hardware PWM on a GPIO at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
.br
@ -1337,27 +1337,27 @@ or PI_HPWM_ILLEGAL.
.br
.br
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
The same PWM channel is available on multiple GPIO. The latest
frequency and dutycycle setting will be used by all GPIO which
share a PWM channel.
.br
.br
The gpio must be one of the following.
The GPIO must be one of the following.
.br
.br
.EX
12 PWM channel 0 A+/B+/Pi2 and compute module only
12 PWM channel 0 All models but A and B
.br
13 PWM channel 1 A+/B+/Pi2 and compute module only
13 PWM channel 1 All models but A and B
.br
18 PWM channel 0 All models
.br
19 PWM channel 1 A+/B+/Pi2 and compute module only
19 PWM channel 1 All models but A and B
.br
.br
@ -1412,7 +1412,7 @@ hexadecimal number the function returns 0.
.br
.br
The revision number can be used to determine the assignment of gpios
The revision number can be used to determine the assignment of GPIO
to pins (see \fBgpio\fP).
.br
@ -1492,7 +1492,7 @@ The pulses are interleaved in time order within the existing waveform
.br
Merging allows the waveform to be built in parts, that is the settings
for gpio#1 can be added, and then gpio#2 etc.
for GPIO#1 can be added, and then GPIO#2 etc.
.br
@ -1655,9 +1655,9 @@ The fields specify
.br
.br
1) the gpios to be switched on at the start of the pulse.
1) the GPIO to be switched on at the start of the pulse.
.br
2) the gpios to be switched off at the start of the pulse.
2) the GPIO to be switched off at the start of the pulse.
.br
3) the delay in microseconds before the next pulse.
.br
@ -2020,7 +2020,7 @@ control blocks.
.IP "\fBint gpio_trigger(unsigned user_gpio, unsigned pulseLen, unsigned level)\fP"
.IP "" 4
This function sends a trigger pulse to a gpio. The gpio is set to
This function sends a trigger pulse to a GPIO. The GPIO is set to
level for pulseLen microseconds and then reset to not level.
.br
@ -2184,7 +2184,7 @@ The function returns 0 if OK, otherwise PI_BAD_SCRIPT_ID.
.IP "\fBint bb_serial_read_open(unsigned user_gpio, unsigned baud, unsigned data_bits)\fP"
.IP "" 4
This function opens a gpio for bit bang reading of serial data.
This function opens a GPIO for bit bang reading of serial data.
.br
@ -2260,7 +2260,7 @@ For \fBdata_bits\fP 17-32 there will be four bytes per character.
.IP "\fBint bb_serial_read_close(unsigned user_gpio)\fP"
.IP "" 4
This function closes a gpio for bit bang reading of serial data.
This function closes a GPIO for bit bang reading of serial data.
.br
@ -3036,7 +3036,7 @@ End
.IP "\fBint bb_i2c_open(unsigned SDA, unsigned SCL, unsigned baud)\fP"
.IP "" 4
This function selects a pair of gpios for bit banging I2C at a
This function selects a pair of GPIO for bit banging I2C at a
specified baud rate.
.br
@ -3054,7 +3054,7 @@ o repeated starts
.br
o clock stretching
.br
o I2C on any pair of spare gpios
o I2C on any pair of spare GPIO
.br
@ -3084,12 +3084,12 @@ NOTE:
.br
.br
The gpios used for SDA and SCL must have pull-ups to 3V3 connected. As
The GPIO used for SDA and SCL must have pull-ups to 3V3 connected. As
a guide the hardware pull-ups on pins 3 and 5 are 1k8 in value.
.IP "\fBint bb_i2c_close(unsigned SDA)\fP"
.IP "" 4
This function stops bit banging I2C on a pair of gpios previously
This function stops bit banging I2C on a pair of GPIO previously
opened with \fBbb_i2c_open\fP.
.br
@ -3097,7 +3097,7 @@ opened with \fBbb_i2c_open\fP.
.br
.EX
SDA: 0-31, the SDA gpio used in a prior call to \fBbb_i2c_open\fP
SDA: 0-31, the SDA GPIO used in a prior call to \fBbb_i2c_open\fP
.br
.EE
@ -3255,16 +3255,17 @@ active low chip select.
.br
.br
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
An auxiliary SPI device is available on all models but the
A and B and may be selected by setting the A bit in the
flags. The auxiliary device has 3 chip selects and a
selectable word size in bits.
.br
.br
.EX
spi_channel: 0-1 (0-2 for A+/B+/Pi2 auxiliary device).
spi_channel: 0-1 (0-2 for the auxiliary SPI device).
.br
baud: 32K-125M (values above 30M are unlikely to work).
.br
@ -3332,13 +3333,12 @@ px is 0 if CEx is active low (default) and 1 for active high.
.br
.br
ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
.br
.br
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the A+/B+/Pi2.
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
.br
@ -3738,8 +3738,8 @@ pigif_duplicate_callback, or pigif_bad_callback.
.br
.br
The callback is called with the gpio, edge, and tick, whenever the
gpio has the identified edge.
The callback is called with the GPIO, edge, and tick, whenever the
GPIO has the identified edge.
.IP "\fBint callback_ex(unsigned user_gpio, unsigned edge, CBFuncEx_t f, void *userdata)\fP"
.IP "" 4
@ -3770,8 +3770,8 @@ pigif_duplicate_callback, or pigif_bad_callback.
.br
.br
The callback is called with the gpio, edge, tick, and user, whenever
the gpio has the identified edge.
The callback is called with the GPIO, edge, tick, and user, whenever
the GPIO has the identified edge.
.br
@ -3798,7 +3798,7 @@ The function returns 0 if OK, otherwise pigif_callback_not_found.
.IP "\fBint wait_for_edge(unsigned user_gpio, unsigned edge, double timeout)\fP"
.IP "" 4
This function waits for edge on the gpio for up to timeout
This function waits for edge on the GPIO for up to timeout
seconds.
.br
@ -3900,7 +3900,7 @@ A value of 0 or 1.
.br
.IP "\fBbits\fP" 0
A value used to select gpios. If bit n of bits is set then gpio n is
A value used to select GPIO. If bit n of bits is set then GPIO n is
selected.
.br
@ -4040,7 +4040,7 @@ The number may vary between 0 and range (default 255) where
.br
.IP "\fBedge\fP" 0
Used to identify a gpio level transition of interest. A rising edge is
Used to identify a GPIO level transition of interest. A rising edge is
a level change from 0 to 1. A falling edge is a level change from 1 to 0.
.br
@ -4077,9 +4077,9 @@ A function.
.br
.IP "\fBfrequency\fP: 0-" 0
The number of times a gpio is swiched on and off per second. This
can be set per gpio and may be as little as 5Hz or as much as
40KHz. The gpio will be on for a proportion of the time as defined
The number of times a GPIO is swiched on and off per second. This
can be set per GPIO and may be as little as 5Hz or as much as
40KHz. The GPIO will be on for a proportion of the time as defined
by its dutycycle.
.br
@ -4091,12 +4091,12 @@ by its dutycycle.
.br
.IP "\fBgpio\fP" 0
A Broadcom numbered gpio, in the range 0-53.
A Broadcom numbered GPIO, in the range 0-53.
.br
.br
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
There are 54 General Purpose Input Outputs (GPIO) named gpio0 through
gpio53.
.br
@ -4108,9 +4108,9 @@ gpio31. Bank 2 consists of gpio32 through gpio53.
.br
.br
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
All the GPIO which are safe for the user to read and write are in
bank 1. Not all GPIO in bank 1 are safe though. Type 1 boards
have 17 safe GPIO. Type 2 boards have 21. Type 3 boards have 26.
.br
@ -4120,7 +4120,7 @@ See \fBget_hardware_revision\fP.
.br
.br
The user gpios are marked with an X in the following table.
The user GPIO are marked with an X in the following table.
.br
@ -4251,7 +4251,7 @@ A flag used to set normal or inverted bit bang serial data level logic.
.br
.IP "\fBlevel\fP" 0
The level of a gpio. Low or High.
The level of a GPIO. Low or High.
.br
@ -4280,7 +4280,7 @@ PI_HIGH 1
.br
.br
There is one exception. If a watchdog expires on a gpio the level will be
There is one exception. If a watchdog expires on a GPIO the level will be
reported as PI_TIMEOUT. See \fBset_watchdog\fP.
.br
@ -4298,7 +4298,7 @@ PI_TIMEOUT 2
.br
.IP "\fBmode\fP: 0-7" 0
The operational mode of a gpio, normally INPUT or OUTPUT.
The operational mode of a GPIO, normally INPUT or OUTPUT.
.br
@ -4409,7 +4409,7 @@ A thread identifier.
.br
.IP "\fBpud\fP: 0-2" 0
The setting of the pull up/down resistor for a gpio, which may be off,
The setting of the pull up/down resistor for a GPIO, which may be off,
pull-up, or pull-down.
.EX
@ -4533,7 +4533,7 @@ A pointer to a buffer to receive data.
.br
.IP "\fBSCL\fP" 0
The user gpio to use for the clock when bit banging I2C.
The user GPIO to use for the clock when bit banging I2C.
.br
@ -4554,7 +4554,7 @@ An id of a stored script as returned by \fBstore_script\fP.
.br
.IP "\fBSDA\fP" 0
The user gpio to use for data when bit banging I2C.
The user GPIO to use for data when bit banging I2C.
.br
@ -4651,7 +4651,7 @@ thread.
.br
.IP "\fBtimeout\fP" 0
A gpio watchdog timeout in milliseconds.
A GPIO watchdog timeout in milliseconds.
.EX
PI_MIN_WDOG_TIMEOUT 0
@ -4687,7 +4687,7 @@ A whole number >= 0.
.br
.IP "\fBuser_gpio\fP" 0
0-31, a Broadcom numbered gpio.
0-31, a Broadcom numbered GPIO.
.br

336
pigpiod_if.h
View File

@ -30,7 +30,7 @@ For more information, please refer to <http://unlicense.org/>
#include "pigpio.h"
#define PIGPIOD_IF_VERSION 21
#define PIGPIOD_IF_VERSION 22
/*TEXT
@ -38,27 +38,27 @@ THIS LIBRARY IS DEPRECATED. NEW CODE SHOULD BE WRITTEN TO
USE THE MORE VERSATILE pigpiod_if2 LIBRARY.
pigpiod_if is a C library for the Raspberry which allows control
of the gpios via the socket interface to the pigpio daemon.
of the GPIO via the socket interface to the pigpio daemon.
*Features*
o PWM on any of gpios 0-31
o PWM on any of GPIO 0-31
o servo pulses on any of gpios 0-31
o servo pulses on any of GPIO 0-31
o callbacks when any of gpios 0-31 change state
o callbacks when any of GPIO 0-31 change state
o callbacks at timed intervals
o reading/writing all of the gpios in a bank as one operation
o reading/writing all of the GPIO in a bank as one operation
o individually setting gpio modes, reading and writing
o individually setting GPIO modes, reading and writing
o notifications when any of gpios 0-31 change state
o notifications when any of GPIO 0-31 change state
o the construction of output waveforms with microsecond timing
o rudimentary permission control over gpios
o rudimentary permission control over GPIO
o a simple interface to start and stop new threads
@ -66,9 +66,9 @@ o I2C, SPI, and serial link wrappers
o creating and running scripts on the pigpio daemon
*gpios*
*GPIO*
ALL gpios are identified by their Broadcom number.
ALL GPIO are identified by their Broadcom number.
*Notes*
@ -109,68 +109,68 @@ pigpio_stop Disconnects from the pigpio daemon
BEGINNER
set_mode Set a gpio mode
get_mode Get a gpio mode
set_mode Set a GPIO mode
get_mode Get a GPIO mode
set_pull_up_down Set/clear gpio pull up/down resistor
set_pull_up_down Set/clear GPIO pull up/down resistor
gpio_read Read a gpio
gpio_write Write a gpio
gpio_read Read a GPIO
gpio_write Write a GPIO
set_PWM_dutycycle Start/stop PWM pulses on a gpio
get_PWM_dutycycle Get the PWM dutycycle in use on a gpio
set_PWM_dutycycle Start/stop PWM pulses on a GPIO
get_PWM_dutycycle Get the PWM dutycycle in use on a GPIO
set_servo_pulsewidth Start/stop servo pulses on a gpio
get_servo_pulsewidth Get the servo pulsewidth in use on a gpio
set_servo_pulsewidth Start/stop servo pulses on a GPIO
get_servo_pulsewidth Get the servo pulsewidth in use on a GPIO
callback Create gpio level change callback
callback_ex Create gpio level change callback
callback Create GPIO level change callback
callback_ex Create GPIO level change callback
callback_cancel Cancel a callback
wait_for_edge Wait for gpio level change
wait_for_edge Wait for GPIO level change
INTERMEDIATE
gpio_trigger Send a trigger pulse to a gpio.
gpio_trigger Send a trigger pulse to a GPIO.
set_watchdog Set a watchdog on a gpio.
set_watchdog Set a watchdog on a GPIO.
set_PWM_range Configure PWM range for a gpio
get_PWM_range Get configured PWM range for a gpio
set_PWM_range Configure PWM range for a GPIO
get_PWM_range Get configured PWM range for a GPIO
set_PWM_frequency Configure PWM frequency for a gpio
get_PWM_frequency Get configured PWM frequency for a gpio
set_PWM_frequency Configure PWM frequency for a GPIO
get_PWM_frequency Get configured PWM frequency for a GPIO
read_bank_1 Read all gpios in bank 1
read_bank_2 Read all gpios in bank 2
read_bank_1 Read all GPIO in bank 1
read_bank_2 Read all GPIO in bank 2
clear_bank_1 Clear selected gpios in bank 1
clear_bank_2 Clear selected gpios in bank 2
clear_bank_1 Clear selected GPIO in bank 1
clear_bank_2 Clear selected GPIO in bank 2
set_bank_1 Set selected gpios in bank 1
set_bank_2 Set selected gpios in bank 2
set_bank_1 Set selected GPIO in bank 1
set_bank_2 Set selected GPIO in bank 2
start_thread Start a new thread
stop_thread Stop a previously started thread
ADVANCED
get_PWM_real_range Get underlying PWM range for a gpio
get_PWM_real_range Get underlying PWM range for a GPIO
notify_open Request a notification handle
notify_begin Start notifications for selected gpios
notify_begin Start notifications for selected GPIO
notify_pause Pause notifications
notify_close Close a notification
bb_serial_read_open Opens a gpio for bit bang serial reads
bb_serial_read Reads bit bang serial data from a gpio
bb_serial_read_close Closes a gpio for bit bang serial reads
bb_serial_read_open Opens a GPIO for bit bang serial reads
bb_serial_read Reads bit bang serial data from a GPIO
bb_serial_read_close Closes a GPIO for bit bang serial reads
bb_serial_invert Invert serial logic (1 invert, 0 normal)
hardware_clock Start hardware clock on supported gpios
hardware_PWM Start hardware PWM on supported gpios
hardware_clock Start hardware clock on supported GPIO
hardware_PWM Start hardware PWM on supported GPIO
set_glitch_filter Set a glitch filter on a gpio
set_noise_filter Set a noise filter on a gpio
set_glitch_filter Set a glitch filter on a GPIO
set_noise_filter Set a noise filter on a GPIO
SCRIPTS
@ -236,8 +236,8 @@ i2c_write_device Writes the raw I2C device
i2c_zip Performs multiple I2C transactions
bb_i2c_open Opens gpios for bit banging I2C
bb_i2c_close Closes gpios for bit banging I2C
bb_i2c_open Opens GPIO for bit banging I2C
bb_i2c_close Closes GPIO for bit banging I2C
bb_i2c_zip Performs multiple bit banged I2C transactions
SPI
@ -385,7 +385,7 @@ D*/
/*F*/
int set_mode(unsigned gpio, unsigned mode);
/*D
Set the gpio mode.
Set the GPIO mode.
. .
gpio: 0-53.
@ -400,19 +400,19 @@ D*/
/*F*/
int get_mode(unsigned gpio);
/*D
Get the gpio mode.
Get the GPIO mode.
. .
gpio: 0-53.
. .
Returns the gpio mode if OK, otherwise PI_BAD_GPIO.
Returns the GPIO mode if OK, otherwise PI_BAD_GPIO.
D*/
/*F*/
int set_pull_up_down(unsigned gpio, unsigned pud);
/*D
Set or clear the gpio pull-up/down resistor.
Set or clear the GPIO pull-up/down resistor.
. .
gpio: 0-53.
@ -426,19 +426,19 @@ D*/
/*F*/
int gpio_read(unsigned gpio);
/*D
Read the gpio level.
Read the GPIO level.
. .
gpio:0-53.
. .
Returns the gpio level if OK, otherwise PI_BAD_GPIO.
Returns the GPIO level if OK, otherwise PI_BAD_GPIO.
D*/
/*F*/
int gpio_write(unsigned gpio, unsigned level);
/*D
Write the gpio level.
Write the GPIO level.
. .
gpio: 0-53.
@ -450,13 +450,13 @@ or PI_NOT_PERMITTED.
Notes
If PWM or servo pulses are active on the gpio they are switched off.
If PWM or servo pulses are active on the GPIO they are switched off.
D*/
/*F*/
int set_PWM_dutycycle(unsigned user_gpio, unsigned dutycycle);
/*D
Start (non-zero dutycycle) or stop (0) PWM pulses on the gpio.
Start (non-zero dutycycle) or stop (0) PWM pulses on the GPIO.
. .
user_gpio: 0-31.
@ -474,7 +474,7 @@ D*/
/*F*/
int get_PWM_dutycycle(unsigned user_gpio);
/*D
Return the PWM dutycycle in use on a gpio.
Return the PWM dutycycle in use on a GPIO.
. .
user_gpio: 0-31.
@ -483,19 +483,19 @@ user_gpio: 0-31.
Returns 0 if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
For normal PWM the dutycycle will be out of the defined range
for the gpio (see [*get_PWM_range*]).
for the GPIO (see [*get_PWM_range*]).
If a hardware clock is active on the gpio the reported dutycycle
If a hardware clock is active on the GPIO the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
If hardware PWM is active on the gpio the reported dutycycle
If hardware PWM is active on the GPIO the reported dutycycle
will be out of a 1000000 (1M).
D*/
/*F*/
int set_PWM_range(unsigned user_gpio, unsigned range);
/*D
Set the range of PWM values to be used on the gpio.
Set the range of PWM values to be used on the GPIO.
. .
user_gpio: 0-31.
@ -507,11 +507,11 @@ or PI_NOT_PERMITTED.
Notes
If PWM is currently active on the gpio its dutycycle will be
If PWM is currently active on the GPIO its dutycycle will be
scaled to reflect the new range.
The real range, the number of steps between fully off and fully on
for each of the 18 available gpio frequencies is
for each of the 18 available GPIO frequencies is
. .
25(#1), 50(#2), 100(#3), 125(#4), 200(#5), 250(#6),
@ -525,35 +525,35 @@ D*/
/*F*/
int get_PWM_range(unsigned user_gpio);
/*D
Get the range of PWM values being used on the gpio.
Get the range of PWM values being used on the GPIO.
. .
user_gpio: 0-31.
. .
Returns the dutycycle range used for the gpio if OK,
Returns the dutycycle range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
If a hardware clock or hardware PWM is active on the gpio the
If a hardware clock or hardware PWM is active on the GPIO the
reported range will be 1000000 (1M).
D*/
/*F*/
int get_PWM_real_range(unsigned user_gpio);
/*D
Get the real underlying range of PWM values being used on the gpio.
Get the real underlying range of PWM values being used on the GPIO.
. .
user_gpio: 0-31.
. .
Returns the real range used for the gpio if OK,
Returns the real range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
If a hardware clock is active on the gpio the reported
If a hardware clock is active on the GPIO the reported
real range will be 1000000 (1M).
If hardware PWM is active on the gpio the reported real range
If hardware PWM is active on the GPIO the reported real range
will be approximately 250M divided by the set PWM frequency.
D*/
@ -561,7 +561,7 @@ D*/
/*F*/
int set_PWM_frequency(unsigned user_gpio, unsigned frequency);
/*D
Set the frequency (in Hz) of the PWM to be used on the gpio.
Set the frequency (in Hz) of the PWM to be used on the GPIO.
. .
user_gpio: 0-31.
@ -575,10 +575,10 @@ The selectable frequencies depend upon the sample rate which
may be 1, 2, 4, 5, 8, or 10 microseconds (default 5). The
sample rate is set when the C pigpio library is started.
Each gpio can be independently set to one of 18 different
Each GPIO can be independently set to one of 18 different
PWM frequencies.
If PWM is currently active on the gpio it will be switched
If PWM is currently active on the GPIO it will be switched
off and then back on at the new frequency.
. .
@ -605,29 +605,29 @@ D*/
/*F*/
int get_PWM_frequency(unsigned user_gpio);
/*D
Get the frequency of PWM being used on the gpio.
Get the frequency of PWM being used on the GPIO.
. .
user_gpio: 0-31.
. .
For normal PWM the frequency will be that defined for the gpio by
For normal PWM the frequency will be that defined for the GPIO by
[*set_PWM_frequency*].
If a hardware clock is active on the gpio the reported frequency
If a hardware clock is active on the GPIO the reported frequency
will be that set by [*hardware_clock*].
If hardware PWM is active on the gpio the reported frequency
If hardware PWM is active on the GPIO the reported frequency
will be that set by [*hardware_PWM*].
Returns the frequency (in hertz) used for the gpio if OK,
Returns the frequency (in hertz) used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
D*/
/*F*/
int set_servo_pulsewidth(unsigned user_gpio, unsigned pulsewidth);
/*D
Start (500-2500) or stop (0) servo pulses on the gpio.
Start (500-2500) or stop (0) servo pulses on the GPIO.
. .
user_gpio: 0-31.
@ -662,7 +662,7 @@ Then set the PWM range using [*set_PWM_range*] to 1E6/Hz.
Doing this allows you to use units of microseconds when setting
the servo pulsewidth.
E.g. If you want to update a servo connected to gpio 25 at 400Hz
E.g. If you want to update a servo connected to GPIO 25 at 400Hz
. .
set_PWM_frequency(25, 400);
@ -676,7 +676,7 @@ D*/
/*F*/
int get_servo_pulsewidth(unsigned user_gpio);
/*D
Return the servo pulsewidth in use on a gpio.
Return the servo pulsewidth in use on a GPIO.
. .
user_gpio: 0-31.
@ -693,7 +693,7 @@ Get a free notification handle.
Returns a handle greater than or equal to zero if OK,
otherwise PI_NO_HANDLE.
A notification is a method for being notified of gpio state
A notification is a method for being notified of GPIO state
changes via a pipe.
Pipes are only accessible from the local machine so this function
@ -714,12 +714,12 @@ Start notifications on a previously opened handle.
. .
handle: 0-31 (as returned by [*notify_open*])
bits: a mask indicating the gpios to be notified.
bits: a mask indicating the GPIO to be notified.
. .
Returns 0 if OK, otherwise PI_BAD_HANDLE.
The notification sends state changes for each gpio whose
The notification sends state changes for each GPIO whose
corresponding bit in bits is set.
Notes
@ -765,7 +765,7 @@ D*/
/*F*/
int set_watchdog(unsigned user_gpio, unsigned timeout);
/*D
Sets a watchdog for a gpio.
Sets a watchdog for a GPIO.
. .
user_gpio: 0-31.
@ -777,24 +777,24 @@ or PI_BAD_WDOG_TIMEOUT.
The watchdog is nominally in milliseconds.
Only one watchdog may be registered per gpio.
Only one watchdog may be registered per GPIO.
The watchdog may be cancelled by setting timeout to 0.
If no level change has been detected for the gpio for timeout
milliseconds any notification for the gpio has a report written
If no level change has been detected for the GPIO for timeout
milliseconds any notification for the GPIO has a report written
to the fifo with the flags set to indicate a watchdog timeout.
The [*callback*] and [*callback_ex*] functions interpret the flags
and will call registered callbacks for the gpio with level TIMEOUT.
and will call registered callbacks for the GPIO with level TIMEOUT.
D*/
/*F*/
int set_glitch_filter(unsigned user_gpio, unsigned steady);
/*D
Sets a glitch filter on a gpio.
Sets a glitch filter on a GPIO.
Level changes on the gpio are not reported unless the level
Level changes on the GPIO are not reported unless the level
has been stable for at least [*steady*] microseconds. The
level is then reported. Level changes of less than [*steady*]
microseconds are ignored.
@ -813,11 +813,11 @@ D*/
/*F*/
int set_noise_filter(unsigned user_gpio, unsigned steady, unsigned active);
/*D
Sets a noise filter on a gpio.
Sets a noise filter on a GPIO.
Level changes on the gpio are ignored until a level which has
Level changes on the GPIO are ignored until a level which has
been stable for [*steady*] microseconds is detected. Level changes
on the gpio are then reported for [*active*] microseconds after
on the GPIO are then reported for [*active*] microseconds after
which the process repeats.
. .
@ -836,90 +836,90 @@ D*/
/*F*/
uint32_t read_bank_1(void);
/*D
Read the levels of the bank 1 gpios (gpios 0-31).
Read the levels of the bank 1 GPIO (GPIO 0-31).
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<n).
GPIO is logic 1. GPIO n has bit value (1<<n).
D*/
/*F*/
uint32_t read_bank_2(void);
/*D
Read the levels of the bank 2 gpios (gpios 32-53).
Read the levels of the bank 2 GPIO (GPIO 32-53).
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<(n-32)).
GPIO is logic 1. GPIO n has bit value (1<<(n-32)).
D*/
/*F*/
int clear_bank_1(uint32_t bits);
/*D
Clears gpios 0-31 if the corresponding bit in bits is set.
Clears GPIO 0-31 if the corresponding bit in bits is set.
. .
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be cleared.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int clear_bank_2(uint32_t bits);
/*D
Clears gpios 32-53 if the corresponding bit (0-21) in bits is set.
Clears GPIO 32-53 if the corresponding bit (0-21) in bits is set.
. .
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be cleared.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int set_bank_1(uint32_t bits);
/*D
Sets gpios 0-31 if the corresponding bit in bits is set.
Sets GPIO 0-31 if the corresponding bit in bits is set.
. .
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be set.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int set_bank_2(uint32_t bits);
/*D
Sets gpios 32-53 if the corresponding bit (0-21) in bits is set.
Sets GPIO 32-53 if the corresponding bit (0-21) in bits is set.
. .
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be set.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int hardware_clock(unsigned gpio, unsigned clkfreq);
/*D
Starts a hardware clock on a gpio at the specified frequency.
Starts a hardware clock on a GPIO at the specified frequency.
Frequencies above 30MHz are unlikely to work.
. .
@ -930,17 +930,17 @@ frequency: 0 (off) or 4689-250000000 (250M)
Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
PI_NOT_HCLK_GPIO, PI_BAD_HCLK_FREQ,or PI_BAD_HCLK_PASS.
The same clock is available on multiple gpios. The latest
frequency setting will be used by all gpios which share a clock.
The same clock is available on multiple GPIO. The latest
frequency setting will be used by all GPIO which share a clock.
The gpio must be one of the following.
The GPIO must be one of the following.
. .
4 clock 0 All models
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
6 clock 2 A+/B+/Pi2 and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
21 clock 1 All models but Rev.2 B (reserved for system use)
5 clock 1 All models but A and B (reserved for system use)
6 clock 2 All models but A and B
20 clock 0 All models but A and B
21 clock 1 All models but A and Rev.2 B (reserved for system use)
32 clock 0 Compute module only
34 clock 0 Compute module only
@ -951,14 +951,14 @@ The gpio must be one of the following.
Access to clock 1 is protected by a password as its use will likely
crash the Pi. The password is given by or'ing 0x5A000000 with the
gpio number.
GPIO number.
D*/
/*F*/
int hardware_PWM(unsigned gpio, unsigned PWMfreq, uint32_t PWMduty);
/*D
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Starts hardware PWM on a GPIO at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
NOTE: Any waveform started by [*wave_send_once*], [*wave_send_repeat*],
@ -978,17 +978,17 @@ Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
PI_NOT_HPWM_GPIO, PI_BAD_HPWM_DUTY, PI_BAD_HPWM_FREQ,
or PI_HPWM_ILLEGAL.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
The same PWM channel is available on multiple GPIO. The latest
frequency and dutycycle setting will be used by all GPIO which
share a PWM channel.
The gpio must be one of the following.
The GPIO must be one of the following.
. .
12 PWM channel 0 A+/B+/Pi2 and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
12 PWM channel 0 All models but A and B
13 PWM channel 1 All models but A and B
18 PWM channel 0 All models
19 PWM channel 1 A+/B+/Pi2 and compute module only
19 PWM channel 1 All models but A and B
40 PWM channel 0 Compute module only
41 PWM channel 1 Compute module only
@ -1022,7 +1022,7 @@ of /proc/cpuinfo.
If the hardware revision can not be found or is not a valid
hexadecimal number the function returns 0.
The revision number can be used to determine the assignment of gpios
The revision number can be used to determine the assignment of GPIO
to pins (see [*gpio*]).
There are at least three types of board.
@ -1077,7 +1077,7 @@ The pulses are interleaved in time order within the existing waveform
(if any).
Merging allows the waveform to be built in parts, that is the settings
for gpio#1 can be added, and then gpio#2 etc.
for GPIO#1 can be added, and then GPIO#2 etc.
If the added waveform is intended to start after or within the existing
waveform then the first pulse should consist solely of a delay.
@ -1164,8 +1164,8 @@ typedef struct
The fields specify
1) the gpios to be switched on at the start of the pulse.
2) the gpios to be switched off at the start of the pulse.
1) the GPIO to be switched on at the start of the pulse.
2) the GPIO to be switched off at the start of the pulse.
3) the delay in microseconds before the next pulse.
Any or all the fields can be zero. It doesn't make any sense to
@ -1403,7 +1403,7 @@ D*/
/*F*/
int gpio_trigger(unsigned user_gpio, unsigned pulseLen, unsigned level);
/*D
This function sends a trigger pulse to a gpio. The gpio is set to
This function sends a trigger pulse to a GPIO. The GPIO is set to
level for pulseLen microseconds and then reset to not level.
. .
@ -1501,7 +1501,7 @@ D*/
/*F*/
int bb_serial_read_open(unsigned user_gpio, unsigned baud, unsigned data_bits);
/*D
This function opens a gpio for bit bang reading of serial data.
This function opens a GPIO for bit bang reading of serial data.
. .
user_gpio: 0-31.
@ -1545,7 +1545,7 @@ D*/
/*F*/
int bb_serial_read_close(unsigned user_gpio);
/*D
This function closes a gpio for bit bang reading of serial data.
This function closes a GPIO for bit bang reading of serial data.
. .
user_gpio: 0-31, previously opened with [*bb_serial_read_open*].
@ -1990,7 +1990,7 @@ D*/
/*F*/
int bb_i2c_open(unsigned SDA, unsigned SCL, unsigned baud);
/*D
This function selects a pair of gpios for bit banging I2C at a
This function selects a pair of GPIO for bit banging I2C at a
specified baud rate.
Bit banging I2C allows for certain operations which are not possible
@ -1999,7 +1999,7 @@ with the standard I2C driver.
o baud rates as low as 50
o repeated starts
o clock stretching
o I2C on any pair of spare gpios
o I2C on any pair of spare GPIO
. .
SDA: 0-31
@ -2012,18 +2012,18 @@ PI_GPIO_IN_USE.
NOTE:
The gpios used for SDA and SCL must have pull-ups to 3V3 connected. As
The GPIO used for SDA and SCL must have pull-ups to 3V3 connected. As
a guide the hardware pull-ups on pins 3 and 5 are 1k8 in value.
D*/
/*F*/
int bb_i2c_close(unsigned SDA);
/*D
This function stops bit banging I2C on a pair of gpios previously
This function stops bit banging I2C on a pair of GPIO previously
opened with [*bb_i2c_open*].
. .
SDA: 0-31, the SDA gpio used in a prior call to [*bb_i2c_open*]
SDA: 0-31, the SDA GPIO used in a prior call to [*bb_i2c_open*]
. .
Returns 0 if OK, otherwise PI_BAD_USER_GPIO, or PI_NOT_I2C_GPIO.
@ -2108,12 +2108,13 @@ Data will be transferred at baud bits per second. The flags may
be used to modify the default behaviour of 4-wire operation, mode 0,
active low chip select.
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
An auxiliary SPI device is available on all models but the
A and B and may be selected by setting the A bit in the
flags. The auxiliary device has 3 chip selects and a
selectable word size in bits.
. .
spi_channel: 0-1 (0-2 for A+/B+/Pi2 auxiliary device).
spi_channel: 0-1 (0-2 for the auxiliary SPI device).
baud: 32K-125M (values above 30M are unlikely to work).
spi_flags: see below.
. .
@ -2142,10 +2143,9 @@ Mode POL PHA
px is 0 if CEx is active low (default) and 1 for active high.
ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the A+/B+/Pi2.
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
SPI device only.
@ -2392,8 +2392,8 @@ user_gpio: 0-31.
The function returns a callback id if OK, otherwise pigif_bad_malloc,
pigif_duplicate_callback, or pigif_bad_callback.
The callback is called with the gpio, edge, and tick, whenever the
gpio has the identified edge.
The callback is called with the GPIO, edge, and tick, whenever the
GPIO has the identified edge.
D*/
/*F*/
@ -2412,8 +2412,8 @@ user_gpio: 0-31.
The function returns a callback id if OK, otherwise pigif_bad_malloc,
pigif_duplicate_callback, or pigif_bad_callback.
The callback is called with the gpio, edge, tick, and user, whenever
the gpio has the identified edge.
The callback is called with the GPIO, edge, tick, and user, whenever
the GPIO has the identified edge.
D*/
@ -2432,7 +2432,7 @@ D*/
/*F*/
int wait_for_edge(unsigned user_gpio, unsigned edge, double timeout);
/*D
This function waits for edge on the gpio for up to timeout
This function waits for edge on the GPIO for up to timeout
seconds.
. .
@ -2483,7 +2483,7 @@ bit::
A value of 0 or 1.
bits::
A value used to select gpios. If bit n of bits is set then gpio n is
A value used to select GPIO. If bit n of bits is set then GPIO n is
selected.
A convenient way to set bit n is to or in (1<<n).
@ -2544,7 +2544,7 @@ The number may vary between 0 and range (default 255) where
0 is off and range is fully on.
edge::
Used to identify a gpio level transition of interest. A rising edge is
Used to identify a GPIO level transition of interest. A rising edge is
a level change from 0 to 1. A falling edge is a level change from 1 to 0.
. .
@ -2561,28 +2561,28 @@ f::
A function.
frequency::0-
The number of times a gpio is swiched on and off per second. This
can be set per gpio and may be as little as 5Hz or as much as
40KHz. The gpio will be on for a proportion of the time as defined
The number of times a GPIO is swiched on and off per second. This
can be set per GPIO and may be as little as 5Hz or as much as
40KHz. The GPIO will be on for a proportion of the time as defined
by its dutycycle.
gpio::
A Broadcom numbered gpio, in the range 0-53.
A Broadcom numbered GPIO, in the range 0-53.
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
There are 54 General Purpose Input Outputs (GPIO) named gpio0 through
gpio53.
They are split into two banks. Bank 1 consists of gpio0 through
gpio31. Bank 2 consists of gpio32 through gpio53.
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
All the GPIO which are safe for the user to read and write are in
bank 1. Not all GPIO in bank 1 are safe though. Type 1 boards
have 17 safe GPIO. Type 2 boards have 21. Type 3 boards have 26.
See [*get_hardware_revision*].
The user gpios are marked with an X in the following table.
The user GPIO are marked with an X in the following table.
. .
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
@ -2640,7 +2640,7 @@ invert::
A flag used to set normal or inverted bit bang serial data level logic.
level::
The level of a gpio. Low or High.
The level of a GPIO. Low or High.
. .
PI_OFF 0
@ -2653,7 +2653,7 @@ PI_LOW 0
PI_HIGH 1
. .
There is one exception. If a watchdog expires on a gpio the level will be
There is one exception. If a watchdog expires on a GPIO the level will be
reported as PI_TIMEOUT. See [*set_watchdog*].
. .
@ -2661,7 +2661,7 @@ PI_TIMEOUT 2
. .
mode::0-7
The operational mode of a gpio, normally INPUT or OUTPUT.
The operational mode of a GPIO, normally INPUT or OUTPUT.
. .
PI_INPUT 0
@ -2712,7 +2712,7 @@ pthread_t::
A thread identifier.
pud::0-2
The setting of the pull up/down resistor for a gpio, which may be off,
The setting of the pull up/down resistor for a GPIO, which may be off,
pull-up, or pull-down.
. .
PI_PUD_OFF 0
@ -2766,7 +2766,7 @@ The maximum number of bytes a user customised function should return.
A pointer to a buffer to receive data.
SCL::
The user gpio to use for the clock when bit banging I2C.
The user GPIO to use for the clock when bit banging I2C.
*script::
A pointer to the text of a script.
@ -2775,7 +2775,7 @@ script_id::
An id of a stored script as returned by [*store_script*].
SDA::
The user gpio to use for data when bit banging I2C.
The user GPIO to use for data when bit banging I2C.
seconds::
The number of seconds.
@ -2818,7 +2818,7 @@ A function of type gpioThreadFunc_t used as the main function of a
thread.
timeout::
A gpio watchdog timeout in milliseconds.
A GPIO watchdog timeout in milliseconds.
. .
PI_MIN_WDOG_TIMEOUT 0
PI_MAX_WDOG_TIMEOUT 60000
@ -2834,7 +2834,7 @@ unsigned::
A whole number >= 0.
user_gpio::
0-31, a Broadcom numbered gpio.
0-31, a Broadcom numbered GPIO.
See [*gpio*].

313
pigpiod_if2.3
View File

@ -21,7 +21,7 @@ gcc -Wall -pthread -o prog prog.c -lpigpiod_if2 -lrt
.br
pigpiod_if2 is a C library for the Raspberry which allows control
of the gpios via the socket interface to the pigpio daemon.
of the GPIO via the socket interface to the pigpio daemon.
.br
.br
@ -31,17 +31,17 @@ of the gpios via the socket interface to the pigpio daemon.
.br
.br
o PWM on any of gpios 0-31
o PWM on any of GPIO 0-31
.br
.br
o servo pulses on any of gpios 0-31
o servo pulses on any of GPIO 0-31
.br
.br
o callbacks when any of gpios 0-31 change state
o callbacks when any of GPIO 0-31 change state
.br
@ -51,17 +51,17 @@ o callbacks at timed intervals
.br
.br
o reading/writing all of the gpios in a bank as one operation
o reading/writing all of the GPIO in a bank as one operation
.br
.br
o individually setting gpio modes, reading and writing
o individually setting GPIO modes, reading and writing
.br
.br
o notifications when any of gpios 0-31 change state
o notifications when any of GPIO 0-31 change state
.br
@ -71,7 +71,7 @@ o the construction of output waveforms with microsecond timing
.br
.br
o rudimentary permission control over gpios
o rudimentary permission control over GPIO
.br
@ -91,11 +91,11 @@ o creating and running scripts on the pigpio daemon
.br
.br
.SS gpios
.SS GPIO
.br
.br
ALL gpios are identified by their Broadcom number.
ALL GPIO are identified by their Broadcom number.
.br
@ -319,7 +319,7 @@ pi: 0- (as returned by \fBpigpio_start\fP).
.IP "\fBint set_mode(int pi, unsigned gpio, unsigned mode)\fP"
.IP "" 4
Set the gpio mode.
Set the GPIO mode.
.br
@ -345,7 +345,7 @@ or PI_NOT_PERMITTED.
.IP "\fBint get_mode(int pi, unsigned gpio)\fP"
.IP "" 4
Get the gpio mode.
Get the GPIO mode.
.br
@ -362,11 +362,11 @@ gpio: 0-53.
.br
.br
Returns the gpio mode if OK, otherwise PI_BAD_GPIO.
Returns the GPIO mode if OK, otherwise PI_BAD_GPIO.
.IP "\fBint set_pull_up_down(int pi, unsigned gpio, unsigned pud)\fP"
.IP "" 4
Set or clear the gpio pull-up/down resistor.
Set or clear the GPIO pull-up/down resistor.
.br
@ -390,7 +390,7 @@ or PI_NOT_PERMITTED.
.IP "\fBint gpio_read(int pi, unsigned gpio)\fP"
.IP "" 4
Read the gpio level.
Read the GPIO level.
.br
@ -407,11 +407,11 @@ gpio:0-53.
.br
.br
Returns the gpio level if OK, otherwise PI_BAD_GPIO.
Returns the GPIO level if OK, otherwise PI_BAD_GPIO.
.IP "\fBint gpio_write(int pi, unsigned gpio, unsigned level)\fP"
.IP "" 4
Write the gpio level.
Write the GPIO level.
.br
@ -441,11 +441,11 @@ Notes
.br
.br
If PWM or servo pulses are active on the gpio they are switched off.
If PWM or servo pulses are active on the GPIO they are switched off.
.IP "\fBint set_PWM_dutycycle(int pi, unsigned user_gpio, unsigned dutycycle)\fP"
.IP "" 4
Start (non-zero dutycycle) or stop (0) PWM pulses on the gpio.
Start (non-zero dutycycle) or stop (0) PWM pulses on the GPIO.
.br
@ -476,7 +476,7 @@ default range of 255.
.IP "\fBint get_PWM_dutycycle(int pi, unsigned user_gpio)\fP"
.IP "" 4
Return the PWM dutycycle in use on a gpio.
Return the PWM dutycycle in use on a GPIO.
.br
@ -499,23 +499,23 @@ Returns 0 if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
.br
For normal PWM the dutycycle will be out of the defined range
for the gpio (see \fBget_PWM_range\fP).
for the GPIO (see \fBget_PWM_range\fP).
.br
.br
If a hardware clock is active on the gpio the reported dutycycle
If a hardware clock is active on the GPIO the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported dutycycle
If hardware PWM is active on the GPIO the reported dutycycle
will be out of a 1000000 (1M).
.IP "\fBint set_PWM_range(int pi, unsigned user_gpio, unsigned range)\fP"
.IP "" 4
Set the range of PWM values to be used on the gpio.
Set the range of PWM values to be used on the GPIO.
.br
@ -545,14 +545,14 @@ Notes
.br
.br
If PWM is currently active on the gpio its dutycycle will be
If PWM is currently active on the GPIO its dutycycle will be
scaled to reflect the new range.
.br
.br
The real range, the number of steps between fully off and fully on
for each of the 18 available gpio frequencies is
for each of the 18 available GPIO frequencies is
.br
@ -575,7 +575,7 @@ The real value set by set_PWM_range is (dutycycle * real range) / range.
.IP "\fBint get_PWM_range(int pi, unsigned user_gpio)\fP"
.IP "" 4
Get the range of PWM values being used on the gpio.
Get the range of PWM values being used on the GPIO.
.br
@ -592,18 +592,18 @@ user_gpio: 0-31.
.br
.br
Returns the dutycycle range used for the gpio if OK,
Returns the dutycycle range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
.br
.br
If a hardware clock or hardware PWM is active on the gpio the
If a hardware clock or hardware PWM is active on the GPIO the
reported range will be 1000000 (1M).
.IP "\fBint get_PWM_real_range(int pi, unsigned user_gpio)\fP"
.IP "" 4
Get the real underlying range of PWM values being used on the gpio.
Get the real underlying range of PWM values being used on the GPIO.
.br
@ -620,19 +620,19 @@ user_gpio: 0-31.
.br
.br
Returns the real range used for the gpio if OK,
Returns the real range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
.br
.br
If a hardware clock is active on the gpio the reported
If a hardware clock is active on the GPIO the reported
real range will be 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported real range
If hardware PWM is active on the GPIO the reported real range
will be approximately 250M divided by the set PWM frequency.
.br
@ -641,7 +641,7 @@ will be approximately 250M divided by the set PWM frequency.
.IP "\fBint set_PWM_frequency(int pi, unsigned user_gpio, unsigned frequency)\fP"
.IP "" 4
Set the frequency (in Hz) of the PWM to be used on the gpio.
Set the frequency (in Hz) of the PWM to be used on the GPIO.
.br
@ -673,13 +673,13 @@ sample rate is set when the C pigpio library is started.
.br
.br
Each gpio can be independently set to one of 18 different
Each GPIO can be independently set to one of 18 different
PWM frequencies.
.br
.br
If PWM is currently active on the gpio it will be switched
If PWM is currently active on the GPIO it will be switched
off and then back on at the new frequency.
.br
@ -726,7 +726,7 @@ off and then back on at the new frequency.
.IP "\fBint get_PWM_frequency(int pi, unsigned user_gpio)\fP"
.IP "" 4
Get the frequency of PWM being used on the gpio.
Get the frequency of PWM being used on the GPIO.
.br
@ -743,30 +743,30 @@ user_gpio: 0-31.
.br
.br
For normal PWM the frequency will be that defined for the gpio by
For normal PWM the frequency will be that defined for the GPIO by
\fBset_PWM_frequency\fP.
.br
.br
If a hardware clock is active on the gpio the reported frequency
If a hardware clock is active on the GPIO the reported frequency
will be that set by \fBhardware_clock\fP.
.br
.br
If hardware PWM is active on the gpio the reported frequency
If hardware PWM is active on the GPIO the reported frequency
will be that set by \fBhardware_PWM\fP.
.br
.br
Returns the frequency (in hertz) used for the gpio if OK,
Returns the frequency (in hertz) used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
.IP "\fBint set_servo_pulsewidth(int pi, unsigned user_gpio, unsigned pulsewidth)\fP"
.IP "" 4
Start (500-2500) or stop (0) servo pulses on the gpio.
Start (500-2500) or stop (0) servo pulses on the GPIO.
.br
@ -844,7 +844,7 @@ the servo pulsewidth.
.br
.br
E.g. If you want to update a servo connected to gpio 25 at 400Hz
E.g. If you want to update a servo connected to GPIO 25 at 400Hz
.br
@ -867,7 +867,7 @@ e.g. set_PWM_dutycycle(25, 1500) will set a 1500 us pulse.
.IP "\fBint get_servo_pulsewidth(int pi, unsigned user_gpio)\fP"
.IP "" 4
Return the servo pulsewidth in use on a gpio.
Return the servo pulsewidth in use on a GPIO.
.br
@ -909,7 +909,7 @@ otherwise PI_NO_HANDLE.
.br
.br
A notification is a method for being notified of gpio state
A notification is a method for being notified of GPIO state
changes via a pipe.
.br
@ -941,7 +941,7 @@ Start notifications on a previously opened handle.
.br
handle: 0-31 (as returned by \fBnotify_open\fP)
.br
bits: a mask indicating the gpios to be notified.
bits: a mask indicating the GPIO to be notified.
.br
.EE
@ -954,7 +954,7 @@ Returns 0 if OK, otherwise PI_BAD_HANDLE.
.br
.br
The notification sends state changes for each gpio whose
The notification sends state changes for each GPIO whose
corresponding bit in bits is set.
.br
@ -1034,7 +1034,7 @@ Returns 0 if OK, otherwise PI_BAD_HANDLE.
.IP "\fBint set_watchdog(int pi, unsigned user_gpio, unsigned timeout)\fP"
.IP "" 4
Sets a watchdog for a gpio.
Sets a watchdog for a GPIO.
.br
@ -1064,7 +1064,7 @@ The watchdog is nominally in milliseconds.
.br
.br
Only one watchdog may be registered per gpio.
Only one watchdog may be registered per GPIO.
.br
@ -1074,24 +1074,24 @@ The watchdog may be cancelled by setting timeout to 0.
.br
.br
If no level change has been detected for the gpio for timeout
milliseconds any notification for the gpio has a report written
If no level change has been detected for the GPIO for timeout
milliseconds any notification for the GPIO has a report written
to the fifo with the flags set to indicate a watchdog timeout.
.br
.br
The \fBcallback\fP and \fBcallback_ex\fP functions interpret the flags
and will call registered callbacks for the gpio with level TIMEOUT.
and will call registered callbacks for the GPIO with level TIMEOUT.
.IP "\fBint set_glitch_filter(int pi, unsigned user_gpio, unsigned steady)\fP"
.IP "" 4
Sets a glitch filter on a gpio.
Sets a glitch filter on a GPIO.
.br
.br
Level changes on the gpio are not reported unless the level
Level changes on the GPIO are not reported unless the level
has been stable for at least \fBsteady\fP microseconds. The
level is then reported. Level changes of less than
\fBsteady\fP microseconds are ignored.
@ -1123,14 +1123,14 @@ after it was first detected.
.IP "\fBint set_noise_filter(int pi, unsigned user_gpio, unsigned steady, unsigned active)\fP"
.IP "" 4
Sets a noise filter on a gpio.
Sets a noise filter on a GPIO.
.br
.br
Level changes on the gpio are ignored until a level which has
Level changes on the GPIO are ignored until a level which has
been stable for \fBsteady\fP microseconds is detected. Level changes
on the gpio are then reported for \fBactive\fP microseconds after
on the GPIO are then reported for \fBactive\fP microseconds after
which the process repeats.
.br
@ -1163,7 +1163,7 @@ such reports.
.IP "\fBuint32_t read_bank_1(int pi)\fP"
.IP "" 4
Read the levels of the bank 1 gpios (gpios 0-31).
Read the levels of the bank 1 GPIO (GPIO 0-31).
.br
@ -1179,11 +1179,11 @@ pi: 0- (as returned by \fBpigpio_start\fP).
.br
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<n).
GPIO is logic 1. GPIO n has bit value (1<<n).
.IP "\fBuint32_t read_bank_2(int pi)\fP"
.IP "" 4
Read the levels of the bank 2 gpios (gpios 32-53).
Read the levels of the bank 2 GPIO (GPIO 32-53).
.br
@ -1199,11 +1199,11 @@ pi: 0- (as returned by \fBpigpio_start\fP).
.br
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<(n-32)).
GPIO is logic 1. GPIO n has bit value (1<<(n-32)).
.IP "\fBint clear_bank_1(int pi, uint32_t bits)\fP"
.IP "" 4
Clears gpios 0-31 if the corresponding bit in bits is set.
Clears GPIO 0-31 if the corresponding bit in bits is set.
.br
@ -1212,7 +1212,7 @@ Clears gpios 0-31 if the corresponding bit in bits is set.
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be cleared.
.br
@ -1228,11 +1228,11 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint clear_bank_2(int pi, uint32_t bits)\fP"
.IP "" 4
Clears gpios 32-53 if the corresponding bit (0-21) in bits is set.
Clears GPIO 32-53 if the corresponding bit (0-21) in bits is set.
.br
@ -1241,7 +1241,7 @@ Clears gpios 32-53 if the corresponding bit (0-21) in bits is set.
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be cleared.
.br
@ -1257,11 +1257,11 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint set_bank_1(int pi, uint32_t bits)\fP"
.IP "" 4
Sets gpios 0-31 if the corresponding bit in bits is set.
Sets GPIO 0-31 if the corresponding bit in bits is set.
.br
@ -1270,7 +1270,7 @@ Sets gpios 0-31 if the corresponding bit in bits is set.
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be set.
.br
@ -1286,11 +1286,11 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint set_bank_2(int pi, uint32_t bits)\fP"
.IP "" 4
Sets gpios 32-53 if the corresponding bit (0-21) in bits is set.
Sets GPIO 32-53 if the corresponding bit (0-21) in bits is set.
.br
@ -1299,7 +1299,7 @@ Sets gpios 32-53 if the corresponding bit (0-21) in bits is set.
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
.br
to be set.
.br
@ -1315,11 +1315,11 @@ Returns 0 if OK, otherwise PI_SOME_PERMITTED.
.br
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
.IP "\fBint hardware_clock(int pi, unsigned gpio, unsigned clkfreq)\fP"
.IP "" 4
Starts a hardware clock on a gpio at the specified frequency.
Starts a hardware clock on a GPIO at the specified frequency.
Frequencies above 30MHz are unlikely to work.
.br
@ -1345,13 +1345,13 @@ PI_NOT_HCLK_GPIO, PI_BAD_HCLK_FREQ,or PI_BAD_HCLK_PASS.
.br
.br
The same clock is available on multiple gpios. The latest
frequency setting will be used by all gpios which share a clock.
The same clock is available on multiple GPIO. The latest
frequency setting will be used by all GPIO which share a clock.
.br
.br
The gpio must be one of the following.
The GPIO must be one of the following.
.br
@ -1360,13 +1360,13 @@ The gpio must be one of the following.
.EX
4 clock 0 All models
.br
5 clock 1 A+/B+/Pi2/Zero and compute module only (reserved for system use)
5 clock 1 All models but A and B (reserved for system use)
.br
6 clock 2 A+/B+/Pi2/Zero and compute module only
6 clock 2 All models but A and B
.br
20 clock 0 A+/B+/Pi2/Zero and compute module only
20 clock 0 All models but A and B
.br
21 clock 1 All models but Rev.2 B (reserved for system use)
21 clock 1 All models but A and Rev.2 B (reserved for system use)
.br
.br
@ -1388,11 +1388,11 @@ The gpio must be one of the following.
.br
Access to clock 1 is protected by a password as its use will likely
crash the Pi. The password is given by or'ing 0x5A000000 with the
gpio number.
GPIO number.
.IP "\fBint hardware_PWM(int pi, unsigned gpio, unsigned PWMfreq, uint32_t PWMduty)\fP"
.IP "" 4
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Starts hardware PWM on a GPIO at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
.br
@ -1434,27 +1434,27 @@ or PI_HPWM_ILLEGAL.
.br
.br
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
The same PWM channel is available on multiple GPIO. The latest
frequency and dutycycle setting will be used by all GPIO which
share a PWM channel.
.br
.br
The gpio must be one of the following.
The GPIO must be one of the following.
.br
.br
.EX
12 PWM channel 0 A+/B+/Pi2/Zero and compute module only
12 PWM channel 0 All models but A and B
.br
13 PWM channel 1 A+/B+/Pi2/Zero and compute module only
13 PWM channel 1 All models but A and B
.br
18 PWM channel 0 All models
.br
19 PWM channel 1 A+/B+/Pi2/Zero and compute module only
19 PWM channel 1 All models but A and B
.br
.br
@ -1548,7 +1548,7 @@ hexadecimal number the function returns 0.
.br
.br
The revision number can be used to determine the assignment of gpios
The revision number can be used to determine the assignment of GPIO
to pins (see \fBgpio\fP).
.br
@ -1660,7 +1660,7 @@ The pulses are interleaved in time order within the existing waveform
.br
Merging allows the waveform to be built in parts, that is the settings
for gpio#1 can be added, and then gpio#2 etc.
for GPIO#1 can be added, and then GPIO#2 etc.
.br
@ -1835,9 +1835,9 @@ The fields specify
.br
.br
1) the gpios to be switched on at the start of the pulse.
1) the GPIO to be switched on at the start of the pulse.
.br
2) the gpios to be switched off at the start of the pulse.
2) the GPIO to be switched off at the start of the pulse.
.br
3) the delay in microseconds before the next pulse.
.br
@ -2199,6 +2199,33 @@ int main(int argc, char *argv[])
.EE
.IP "\fBint wave_tx_at(int pi)\fP"
.IP "" 4
This function returns the id of the waveform currently being
transmitted.
.br
.br
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
.EE
.br
.br
Returns the waveform id or one of the following special values:
.br
.br
PI_WAVE_NOT_FOUND (9998) - transmitted wave not found.
.br
PI_NO_TX_WAVE (9999) - no wave being transmitted.
.IP "\fBint wave_tx_busy(int pi)\fP"
.IP "" 4
This function checks to see if a waveform is currently being
@ -2379,7 +2406,7 @@ pi: 0- (as returned by \fBpigpio_start\fP).
.IP "\fBint gpio_trigger(int pi, unsigned user_gpio, unsigned pulseLen, unsigned level)\fP"
.IP "" 4
This function sends a trigger pulse to a gpio. The gpio is set to
This function sends a trigger pulse to a GPIO. The GPIO is set to
level for pulseLen microseconds and then reset to not level.
.br
@ -2555,7 +2582,7 @@ The function returns 0 if OK, otherwise PI_BAD_SCRIPT_ID.
.IP "\fBint bb_serial_read_open(int pi, unsigned user_gpio, unsigned baud, unsigned data_bits)\fP"
.IP "" 4
This function opens a gpio for bit bang reading of serial data.
This function opens a GPIO for bit bang reading of serial data.
.br
@ -2635,7 +2662,7 @@ For \fBdata_bits\fP 17-32 there will be four bytes per character.
.IP "\fBint bb_serial_read_close(int pi, unsigned user_gpio)\fP"
.IP "" 4
This function closes a gpio for bit bang reading of serial data.
This function closes a GPIO for bit bang reading of serial data.
.br
@ -3475,7 +3502,7 @@ End
.IP "\fBint bb_i2c_open(int pi, unsigned SDA, unsigned SCL, unsigned baud)\fP"
.IP "" 4
This function selects a pair of gpios for bit banging I2C at a
This function selects a pair of GPIO for bit banging I2C at a
specified baud rate.
.br
@ -3493,7 +3520,7 @@ o repeated starts
.br
o clock stretching
.br
o I2C on any pair of spare gpios
o I2C on any pair of spare GPIO
.br
@ -3525,12 +3552,12 @@ NOTE:
.br
.br
The gpios used for SDA and SCL must have pull-ups to 3V3 connected. As
The GPIO used for SDA and SCL must have pull-ups to 3V3 connected. As
a guide the hardware pull-ups on pins 3 and 5 are 1k8 in value.
.IP "\fBint bb_i2c_close(int pi, unsigned SDA)\fP"
.IP "" 4
This function stops bit banging I2C on a pair of gpios previously
This function stops bit banging I2C on a pair of GPIO previously
opened with \fBbb_i2c_open\fP.
.br
@ -3540,7 +3567,7 @@ opened with \fBbb_i2c_open\fP.
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
SDA: 0-31, the SDA gpio used in a prior call to \fBbb_i2c_open\fP
SDA: 0-31, the SDA GPIO used in a prior call to \fBbb_i2c_open\fP
.br
.EE
@ -3700,9 +3727,10 @@ active low chip select.
.br
.br
An auxiliary SPI device is available on the A+/B+/Pi2/Zero and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
An auxiliary SPI device is available on all models but the
A and B and may be selected by setting the A bit in the
flags. The auxiliary device has 3 chip selects and a
selectable word size in bits.
.br
@ -3711,7 +3739,7 @@ device has 3 chip selects and a selectable word size in bits.
.EX
pi: 0- (as returned by \fBpigpio_start\fP).
.br
spi_channel: 0-1 (0-2 for A+/B+/Pi2/Zero auxiliary device).
spi_channel: 0-1 (0-2 for the auxiliary device).
.br
baud: 32K-125M (values above 30M are unlikely to work).
.br
@ -3779,13 +3807,12 @@ px is 0 if CEx is active low (default) and 1 for active high.
.br
.br
ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
.br
.br
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the A+/B+/Pi2/Zero.
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
.br
@ -3822,6 +3849,28 @@ sets 8 bits per word. Auxiliary SPI device only.
.br
.br
The \fBspi_read\fP, \fBspi_write\fP, and \fBspi_xfer\fP functions
transfer data packed into 1, 2, or 4 bytes according to
the word size in bits.
.br
.br
For bits 1-8 there will be one byte per character.
.br
For bits 9-16 there will be two bytes per character.
.br
For bits 17-32 there will be four bytes per character.
.br
.br
E.g. to transfer 32 12-bit words buf should contain 64 bytes
and count should be 64.
.br
.br
The other bits in flags should be set to zero.
@ -4213,8 +4262,8 @@ pigif_duplicate_callback, or pigif_bad_callback.
.br
.br
The callback is called with the gpio, edge, and tick, whenever the
gpio has the identified edge.
The callback is called with the GPIO, edge, and tick, whenever the
GPIO has the identified edge.
.IP "\fBint callback_ex(int pi, unsigned user_gpio, unsigned edge, CBFuncEx_t f, void *userdata)\fP"
.IP "" 4
@ -4247,8 +4296,8 @@ pigif_duplicate_callback, or pigif_bad_callback.
.br
.br
The callback is called with the gpio, edge, tick, and user, whenever
the gpio has the identified edge.
The callback is called with the GPIO, edge, tick, and user, whenever
the GPIO has the identified edge.
.IP "\fBint callback_cancel(unsigned callback_id)\fP"
.IP "" 4
@ -4271,7 +4320,7 @@ The function returns 0 if OK, otherwise pigif_callback_not_found.
.IP "\fBint wait_for_edge(int pi, unsigned user_gpio, unsigned edge, double timeout)\fP"
.IP "" 4
This function waits for edge on the gpio for up to timeout
This function waits for edge on the GPIO for up to timeout
seconds.
.br
@ -4383,7 +4432,7 @@ A value of 0 or 1.
.br
.IP "\fBbits\fP" 0
A value used to select gpios. If bit n of bits is set then gpio n is
A value used to select GPIO. If bit n of bits is set then GPIO n is
selected.
.br
@ -4523,7 +4572,7 @@ The number may vary between 0 and range (default 255) where
.br
.IP "\fBedge\fP" 0
Used to identify a gpio level transition of interest. A rising edge is
Used to identify a GPIO level transition of interest. A rising edge is
a level change from 0 to 1. A falling edge is a level change from 1 to 0.
.br
@ -4560,9 +4609,9 @@ A function.
.br
.IP "\fBfrequency\fP: 0-" 0
The number of times a gpio is swiched on and off per second. This
can be set per gpio and may be as little as 5Hz or as much as
40KHz. The gpio will be on for a proportion of the time as defined
The number of times a GPIO is swiched on and off per second. This
can be set per GPIO and may be as little as 5Hz or as much as
40KHz. The GPIO will be on for a proportion of the time as defined
by its dutycycle.
.br
@ -4574,12 +4623,12 @@ by its dutycycle.
.br
.IP "\fBgpio\fP" 0
A Broadcom numbered gpio, in the range 0-53.
A Broadcom numbered GPIO, in the range 0-53.
.br
.br
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
There are 54 General Purpose Input Outputs (GPIO) named gpio0 through
gpio53.
.br
@ -4591,9 +4640,9 @@ gpio31. Bank 2 consists of gpio32 through gpio53.
.br
.br
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
All the GPIO which are safe for the user to read and write are in
bank 1. Not all GPIO in bank 1 are safe though. Type 1 boards
have 17 safe GPIO. Type 2 boards have 21. Type 3 boards have 26.
.br
@ -4603,7 +4652,7 @@ See \fBget_hardware_revision\fP.
.br
.br
The user gpios are marked with an X in the following table.
The user GPIO are marked with an X in the following table.
.br
@ -4734,7 +4783,7 @@ A flag used to set normal or inverted bit bang serial data level logic.
.br
.IP "\fBlevel\fP" 0
The level of a gpio. Low or High.
The level of a GPIO. Low or High.
.br
@ -4763,7 +4812,7 @@ PI_HIGH 1
.br
.br
There is one exception. If a watchdog expires on a gpio the level will be
There is one exception. If a watchdog expires on a GPIO the level will be
reported as PI_TIMEOUT. See \fBset_watchdog\fP.
.br
@ -4781,7 +4830,7 @@ PI_TIMEOUT 2
.br
.IP "\fBmode\fP" 0
1. The operational mode of a gpio, normally INPUT or OUTPUT.
1. The operational mode of a GPIO, normally INPUT or OUTPUT.
.br
@ -4921,7 +4970,7 @@ A thread identifier.
.br
.IP "\fBpud\fP: 0-2" 0
The setting of the pull up/down resistor for a gpio, which may be off,
The setting of the pull up/down resistor for a GPIO, which may be off,
pull-up, or pull-down.
.EX
@ -5045,7 +5094,7 @@ A pointer to a buffer to receive data.
.br
.IP "\fBSCL\fP" 0
The user gpio to use for the clock when bit banging I2C.
The user GPIO to use for the clock when bit banging I2C.
.br
@ -5066,7 +5115,7 @@ An id of a stored script as returned by \fBstore_script\fP.
.br
.IP "\fBSDA\fP" 0
The user gpio to use for data when bit banging I2C.
The user GPIO to use for data when bit banging I2C.
.br
@ -5163,7 +5212,7 @@ thread.
.br
.IP "\fBtimeout\fP" 0
A gpio watchdog timeout in milliseconds.
A GPIO watchdog timeout in milliseconds.
.EX
PI_MIN_WDOG_TIMEOUT 0
@ -5199,7 +5248,7 @@ A whole number >= 0.
.br
.IP "\fBuser_gpio\fP" 0
0-31, a Broadcom numbered gpio.
0-31, a Broadcom numbered GPIO.
.br

5
pigpiod_if2.c
View File

@ -25,7 +25,7 @@ OTHER DEALINGS IN THE SOFTWARE.
For more information, please refer to <http://unlicense.org/>
*/
/* PIGPIOD_IF2_VERSION 3 */
/* PIGPIOD_IF2_VERSION 5 */
#include <stdio.h>
#include <stdlib.h>
@ -874,6 +874,9 @@ int wave_chain(int pi, char *buf, unsigned bufSize)
(pi, PI_CMD_WVCHA, 0, 0, bufSize, 1, ext, 1);
}
int wave_tx_at(int pi)
{return pigpio_command(pi, PI_CMD_WVTAT, 0, 0, 1);}
int wave_tx_busy(int pi)
{return pigpio_command(pi, PI_CMD_WVBSY, 0, 0, 1);}

364
pigpiod_if2.h
View File

@ -30,32 +30,32 @@ For more information, please refer to <http://unlicense.org/>
#include "pigpio.h"
#define PIGPIOD_IF2_VERSION 3
#define PIGPIOD_IF2_VERSION 5
/*TEXT
pigpiod_if2 is a C library for the Raspberry which allows control
of the gpios via the socket interface to the pigpio daemon.
of the GPIO via the socket interface to the pigpio daemon.
*Features*
o PWM on any of gpios 0-31
o PWM on any of GPIO 0-31
o servo pulses on any of gpios 0-31
o servo pulses on any of GPIO 0-31
o callbacks when any of gpios 0-31 change state
o callbacks when any of GPIO 0-31 change state
o callbacks at timed intervals
o reading/writing all of the gpios in a bank as one operation
o reading/writing all of the GPIO in a bank as one operation
o individually setting gpio modes, reading and writing
o individually setting GPIO modes, reading and writing
o notifications when any of gpios 0-31 change state
o notifications when any of GPIO 0-31 change state
o the construction of output waveforms with microsecond timing
o rudimentary permission control over gpios
o rudimentary permission control over GPIO
o a simple interface to start and stop new threads
@ -63,9 +63,9 @@ o I2C, SPI, and serial link wrappers
o creating and running scripts on the pigpio daemon
*gpios*
*GPIO*
ALL gpios are identified by their Broadcom number.
ALL GPIO are identified by their Broadcom number.
*Notes*
@ -106,68 +106,68 @@ pigpio_stop Disconnects from a pigpio daemon
BEGINNER
set_mode Set a gpio mode
get_mode Get a gpio mode
set_mode Set a GPIO mode
get_mode Get a GPIO mode
set_pull_up_down Set/clear gpio pull up/down resistor
set_pull_up_down Set/clear GPIO pull up/down resistor
gpio_read Read a gpio
gpio_write Write a gpio
gpio_read Read a GPIO
gpio_write Write a GPIO
set_PWM_dutycycle Start/stop PWM pulses on a gpio
get_PWM_dutycycle Get the PWM dutycycle in use on a gpio
set_PWM_dutycycle Start/stop PWM pulses on a GPIO
get_PWM_dutycycle Get the PWM dutycycle in use on a GPIO
set_servo_pulsewidth Start/stop servo pulses on a gpio
get_servo_pulsewidth Get the servo pulsewidth in use on a gpio
set_servo_pulsewidth Start/stop servo pulses on a GPIO
get_servo_pulsewidth Get the servo pulsewidth in use on a GPIO
callback Create gpio level change callback
callback_ex Create gpio level change callback
callback Create GPIO level change callback
callback_ex Create GPIO level change callback
callback_cancel Cancel a callback
wait_for_edge Wait for gpio level change
wait_for_edge Wait for GPIO level change
INTERMEDIATE
gpio_trigger Send a trigger pulse to a gpio.
gpio_trigger Send a trigger pulse to a GPIO.
set_watchdog Set a watchdog on a gpio.
set_watchdog Set a watchdog on a GPIO.
set_PWM_range Configure PWM range for a gpio
get_PWM_range Get configured PWM range for a gpio
set_PWM_range Configure PWM range for a GPIO
get_PWM_range Get configured PWM range for a GPIO
set_PWM_frequency Configure PWM frequency for a gpio
get_PWM_frequency Get configured PWM frequency for a gpio
set_PWM_frequency Configure PWM frequency for a GPIO
get_PWM_frequency Get configured PWM frequency for a GPIO
read_bank_1 Read all gpios in bank 1
read_bank_2 Read all gpios in bank 2
read_bank_1 Read all GPIO in bank 1
read_bank_2 Read all GPIO in bank 2
clear_bank_1 Clear selected gpios in bank 1
clear_bank_2 Clear selected gpios in bank 2
clear_bank_1 Clear selected GPIO in bank 1
clear_bank_2 Clear selected GPIO in bank 2
set_bank_1 Set selected gpios in bank 1
set_bank_2 Set selected gpios in bank 2
set_bank_1 Set selected GPIO in bank 1
set_bank_2 Set selected GPIO in bank 2
start_thread Start a new thread
stop_thread Stop a previously started thread
ADVANCED
get_PWM_real_range Get underlying PWM range for a gpio
get_PWM_real_range Get underlying PWM range for a GPIO
notify_open Request a notification handle
notify_begin Start notifications for selected gpios
notify_begin Start notifications for selected GPIO
notify_pause Pause notifications
notify_close Close a notification
bb_serial_read_open Opens a gpio for bit bang serial reads
bb_serial_read Reads bit bang serial data from a gpio
bb_serial_read_close Closes a gpio for bit bang serial reads
bb_serial_read_open Opens a GPIO for bit bang serial reads
bb_serial_read Reads bit bang serial data from a GPIO
bb_serial_read_close Closes a GPIO for bit bang serial reads
bb_serial_invert Invert serial logic (1 invert, 0 normal)
hardware_clock Start hardware clock on supported gpios
hardware_PWM Start hardware PWM on supported gpios
hardware_clock Start hardware clock on supported GPIO
hardware_PWM Start hardware PWM on supported GPIO
set_glitch_filter Set a glitch filter on a gpio
set_noise_filter Set a noise filter on a gpio
set_glitch_filter Set a glitch filter on a GPIO
set_noise_filter Set a noise filter on a GPIO
SCRIPTS
@ -194,6 +194,7 @@ wave_send_using_mode Transmits a waveform in the chosen mode
wave_chain Transmits a chain of waveforms
wave_tx_at Returns the current transmitting waveform
wave_tx_busy Checks to see if the waveform has ended
wave_tx_stop Aborts the current waveform
@ -234,8 +235,8 @@ i2c_write_device Writes the raw I2C device
i2c_zip Performs multiple I2C transactions
bb_i2c_open Opens gpios for bit banging I2C
bb_i2c_close Closes gpios for bit banging I2C
bb_i2c_open Opens GPIO for bit banging I2C
bb_i2c_close Closes GPIO for bit banging I2C
bb_i2c_zip Performs multiple bit banged I2C transactions
SPI
@ -393,7 +394,7 @@ D*/
/*F*/
int set_mode(int pi, unsigned gpio, unsigned mode);
/*D
Set the gpio mode.
Set the GPIO mode.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -409,20 +410,20 @@ D*/
/*F*/
int get_mode(int pi, unsigned gpio);
/*D
Get the gpio mode.
Get the GPIO mode.
. .
pi: 0- (as returned by [*pigpio_start*]).
gpio: 0-53.
. .
Returns the gpio mode if OK, otherwise PI_BAD_GPIO.
Returns the GPIO mode if OK, otherwise PI_BAD_GPIO.
D*/
/*F*/
int set_pull_up_down(int pi, unsigned gpio, unsigned pud);
/*D
Set or clear the gpio pull-up/down resistor.
Set or clear the GPIO pull-up/down resistor.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -437,20 +438,20 @@ D*/
/*F*/
int gpio_read(int pi, unsigned gpio);
/*D
Read the gpio level.
Read the GPIO level.
. .
pi: 0- (as returned by [*pigpio_start*]).
gpio:0-53.
. .
Returns the gpio level if OK, otherwise PI_BAD_GPIO.
Returns the GPIO level if OK, otherwise PI_BAD_GPIO.
D*/
/*F*/
int gpio_write(int pi, unsigned gpio, unsigned level);
/*D
Write the gpio level.
Write the GPIO level.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -463,13 +464,13 @@ or PI_NOT_PERMITTED.
Notes
If PWM or servo pulses are active on the gpio they are switched off.
If PWM or servo pulses are active on the GPIO they are switched off.
D*/
/*F*/
int set_PWM_dutycycle(int pi, unsigned user_gpio, unsigned dutycycle);
/*D
Start (non-zero dutycycle) or stop (0) PWM pulses on the gpio.
Start (non-zero dutycycle) or stop (0) PWM pulses on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -488,7 +489,7 @@ D*/
/*F*/
int get_PWM_dutycycle(int pi, unsigned user_gpio);
/*D
Return the PWM dutycycle in use on a gpio.
Return the PWM dutycycle in use on a GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -498,19 +499,19 @@ user_gpio: 0-31.
Returns 0 if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
For normal PWM the dutycycle will be out of the defined range
for the gpio (see [*get_PWM_range*]).
for the GPIO (see [*get_PWM_range*]).
If a hardware clock is active on the gpio the reported dutycycle
If a hardware clock is active on the GPIO the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
If hardware PWM is active on the gpio the reported dutycycle
If hardware PWM is active on the GPIO the reported dutycycle
will be out of a 1000000 (1M).
D*/
/*F*/
int set_PWM_range(int pi, unsigned user_gpio, unsigned range);
/*D
Set the range of PWM values to be used on the gpio.
Set the range of PWM values to be used on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -523,11 +524,11 @@ or PI_NOT_PERMITTED.
Notes
If PWM is currently active on the gpio its dutycycle will be
If PWM is currently active on the GPIO its dutycycle will be
scaled to reflect the new range.
The real range, the number of steps between fully off and fully on
for each of the 18 available gpio frequencies is
for each of the 18 available GPIO frequencies is
. .
25(#1), 50(#2), 100(#3), 125(#4), 200(#5), 250(#6),
@ -541,37 +542,37 @@ D*/
/*F*/
int get_PWM_range(int pi, unsigned user_gpio);
/*D
Get the range of PWM values being used on the gpio.
Get the range of PWM values being used on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
user_gpio: 0-31.
. .
Returns the dutycycle range used for the gpio if OK,
Returns the dutycycle range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
If a hardware clock or hardware PWM is active on the gpio the
If a hardware clock or hardware PWM is active on the GPIO the
reported range will be 1000000 (1M).
D*/
/*F*/
int get_PWM_real_range(int pi, unsigned user_gpio);
/*D
Get the real underlying range of PWM values being used on the gpio.
Get the real underlying range of PWM values being used on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
user_gpio: 0-31.
. .
Returns the real range used for the gpio if OK,
Returns the real range used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
If a hardware clock is active on the gpio the reported
If a hardware clock is active on the GPIO the reported
real range will be 1000000 (1M).
If hardware PWM is active on the gpio the reported real range
If hardware PWM is active on the GPIO the reported real range
will be approximately 250M divided by the set PWM frequency.
D*/
@ -579,7 +580,7 @@ D*/
/*F*/
int set_PWM_frequency(int pi, unsigned user_gpio, unsigned frequency);
/*D
Set the frequency (in Hz) of the PWM to be used on the gpio.
Set the frequency (in Hz) of the PWM to be used on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -594,10 +595,10 @@ The selectable frequencies depend upon the sample rate which
may be 1, 2, 4, 5, 8, or 10 microseconds (default 5). The
sample rate is set when the C pigpio library is started.
Each gpio can be independently set to one of 18 different
Each GPIO can be independently set to one of 18 different
PWM frequencies.
If PWM is currently active on the gpio it will be switched
If PWM is currently active on the GPIO it will be switched
off and then back on at the new frequency.
. .
@ -624,30 +625,30 @@ D*/
/*F*/
int get_PWM_frequency(int pi, unsigned user_gpio);
/*D
Get the frequency of PWM being used on the gpio.
Get the frequency of PWM being used on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
user_gpio: 0-31.
. .
For normal PWM the frequency will be that defined for the gpio by
For normal PWM the frequency will be that defined for the GPIO by
[*set_PWM_frequency*].
If a hardware clock is active on the gpio the reported frequency
If a hardware clock is active on the GPIO the reported frequency
will be that set by [*hardware_clock*].
If hardware PWM is active on the gpio the reported frequency
If hardware PWM is active on the GPIO the reported frequency
will be that set by [*hardware_PWM*].
Returns the frequency (in hertz) used for the gpio if OK,
Returns the frequency (in hertz) used for the GPIO if OK,
otherwise PI_BAD_USER_GPIO.
D*/
/*F*/
int set_servo_pulsewidth(int pi, unsigned user_gpio, unsigned pulsewidth);
/*D
Start (500-2500) or stop (0) servo pulses on the gpio.
Start (500-2500) or stop (0) servo pulses on the GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -683,7 +684,7 @@ Then set the PWM range using [*set_PWM_range*] to 1E6/Hz.
Doing this allows you to use units of microseconds when setting
the servo pulsewidth.
E.g. If you want to update a servo connected to gpio 25 at 400Hz
E.g. If you want to update a servo connected to GPIO 25 at 400Hz
. .
set_PWM_frequency(25, 400);
@ -697,7 +698,7 @@ D*/
/*F*/
int get_servo_pulsewidth(int pi, unsigned user_gpio);
/*D
Return the servo pulsewidth in use on a gpio.
Return the servo pulsewidth in use on a GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -719,7 +720,7 @@ pi: 0- (as returned by [*pigpio_start*]).
Returns a handle greater than or equal to zero if OK,
otherwise PI_NO_HANDLE.
A notification is a method for being notified of gpio state
A notification is a method for being notified of GPIO state
changes via a pipe.
Pipes are only accessible from the local machine so this function
@ -741,12 +742,12 @@ Start notifications on a previously opened handle.
. .
pi: 0- (as returned by [*pigpio_start*]).
handle: 0-31 (as returned by [*notify_open*])
bits: a mask indicating the gpios to be notified.
bits: a mask indicating the GPIO to be notified.
. .
Returns 0 if OK, otherwise PI_BAD_HANDLE.
The notification sends state changes for each gpio whose
The notification sends state changes for each GPIO whose
corresponding bit in bits is set.
Notes
@ -794,7 +795,7 @@ D*/
/*F*/
int set_watchdog(int pi, unsigned user_gpio, unsigned timeout);
/*D
Sets a watchdog for a gpio.
Sets a watchdog for a GPIO.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -807,24 +808,24 @@ or PI_BAD_WDOG_TIMEOUT.
The watchdog is nominally in milliseconds.
Only one watchdog may be registered per gpio.
Only one watchdog may be registered per GPIO.
The watchdog may be cancelled by setting timeout to 0.
If no level change has been detected for the gpio for timeout
milliseconds any notification for the gpio has a report written
If no level change has been detected for the GPIO for timeout
milliseconds any notification for the GPIO has a report written
to the fifo with the flags set to indicate a watchdog timeout.
The [*callback*] and [*callback_ex*] functions interpret the flags
and will call registered callbacks for the gpio with level TIMEOUT.
and will call registered callbacks for the GPIO with level TIMEOUT.
D*/
/*F*/
int set_glitch_filter(int pi, unsigned user_gpio, unsigned steady);
/*D
Sets a glitch filter on a gpio.
Sets a glitch filter on a GPIO.
Level changes on the gpio are not reported unless the level
Level changes on the GPIO are not reported unless the level
has been stable for at least [*steady*] microseconds. The
level is then reported. Level changes of less than
[*steady*] microseconds are ignored.
@ -845,11 +846,11 @@ D*/
int set_noise_filter(
int pi, unsigned user_gpio, unsigned steady, unsigned active);
/*D
Sets a noise filter on a gpio.
Sets a noise filter on a GPIO.
Level changes on the gpio are ignored until a level which has
Level changes on the GPIO are ignored until a level which has
been stable for [*steady*] microseconds is detected. Level changes
on the gpio are then reported for [*active*] microseconds after
on the GPIO are then reported for [*active*] microseconds after
which the process repeats.
. .
@ -869,102 +870,102 @@ D*/
/*F*/
uint32_t read_bank_1(int pi);
/*D
Read the levels of the bank 1 gpios (gpios 0-31).
Read the levels of the bank 1 GPIO (GPIO 0-31).
. .
pi: 0- (as returned by [*pigpio_start*]).
. .
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<n).
GPIO is logic 1. GPIO n has bit value (1<<n).
D*/
/*F*/
uint32_t read_bank_2(int pi);
/*D
Read the levels of the bank 2 gpios (gpios 32-53).
Read the levels of the bank 2 GPIO (GPIO 32-53).
. .
pi: 0- (as returned by [*pigpio_start*]).
. .
The returned 32 bit integer has a bit set if the corresponding
gpio is logic 1. Gpio n has bit value (1<<(n-32)).
GPIO is logic 1. GPIO n has bit value (1<<(n-32)).
D*/
/*F*/
int clear_bank_1(int pi, uint32_t bits);
/*D
Clears gpios 0-31 if the corresponding bit in bits is set.
Clears GPIO 0-31 if the corresponding bit in bits is set.
. .
pi: 0- (as returned by [*pigpio_start*]).
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be cleared.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int clear_bank_2(int pi, uint32_t bits);
/*D
Clears gpios 32-53 if the corresponding bit (0-21) in bits is set.
Clears GPIO 32-53 if the corresponding bit (0-21) in bits is set.
. .
pi: 0- (as returned by [*pigpio_start*]).
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be cleared.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int set_bank_1(int pi, uint32_t bits);
/*D
Sets gpios 0-31 if the corresponding bit in bits is set.
Sets GPIO 0-31 if the corresponding bit in bits is set.
. .
pi: 0- (as returned by [*pigpio_start*]).
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be set.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int set_bank_2(int pi, uint32_t bits);
/*D
Sets gpios 32-53 if the corresponding bit (0-21) in bits is set.
Sets GPIO 32-53 if the corresponding bit (0-21) in bits is set.
. .
pi: 0- (as returned by [*pigpio_start*]).
bits: a bit mask with 1 set if the corresponding gpio is
bits: a bit mask with 1 set if the corresponding GPIO is
to be set.
. .
Returns 0 if OK, otherwise PI_SOME_PERMITTED.
A status of PI_SOME_PERMITTED indicates that the user is not
allowed to write to one or more of the gpios.
allowed to write to one or more of the GPIO.
D*/
/*F*/
int hardware_clock(int pi, unsigned gpio, unsigned clkfreq);
/*D
Starts a hardware clock on a gpio at the specified frequency.
Starts a hardware clock on a GPIO at the specified frequency.
Frequencies above 30MHz are unlikely to work.
. .
@ -976,17 +977,17 @@ frequency: 0 (off) or 4689-250000000 (250M)
Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
PI_NOT_HCLK_GPIO, PI_BAD_HCLK_FREQ,or PI_BAD_HCLK_PASS.
The same clock is available on multiple gpios. The latest
frequency setting will be used by all gpios which share a clock.
The same clock is available on multiple GPIO. The latest
frequency setting will be used by all GPIO which share a clock.
The gpio must be one of the following.
The GPIO must be one of the following.
. .
4 clock 0 All models
5 clock 1 A+/B+/Pi2/Zero and compute module only (reserved for system use)
6 clock 2 A+/B+/Pi2/Zero and compute module only
20 clock 0 A+/B+/Pi2/Zero and compute module only
21 clock 1 All models but Rev.2 B (reserved for system use)
5 clock 1 All models but A and B (reserved for system use)
6 clock 2 All models but A and B
20 clock 0 All models but A and B
21 clock 1 All models but A and Rev.2 B (reserved for system use)
32 clock 0 Compute module only
34 clock 0 Compute module only
@ -997,14 +998,14 @@ The gpio must be one of the following.
Access to clock 1 is protected by a password as its use will likely
crash the Pi. The password is given by or'ing 0x5A000000 with the
gpio number.
GPIO number.
D*/
/*F*/
int hardware_PWM(int pi, unsigned gpio, unsigned PWMfreq, uint32_t PWMduty);
/*D
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Starts hardware PWM on a GPIO at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
NOTE: Any waveform started by [*wave_send_**] or [*wave_chain*]
@ -1025,17 +1026,17 @@ Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
PI_NOT_HPWM_GPIO, PI_BAD_HPWM_DUTY, PI_BAD_HPWM_FREQ,
or PI_HPWM_ILLEGAL.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
The same PWM channel is available on multiple GPIO. The latest
frequency and dutycycle setting will be used by all GPIO which
share a PWM channel.
The gpio must be one of the following.
The GPIO must be one of the following.
. .
12 PWM channel 0 A+/B+/Pi2/Zero and compute module only
13 PWM channel 1 A+/B+/Pi2/Zero and compute module only
12 PWM channel 0 All models but A and B
13 PWM channel 1 All models but A and B
18 PWM channel 0 All models
19 PWM channel 1 A+/B+/Pi2/Zero and compute module only
19 PWM channel 1 All models but A and B
40 PWM channel 0 Compute module only
41 PWM channel 1 Compute module only
@ -1087,7 +1088,7 @@ of /proc/cpuinfo.
If the hardware revision can not be found or is not a valid
hexadecimal number the function returns 0.
The revision number can be used to determine the assignment of gpios
The revision number can be used to determine the assignment of GPIO
to pins (see [*gpio*]).
There are at least three types of board.
@ -1155,7 +1156,7 @@ The pulses are interleaved in time order within the existing waveform
(if any).
Merging allows the waveform to be built in parts, that is the settings
for gpio#1 can be added, and then gpio#2 etc.
for GPIO#1 can be added, and then GPIO#2 etc.
If the added waveform is intended to start after or within the existing
waveform then the first pulse should consist solely of a delay.
@ -1247,8 +1248,8 @@ typedef struct
The fields specify
1) the gpios to be switched on at the start of the pulse.
2) the gpios to be switched off at the start of the pulse.
1) the GPIO to be switched on at the start of the pulse.
2) the GPIO to be switched off at the start of the pulse.
3) the delay in microseconds before the next pulse.
Any or all the fields can be zero. It doesn't make any sense to
@ -1442,6 +1443,22 @@ int main(int argc, char *argv[])
D*/
/*F*/
int wave_tx_at(int pi);
/*D
This function returns the id of the waveform currently being
transmitted.
. .
pi: 0- (as returned by [*pigpio_start*]).
. .
Returns the waveform id or one of the following special values:
PI_WAVE_NOT_FOUND (9998) - transmitted wave not found.
PI_NO_TX_WAVE (9999) - no wave being transmitted.
D*/
/*F*/
int wave_tx_busy(int pi);
/*D
@ -1569,7 +1586,7 @@ D*/
/*F*/
int gpio_trigger(int pi, unsigned user_gpio, unsigned pulseLen, unsigned level);
/*D
This function sends a trigger pulse to a gpio. The gpio is set to
This function sends a trigger pulse to a GPIO. The GPIO is set to
level for pulseLen microseconds and then reset to not level.
. .
@ -1673,7 +1690,7 @@ D*/
/*F*/
int bb_serial_read_open(int pi, unsigned user_gpio, unsigned baud, unsigned data_bits);
/*D
This function opens a gpio for bit bang reading of serial data.
This function opens a GPIO for bit bang reading of serial data.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -1719,7 +1736,7 @@ D*/
/*F*/
int bb_serial_read_close(int pi, unsigned user_gpio);
/*D
This function closes a gpio for bit bang reading of serial data.
This function closes a GPIO for bit bang reading of serial data.
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -2197,7 +2214,7 @@ D*/
/*F*/
int bb_i2c_open(int pi, unsigned SDA, unsigned SCL, unsigned baud);
/*D
This function selects a pair of gpios for bit banging I2C at a
This function selects a pair of GPIO for bit banging I2C at a
specified baud rate.
Bit banging I2C allows for certain operations which are not possible
@ -2206,7 +2223,7 @@ with the standard I2C driver.
o baud rates as low as 50
o repeated starts
o clock stretching
o I2C on any pair of spare gpios
o I2C on any pair of spare GPIO
. .
pi: 0- (as returned by [*pigpio_start*]).
@ -2220,19 +2237,19 @@ PI_GPIO_IN_USE.
NOTE:
The gpios used for SDA and SCL must have pull-ups to 3V3 connected. As
The GPIO used for SDA and SCL must have pull-ups to 3V3 connected. As
a guide the hardware pull-ups on pins 3 and 5 are 1k8 in value.
D*/
/*F*/
int bb_i2c_close(int pi, unsigned SDA);
/*D
This function stops bit banging I2C on a pair of gpios previously
This function stops bit banging I2C on a pair of GPIO previously
opened with [*bb_i2c_open*].
. .
pi: 0- (as returned by [*pigpio_start*]).
SDA: 0-31, the SDA gpio used in a prior call to [*bb_i2c_open*]
SDA: 0-31, the SDA GPIO used in a prior call to [*bb_i2c_open*]
. .
Returns 0 if OK, otherwise PI_BAD_USER_GPIO, or PI_NOT_I2C_GPIO.
@ -2319,13 +2336,14 @@ Data will be transferred at baud bits per second. The flags may
be used to modify the default behaviour of 4-wire operation, mode 0,
active low chip select.
An auxiliary SPI device is available on the A+/B+/Pi2/Zero and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
An auxiliary SPI device is available on all models but the
A and B and may be selected by setting the A bit in the
flags. The auxiliary device has 3 chip selects and a
selectable word size in bits.
. .
pi: 0- (as returned by [*pigpio_start*]).
spi_channel: 0-1 (0-2 for A+/B+/Pi2/Zero auxiliary device).
spi_channel: 0-1 (0-2 for the auxiliary device).
baud: 32K-125M (values above 30M are unlikely to work).
spi_flags: see below.
. .
@ -2354,10 +2372,9 @@ Mode POL PHA
px is 0 if CEx is active low (default) and 1 for active high.
ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the A+/B+/Pi2/Zero.
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
SPI device only.
@ -2377,6 +2394,17 @@ device only.
bbbbbb defines the word size in bits (0-32). The default (0)
sets 8 bits per word. Auxiliary SPI device only.
The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
transfer data packed into 1, 2, or 4 bytes according to
the word size in bits.
For bits 1-8 there will be one byte per character.
For bits 9-16 there will be two bytes per character.
For bits 17-32 there will be four bytes per character.
E.g. to transfer 32 12-bit words buf should contain 64 bytes
and count should be 64.
The other bits in flags should be set to zero.
D*/
@ -2619,8 +2647,8 @@ user_gpio: 0-31.
The function returns a callback id if OK, otherwise pigif_bad_malloc,
pigif_duplicate_callback, or pigif_bad_callback.
The callback is called with the gpio, edge, and tick, whenever the
gpio has the identified edge.
The callback is called with the GPIO, edge, and tick, whenever the
GPIO has the identified edge.
D*/
/*F*/
@ -2640,8 +2668,8 @@ user_gpio: 0-31.
The function returns a callback id if OK, otherwise pigif_bad_malloc,
pigif_duplicate_callback, or pigif_bad_callback.
The callback is called with the gpio, edge, tick, and user, whenever
the gpio has the identified edge.
The callback is called with the GPIO, edge, tick, and user, whenever
the GPIO has the identified edge.
D*/
/*F*/
@ -2659,7 +2687,7 @@ D*/
/*F*/
int wait_for_edge(int pi, unsigned user_gpio, unsigned edge, double timeout);
/*D
This function waits for edge on the gpio for up to timeout
This function waits for edge on the GPIO for up to timeout
seconds.
. .
@ -2716,7 +2744,7 @@ bit::
A value of 0 or 1.
bits::
A value used to select gpios. If bit n of bits is set then gpio n is
A value used to select GPIO. If bit n of bits is set then GPIO n is
selected.
A convenient way to set bit n is to or in (1<<n).
@ -2777,7 +2805,7 @@ The number may vary between 0 and range (default 255) where
0 is off and range is fully on.
edge::
Used to identify a gpio level transition of interest. A rising edge is
Used to identify a GPIO level transition of interest. A rising edge is
a level change from 0 to 1. A falling edge is a level change from 1 to 0.
. .
@ -2794,28 +2822,28 @@ f::
A function.
frequency::0-
The number of times a gpio is swiched on and off per second. This
can be set per gpio and may be as little as 5Hz or as much as
40KHz. The gpio will be on for a proportion of the time as defined
The number of times a GPIO is swiched on and off per second. This
can be set per GPIO and may be as little as 5Hz or as much as
40KHz. The GPIO will be on for a proportion of the time as defined
by its dutycycle.
gpio::
A Broadcom numbered gpio, in the range 0-53.
A Broadcom numbered GPIO, in the range 0-53.
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
There are 54 General Purpose Input Outputs (GPIO) named gpio0 through
gpio53.
They are split into two banks. Bank 1 consists of gpio0 through
gpio31. Bank 2 consists of gpio32 through gpio53.
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
All the GPIO which are safe for the user to read and write are in
bank 1. Not all GPIO in bank 1 are safe though. Type 1 boards
have 17 safe GPIO. Type 2 boards have 21. Type 3 boards have 26.
See [*get_hardware_revision*].
The user gpios are marked with an X in the following table.
The user GPIO are marked with an X in the following table.
. .
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
@ -2873,7 +2901,7 @@ invert::
A flag used to set normal or inverted bit bang serial data level logic.
level::
The level of a gpio. Low or High.
The level of a GPIO. Low or High.
. .
PI_OFF 0
@ -2886,7 +2914,7 @@ PI_LOW 0
PI_HIGH 1
. .
There is one exception. If a watchdog expires on a gpio the level will be
There is one exception. If a watchdog expires on a GPIO the level will be
reported as PI_TIMEOUT. See [*set_watchdog*].
. .
@ -2894,7 +2922,7 @@ PI_TIMEOUT 2
. .
mode::
1. The operational mode of a gpio, normally INPUT or OUTPUT.
1. The operational mode of a GPIO, normally INPUT or OUTPUT.
. .
PI_INPUT 0
@ -2958,7 +2986,7 @@ pthread_t::
A thread identifier.
pud::0-2
The setting of the pull up/down resistor for a gpio, which may be off,
The setting of the pull up/down resistor for a GPIO, which may be off,
pull-up, or pull-down.
. .
PI_PUD_OFF 0
@ -3012,7 +3040,7 @@ The maximum number of bytes a user customised function should return.
A pointer to a buffer to receive data.
SCL::
The user gpio to use for the clock when bit banging I2C.
The user GPIO to use for the clock when bit banging I2C.
*script::
A pointer to the text of a script.
@ -3021,7 +3049,7 @@ script_id::
An id of a stored script as returned by [*store_script*].
SDA::
The user gpio to use for data when bit banging I2C.
The user GPIO to use for data when bit banging I2C.
seconds::
The number of seconds.
@ -3064,7 +3092,7 @@ A function of type gpioThreadFunc_t used as the main function of a
thread.
timeout::
A gpio watchdog timeout in milliseconds.
A GPIO watchdog timeout in milliseconds.
. .
PI_MIN_WDOG_TIMEOUT 0
PI_MAX_WDOG_TIMEOUT 60000
@ -3080,7 +3108,7 @@ unsigned::
A whole number >= 0.
user_gpio::
0-31, a Broadcom numbered gpio.
0-31, a Broadcom numbered GPIO.
See [*gpio*].

411
pigs.1
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File diff suppressed because it is too large Load Diff

2
setup.py
View File

@ -3,7 +3,7 @@
from distutils.core import setup
setup(name='pigpio',
version='1.27',
version='1.29',
author='joan',
author_email='joan@abyz.co.uk',
maintainer='joan',

2
x_pigs
View File

@ -49,7 +49,7 @@ s=$(pigs bs2 0)
if [[ $s = "" ]]; then echo "BS2 ok"; else echo "BS2 fail ($s)"; fi
s=$(pigs h)
if [[ ${#s} = 4544 ]]; then echo "HELP ok"; else echo "HELP fail (${#s})"; fi
if [[ ${#s} = 4593 ]]; then echo "HELP ok"; else echo "HELP fail (${#s})"; fi
s=$(pigs hwver)
if [[ $s -ne 0 ]]; then echo "HWVER ok"; else echo "HWVER fail ($s)"; fi

4
x_pipe
View File

@ -57,7 +57,7 @@ if [[ $s = 0 ]]; then echo "BS2 ok"; else echo "BS2 fail ($s)"; fi
echo "h" >/dev/pigpio
read -t 1 s </dev/pigout
read -t 1 s </dev/pigout
if [[ $s = "BC1 bits Clear gpios in bank 1" ]]
if [[ $s = "BC1 bits Clear GPIO in bank 1" ]]
then echo "HELP-a ok"
else echo "HELP-a fail ($s)"
fi
@ -65,7 +65,7 @@ read -t 1 -N 9000 </dev/pigout # dump rest of help
echo "help" >/dev/pigpio
read -t 1 s </dev/pigout
read -t 1 s </dev/pigout
if [[ $s = "BC1 bits Clear gpios in bank 1" ]]
if [[ $s = "BC1 bits Clear GPIO in bank 1" ]]
then echo "HELP-b ok"
else echo "HELP-b fail ($s)"
fi