diff --git a/DOC/dbase/pigpio.sqlite b/DOC/dbase/pigpio.sqlite index 9f96137..017dd86 100644 Binary files a/DOC/dbase/pigpio.sqlite and b/DOC/dbase/pigpio.sqlite differ diff --git a/pigpio.3 b/pigpio.3 index 675c2ec..783bc92 100644 --- a/pigpio.3 +++ b/pigpio.3 @@ -4295,12 +4295,6 @@ queue and the master removes it. .br -.br -I can't get SPI to work properly. I tried with a -control word of 0x303 and swapped MISO and MOSI. - -.br - .br The function sets the BSC mode, writes any data in the transmit buffer to the BSC transmit FIFO, and @@ -4366,7 +4360,7 @@ GPIO used for models other than those based on the BCM2711. .br I2C 18 19 - - - - .br -SPI - - 18 19 20 21 +SPI - - 20 19 18 21 .br .br @@ -4381,7 +4375,7 @@ GPIO used for models based on the BCM2711 (e.g. the Pi4B). .br I2C 10 11 - - - - .br -SPI - - 10 11 9 8 +SPI - - 9 11 10 8 .br .br @@ -4495,7 +4489,7 @@ details. .br SSSSS number of bytes successfully copied to transmit FIFO .br -RRRRR number of bytes in receieve FIFO +RRRRR number of bytes in receive FIFO .br TTTTT number of bytes in transmit FIFO .br @@ -4554,6 +4548,23 @@ if (status >= 0) .EE +.br + +.br +The BSC slave in SPI mode deserializes data from the MOSI pin into its +receiver/FIFO when the LSB of the first byte is a 0. No data is output on +the MISO pin. When the LSB of the first byte on MOSI is a 1, the +transmitter/FIFO data is serialized onto the MISO pin while all other data +on the MOSI pin is ignored. + +.br + +.br +The BK bit of the BSC control register is non-functional when in the SPI +mode. The transmitter along with its FIFO can be dequeued by successively +disabling and re-enabling the TE bit on the BSC control register while in +SPI mode. + .IP "\fBint bbSPIOpen(unsigned CS, unsigned MISO, unsigned MOSI, unsigned SCLK, unsigned baud, unsigned spiFlags)\fP" .IP "" 4 This function selects a set of GPIO for bit banging SPI with @@ -5908,36 +5919,6 @@ PI_TOO_MANY_PARAM. param is an array of up to 10 parameters which may be referenced in the script as p0 to p9. -.IP "\fBint gpioRunScript(unsigned script_id, unsigned numPar, uint32_t *param)\fP" -.IP "" 4 -This function runs a stored script. - -.br - -.br - -.EX -script_id: >=0, as returned by \fBgpioStoreScript\fP -.br - numPar: 0-10, the number of parameters -.br - param: an array of parameters -.br - -.EE - -.br - -.br -The function returns 0 if OK, otherwise PI_BAD_SCRIPT_ID, or -PI_TOO_MANY_PARAM. - -.br - -.br -param is an array of up to 10 parameters which may be referenced in -the script as p0 to p9. - .IP "\fBint gpioUpdateScript(unsigned script_id, unsigned numPar, uint32_t *param)\fP" .IP "" 4 This function sets the parameters of a script. The script may or diff --git a/pigpiod_if2.3 b/pigpiod_if2.3 index 9226593..1f55ee5 100644 --- a/pigpiod_if2.3 +++ b/pigpiod_if2.3 @@ -716,7 +716,7 @@ No value is returned. .br The thread to be stopped should have been started with \fBstart_thread\fP. -.IP "\fBint pigpio_start(char *addrStr, char *portStr)\fP" +.IP "\fBint pigpio_start(const char *addrStr, const char *portStr)\fP" .IP "" 4 Connect to the pigpio daemon. Reserving command and notification streams. @@ -949,7 +949,8 @@ user_gpio: 0-31. .br .br -Returns current PWM dutycycle if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO. +Returns current PWM dutycycle if OK, +otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO. .br @@ -6215,12 +6216,6 @@ queue and the master removes it. .br -.br -I can't get SPI to work properly. I tried with a -control word of 0x303 and swapped MISO and MOSI. - -.br - .br The function sets the BSC mode, writes any data in the transmit buffer to the BSC transmit FIFO, and @@ -6306,7 +6301,7 @@ GPIO used for models other than those based on the BCM2711. .br I2C 18 19 - - - - .br -SPI - - 18 19 20 21 +SPI - - 20 19 18 21 .br .br @@ -6321,7 +6316,7 @@ GPIO used for models based on the BCM2711 (e.g. the Pi4B). .br I2C 10 11 - - - - .br -SPI - - 10 11 9 8 +SPI - - 9 11 10 8 .br .br @@ -6417,7 +6412,7 @@ details. .br SSSSS number of bytes successfully copied to transmit FIFO .br -RRRRR number of bytes in receieve FIFO +RRRRR number of bytes in receive FIFO .br TTTTT number of bytes in transmit FIFO .br @@ -6476,6 +6471,23 @@ if (status >= 0) .EE +.br + +.br +The BSC slave in SPI mode deserializes data from the MOSI pin into its +receiver/FIFO when the LSB of the first byte is a 0. No data is output on +the MISO pin. When the LSB of the first byte on MOSI is a 1, the +transmitter/FIFO data is serialized onto the MISO pin while all other data +on the MOSI pin is ignored. + +.br + +.br +The BK bit of the BSC control register is non-functional when in the SPI +mode. The transmitter along with its FIFO can be dequeued by successively +disabling and re-enabling the TE bit on the BSC control register while in +SPI mode. + .IP "\fBint bsc_i2c(int pi, int i2c_addr, bsc_xfer_t *bscxfer)\fP" .IP "" 4 This function allows the Pi to act as a slave I2C device. diff --git a/pigs.1 b/pigs.1 index 9b53e0e..1d9bf6f 100644 --- a/pigs.1 +++ b/pigs.1 @@ -928,10 +928,6 @@ The output process is simple. You simply append data to the FIFO buffer on the chip. This works like a queue, you add data to the queue and the master removes it. -.br -I can't get SPI to work properly. I tried with a -control word of 0x303 and swapped MISO and MOSI. - .br The command sets the BSC mode and writes any data \fBbvs\fP to the BSC transmit FIFO. It returns the data count (at least 1 @@ -956,7 +952,7 @@ GPIO used for models other than those based on the BCM2711. .EX SDA SCL MOSI SCLK MISO CE I2C 18 19 - - - - -SPI - - 18 19 20 21 +SPI - - 20 19 18 21 .EE @@ -968,7 +964,7 @@ GPIO used for models based on the BCM2711 (e.g. the Pi4B). .EX SDA SCL MOSI SCLK MISO CE I2C 10 11 - - - - -SPI - - 10 11 9 8 +SPI - - 9 11 10 8 .EE @@ -1139,6 +1135,57 @@ $ pigs i2crd 0 5 .EE +.br +The BSC slave in SPI mode deserializes data from the MOSI pin into its receiver/ +FIFO when the LSB of the first byte is a 0. No data is output on the MISO pin. +When the LSB of the first byte on MOSI is a 1, the transmitter/FIFO data is +serialized onto the MISO pin while all other data on the MOSI pin is ignored. + +.br +The BK bit of the BSC control register is non-functional when in the SPI mode. +The transmitter along with its FIFO can be dequeued by successively disabling +and re-enabling the TE bit on the BSC control register while in SPI mode. + +.br +This example demonstrates a SPI master talking to the BSC as SPI slave: +Requires SPI master SCLK / MOSI / MISO / CE GPIO are connected to +BSC peripheral GPIO 11 / 9 / 10 / 8 respectively, on a Pi4B (BCM2711). + +.br + +\fBExample\fP +.br + +.EX +$ pigs bspio 15 26 13 14 10000 0 # open bit-bang spi master on random gpio +.br + +.br +$ pigs bscx 0x303 # start BSC as SPI slave, both rx and tx enabled +.br +1 18 +.br + +.br +$ pigs bspix 15 0 0xd 0xe 0xa 0xd # write 0xdead to BSC +.br +5 0 0 0 0 0 +.br + +.br +$ pigs bscx 0x303 0xb 0xe 0xe 0xf # place 0xbeef in BSC tx FIFO, read rx FIFO +.br +5 262338 13 14 10 13 +.br + +.br +$ pigs bspix 15 1 0 0 0 0 # read four bytes from BSC +.br +5 0 11 14 14 15 +.br + +.EE + .br .IP "\fBBSPIC cs\fP - Close bit bang SPI"