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V30

This commit is contained in:
joan 2015-02-25 20:34:52 +00:00
parent 9aeb30d0dc
commit adb8c8dbf6
17 changed files with 1816 additions and 854 deletions
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2
EXAMPLES/C/IR_RECEIVER/test_ir_hasher.c
View File

@ -12,7 +12,7 @@ An IR receiver output pin connected to a Pi gpio.
TO BUILD
gcc -o ir_hash_c test_ir_hasher.c ir_hasher.c -lpigpio -lrt
gcc -o ir_hash_c test_ir_hasher.c ir_hasher.c -lpigpio -lrt -lpthread
TO RUN

2
EXAMPLES/CPP/IR_RECEIVER/test_ir_hasher.cpp
View File

@ -12,7 +12,7 @@ An IR receiver output pin connected to a Pi gpio.
TO BUILD
g++ -o ir_hash_cpp test_ir_hasher.cpp ir_hasher.cpp -lpigpio -lrt
g++ -o ir_hash_cpp test_ir_hasher.cpp ir_hasher.cpp -lpigpio -lrt -lpthread
TO RUN

6
README
View File

@ -1,3 +1,9 @@
NOTE
The initial part of the make, the compilation of pigpio.c,
takes 100 seconds on early model Pis. Be patient. The overall
install takes just over 3 minutes.
INSTALL
Extract the archive to a directory.

18
command.c
View File

@ -26,7 +26,7 @@ For more information, please refer to <http://unlicense.org/>
*/
/*
This version is for pigpio version 26+
This version is for pigpio version 30+
*/
#include <stdio.h>
@ -345,7 +345,7 @@ WVTXR wid Transmit wave repeatedly\n\
bits = a mask where (1<<g) is set for each gpio g of interest\n\
bv = byte value (0-255)\n\
bvs = one or more byte values (0-255)\n\
cf = hardware clock frequency (4689-25M)\n\
cf = hardware clock frequency (4689-250M)\n\
db = data bits (1-32)\n\
g = any gpio (0-53)\n\
h = handle (>=0)\n\
@ -359,8 +359,8 @@ num = number of bytes to read\n\
o = offset (>=0)\n\
p = pud (ODU)\n\
pars = 0 to 10 parameters for script\n\
pdc = hardware PWM dutycycle (0-5000)\n\
pf = hardware PWM frequency (5-50K)\n\
pdc = hardware PWM dutycycle (0-1M)\n\
pf = hardware PWM frequency (1-125M)\n\
pl = pulse length (1-100)\n\
r = register\n\
sid = script id (>=0)\n\
@ -486,14 +486,14 @@ static errInfo_t errInfo[]=
{PI_NOT_SERVO_GPIO , "gpio is not in use for servo pulses"},
{PI_NOT_HCLK_GPIO , "gpio has no hardware clock"},
{PI_NOT_HPWM_GPIO , "gpio has no hardware PWM"},
{PI_BAD_HPWM_FREQ , "hardware PWM frequency not 5-50K"},
{PI_BAD_HPWM_DUTY , "hardware PWM dutycycle not 0-5000"},
{PI_BAD_HCLK_FREQ , "hardware clock frequency not 4689-25M"},
{PI_BAD_HPWM_FREQ , "hardware PWM frequency not 1-125M"},
{PI_BAD_HPWM_DUTY , "hardware PWM dutycycle not 0-1M"},
{PI_BAD_HCLK_FREQ , "hardware clock frequency not 4689-250M"},
{PI_BAD_HCLK_PASS , "need password to use hardware clock 1"},
{PI_HPWM_ILLEGAL , "illegal, PWM in use for main clock"},
{PI_BAD_DATABITS , "serial data bits not 1-32"},
{PI_BAD_STOPBITS , "serial (half) stop bits not 2-8"},
{PI_MSG_TOOBIG , "socket/pipe message too big"},
{PI_BAD_MALLOC_MODE , "bad memory allocation mode"},
};

359
pigpio.3
View File

@ -154,7 +154,7 @@ All the functions which return an int return < 0 on error.
.br
.br
If the library isn't initialised all but the \fBgpioCfg*\fP, \fBgpioVersion\fP,
If the library is not initialised all but the \fBgpioCfg*\fP, \fBgpioVersion\fP,
and \fBgpioHardwareRevision\fP functions will return PI_NOT_INITIALISED.
.br
@ -230,7 +230,7 @@ Call before program exit.
.br
.br
This function resets the DMA and PWM peripherals, releases memory, and
This function resets the used DMA channels, releases memory, and
terminates any running threads.
.br
@ -531,10 +531,19 @@ PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
.br
For normal PWM the dutycycle will be out of the defined range
for the gpio (see \fBgpioGetPWMrange\fP). If a hardware clock is
active on the gpio the reported dutycycle will be 500 (out of 1000).
for the gpio (see \fBgpioGetPWMrange\fP).
.br
.br
If a hardware clock is active on the gpio the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported dutycycle
will be out of a 1000.
will be out of a 1000000 (1M).
.br
@ -628,7 +637,7 @@ user_gpio: 0-31
.br
If a hardware clock or hardware PWM is active on the gpio
the reported range will be 1000.
the reported range will be 1000000 (1M).
.br
@ -660,8 +669,14 @@ user_gpio: 0-31
.br
.br
If a hardware clock or hardware PWM is active on the gpio
the reported real range will be 1000.
If a hardware clock is active on the gpio the reported real
range will be 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported real range
will be approximately 250M divided by the set PWM frequency.
.br
@ -807,8 +822,17 @@ user_gpio: 0-31
.br
For normal PWM the frequency will be that defined for the gpio by
\fBgpioSetPWMfrequency\fP. If a hardware clock is active on the gpio
the reported frequency will be that set by \fBgpioHardwareClock\fP.
\fBgpioSetPWMfrequency\fP.
.br
.br
If a hardware clock is active on the gpio the reported frequency
will be that set by \fBgpioHardwareClock\fP.
.br
.br
If hardware PWM is active on the gpio the reported frequency
will be that set by \fBgpioHardwarePWM\fP.
@ -1985,7 +2009,9 @@ data bits \fBbbBits\fP specified in the \fBgpioSerialReadOpen\fP command.
.br
For \fBbbBits\fP 1-8 there will be one byte per character.
.br
For \fBbbBits\fP 9-16 there will be two bytes per character.
.br
For \fBbbBits\fP 17-32 there will be four bytes per character.
.IP "\fBint gpioSerialReadClose(unsigned user_gpio)\fP"
@ -2500,7 +2526,7 @@ active low chip select.
.br
.br
An auxiliary SPI device is available on the B+ and may be
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
@ -2509,7 +2535,7 @@ device has 3 chip selects and a selectable word size in bits.
.br
.EX
spiChan: 0-1 (0-2 for B+ auxiliary device)
spiChan: 0-1 (0-2 for A+/B+/Pi2 auxiliary device)
.br
spiBaud: 32K-125M (values above 30M are unlikely to work)
.br
@ -2548,6 +2574,11 @@ mm defines the SPI mode.
.br
.br
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
.br
.br
.EX
@ -2578,7 +2609,7 @@ ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
.br
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the B+.
auxiliary device is only present on the A+/B+/Pi2.
.br
@ -3641,6 +3672,7 @@ gpioWrite_Bits_32_53_Set((1<<(32-32)) | (1<<(40-32)) | (1<<(53-32)));
.IP "\fBint gpioHardwareClock(unsigned gpio, unsigned clkfreq)\fP"
.IP "" 4
Starts a hardware clock on a gpio at the specified frequency.
Frequencies above 30MHz are unlikely to work.
.br
@ -3649,7 +3681,7 @@ Starts a hardware clock on a gpio at the specified frequency.
.EX
gpio: see description
.br
clkfreq: 0 (off) or 4689-250M
clkfreq: 0 (off) or 4689-250000000 (250M)
.br
.EE
@ -3678,11 +3710,11 @@ The gpio must be one of the following.
.EX
4 clock 0 All models
.br
5 clock 1 A+/B+ and compute module only (reserved for system use)
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
.br
6 clock 2 A+/B+ and compute module only
6 clock 2 A+/B+/Pi2 and compute module only
.br
20 clock 0 A+/B+ and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
.br
21 clock 1 All models but Rev.2 B (reserved for system use)
.br
@ -3711,6 +3743,7 @@ gpio number.
.IP "\fBint gpioHardwarePWM(unsigned gpio, unsigned PWMfreq, unsigned PWMduty)\fP"
.IP "" 4
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
.br
@ -3732,9 +3765,9 @@ main clock defaults to PCM but may be overridden by a call to
.EX
gpio: see description
.br
PWMfreq: 0 (off) or 5-250K
PWMfreq: 0 (off) or 1-125000000 (125M)
.br
PWMduty: 0 (off) to 1000 (fully on).
PWMduty: 0 (off) to 1000000 (1M)(fully on)
.br
.EE
@ -3748,10 +3781,9 @@ PI_BAD_HPWM_DUTY, PI_BAD_HPWM_FREQ, or PI_HPWM_ILLEGAL.
.br
.br
Both PWM channels share the same clock and the same update frequency.
The latest frequency setting will be used by both PWM channels. The
same PWM channel is available on multiple gpios. The latest
dutycycle setting will be used by all gpios which share a PWM channel.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
share a PWM channel.
.br
@ -3763,13 +3795,13 @@ The gpio must be one of the following.
.br
.EX
12 PWM channel 0 A+/B+ and compute module only
12 PWM channel 0 A+/B+/Pi2 and compute module only
.br
13 PWM channel 1 A+/B+ and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
.br
18 PWM channel 0 All models
.br
19 PWM channel 1 A+/B+ and compute module only
19 PWM channel 1 A+/B+/Pi2 and compute module only
.br
.br
@ -3998,14 +4030,14 @@ number the function returns 0.
.br
.br
The hardware revision is the last 4 characters on the Revision line of
The hardware revision is the last few characters on the Revision line of
/proc/cpuinfo.
.br
.br
The revision number can be used to determine the assignment of gpios
to pins.
to pins (see \fBgpio\fP).
.br
@ -4014,23 +4046,6 @@ There are at least three types of board.
.br
.br
Type 1 has gpio 0 on P1-3, gpio 1 on P1-5, and gpio 21 on P1-13.
.br
.br
Type 2 has gpio 2 on P1-3, gpio 3 on P1-5, gpio 27 on P1-13, and
gpios 28-31 on P5.
.br
.br
Type 3 has a 40 pin connector rather than the 26 pin connector of
the earlier boards. Gpios 0 to 27 are brought out to the connector.
.br
.br
Type 1 boards have hardware revision numbers of 2 and 3.
@ -4042,7 +4057,7 @@ Type 2 boards have hardware revision numbers of 4, 5, 6, and 15.
.br
.br
Type 3 boards have hardware revision number 16.
Type 3 boards have hardware revision numbers of 16 or greater.
.br
@ -4121,7 +4136,7 @@ sample 4 8 12 18 31 55 107 ---
.IP "\fBint gpioCfgClock(unsigned cfgMicros, unsigned cfgPeripheral, unsigned cfgSource)\fP"
.IP "" 4
Configures pigpio to use a particualar sample rate timed by a specified
Configures pigpio to use a particular sample rate timed by a specified
peripheral.
.br
@ -4309,7 +4324,50 @@ The default setting (0) is that both interfaces are enabled.
Or in PI_DISABLE_FIFO_IF to disable the pipe interface.
Or in PI_DISABLE_SOCK_IF to disable the socket interface.
.IP "\fBint gpioCustom1(unsigned arg1, unsigned arg2, char *argx, unsigned count)\fP"
.IP "\fBint gpioCfgMemAlloc(unsigned memAllocMode)\fP"
.IP "" 4
Selects the method of DMA memory allocation.
.br
.br
.EX
memAllocMode: 0-2
.br
.EE
.br
.br
There are two methods of DMA memory allocation. The original method
uses the /proc/self/pagemap file to allocate bus memory. The new
method uses the mailbox property interface to allocate bus memory.
.br
.br
Auto will use the mailbox method unless a larger than default buffer
size is requested with \fBgpioCfgBufferSize\fP.
.IP "\fBint gpioCfgInternals(unsigned cfgWhat, int cfgVal)\fP"
.IP "" 4
Used to tune internal settings.
.br
.br
.EX
cfgWhat: see source code
.br
cfgVal: see source code
.br
.EE
.IP "\fBint gpioCustom1(unsigned arg1, unsigned arg2, char *argx, unsigned argc)\fP"
.IP "" 4
This function is available for user customisation.
@ -4329,7 +4387,7 @@ It returns a single integer value.
.br
argx: extra (byte) arguments
.br
count: number of extra arguments
argc: number of extra arguments
.br
.EE
@ -4339,7 +4397,7 @@ count: number of extra arguments
.br
Returns >= 0 if OK, less than 0 indicates a user defined error.
.IP "\fBint gpioCustom2(unsigned arg1, char *argx, unsigned count, char *retBuf, unsigned retMax)\fP"
.IP "\fBint gpioCustom2(unsigned arg1, char *argx, unsigned argc, char *retBuf, unsigned retMax)\fP"
.IP "" 4
This function is available for user customisation.
@ -4359,7 +4417,7 @@ The returned value is an integer indicating the number of returned bytes.
.br
argx: extra (byte) arguments
.br
count: number of extra arguments
argc: number of extra arguments
.br
retBuf: buffer for returned bytes
.br
@ -4378,27 +4436,6 @@ Returns >= 0 if OK, less than 0 indicates a user defined error.
.br
The number of returned bytes must be retMax or less.
.IP "\fBint gpioCfgInternals(unsigned cfgWhat, int cfgVal)\fP"
.IP "" 4
Used to tune internal settings.
.br
.br
.EX
cfgWhat: see source code
.br
cfgVal: see source code
.br
.EE
.br
.br
Not intended for general use.
.IP "\fBint rawWaveAddSPI(rawSPI_t *spi, unsigned offset, unsigned spiSS, char *buf, unsigned spiTxBits, unsigned spiBitFirst, unsigned spiBitLast, unsigned spiBits)\fP"
.IP "" 4
This function adds a waveform representing SPI data to the
@ -4724,6 +4761,53 @@ A pointer to a void object passed to a thread started by gpioStartThread.
.br
.IP "\fBarg1\fP" 0
.br
.br
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
.br
.br
.IP "\fBarg2\fP" 0
.br
.br
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
.br
.br
.IP "\fBargc\fP" 0
.br
.br
The count of bytes passed to a user customised function.
.br
.br
.IP "\fB*argx\fP" 0
.br
.br
A pointer to an array of bytes passed to a user customised function.
Its meaning and content is defined by the customiser.
.br
.br
.IP "\fBbbBaud\fP" 0
.br
@ -5086,6 +5170,61 @@ A Broadcom numbered gpio, in the range 0-53.
.br
.br
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
gpio53.
.br
.br
They are split into two banks. Bank 1 consists of gpio0 through
gpio31. Bank 2 consists of gpio32 through gpio53.
.br
.br
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
.br
.br
See \fBgpioHardwareRevision\fP.
.br
.br
The user gpios are marked with an X in the following table.
.br
.br
.EX
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
.br
Type 1 X X - - X - - X X X X X - - X X
.br
Type 2 - - X X X - - X X X X X - - X X
.br
Type 3 X X X X X X X X X X X X X X
.br
.br
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
.br
Type 1 - X X - - X X X X X - - - - - -
.br
Type 2 - X X - - - X X X X - X X X X X
.br
Type 3 X X X X X X X X X X X X - - - -
.br
.EE
.br
.br
.IP "\fBgpioAlertFunc_t\fP" 0
@ -5139,6 +5278,8 @@ One of
\fBgpioCfgInternals\fP
.br
\fBgpioCfgSocketPort\fP
.br
\fBgpioCfgMemAlloc\fP
.br
@ -5451,6 +5592,31 @@ A 32-bit word value.
.br
.IP "\fBmemAllocMode\fP: 0-2" 0
.br
.br
The DMA memory allocation mode.
.br
.br
.EX
PI_MEM_ALLOC_AUTO 0
.br
PI_MEM_ALLOC_PAGEMAP 1
.br
PI_MEM_ALLOC_MAILBOX 2
.br
.EE
.br
.br
.IP "\fB*micros\fP" 0
.br
@ -5704,7 +5870,7 @@ PI_MAX_SERVO_PULSEWIDTH 2500
.br
.IP "\fBPWMduty\fP: 0-1000" 0
.IP "\fBPWMduty\fP: 0-1000000 (1M)" 0
The hardware PWM dutycycle.
.br
@ -5712,7 +5878,7 @@ The hardware PWM dutycycle.
.br
.EX
#define PI_HW_PWM_RANGE 5000
#define PI_HW_PWM_RANGE 1000000
.br
.EE
@ -5729,9 +5895,9 @@ The hardware PWM frequency.
.br
.EX
#define PI_HW_PWM_MIN_FREQ 5
#define PI_HW_PWM_MIN_FREQ 1
.br
#define PI_HW_PWM_MAX_FREQ 50000
#define PI_HW_PWM_MAX_FREQ 125000000
.br
.EE
@ -5864,6 +6030,28 @@ typedef struct
.br
.IP "\fB*retBuf\fP" 0
.br
.br
A buffer to hold a number of bytes returned to a used customised function,
.br
.br
.IP "\fBretMax\fP" 0
.br
.br
The maximum number of bytes a user customised function should return.
.br
.br
.IP "\fB*rxBuf\fP" 0
.br
@ -6221,6 +6409,11 @@ If gpio#n may be written then bit (1<<n) is set.
.br
.br
See \fBgpio\fP.
.br
.br
.IP "\fB*userdata\fP" 0
@ -6682,7 +6875,7 @@ A 16-bit word value.
.br
#define PI_BAD_POINTER -90 // bad (NULL) pointer
.br
#define PI_NO_AUX_SPI -91 // need a B+ for auxiliary SPI
#define PI_NO_AUX_SPI -91 // need a A+/B+/Pi2 for auxiliary SPI
.br
#define PI_NOT_PWM_GPIO -92 // gpio is not in use for PWM
.br
@ -6692,11 +6885,11 @@ A 16-bit word value.
.br
#define PI_NOT_HPWM_GPIO -95 // gpio has no hardware PWM
.br
#define PI_BAD_HPWM_FREQ -96 // hardware PWM frequency not 5-50K
#define PI_BAD_HPWM_FREQ -96 // hardware PWM frequency not 1-125M
.br
#define PI_BAD_HPWM_DUTY -97 // hardware PWM dutycycle not 0-5000
#define PI_BAD_HPWM_DUTY -97 // hardware PWM dutycycle not 0-1M
.br
#define PI_BAD_HCLK_FREQ -98 // hardware clock frequency not 4689-25M
#define PI_BAD_HCLK_FREQ -98 // hardware clock frequency not 4689-250M
.br
#define PI_BAD_HCLK_PASS -99 // need password to use hardware clock 1
.br
@ -6708,6 +6901,8 @@ A 16-bit word value.
.br
#define PI_MSG_TOOBIG -103 // socket/pipe message too big
.br
#define PI_BAD_MALLOC_MODE -104 // bad memory allocation mode
.br
.br
#define PI_PIGIF_ERR_0 -2000
@ -6758,6 +6953,10 @@ A 16-bit word value.
#define PI_DEFAULT_UPDATE_MASK_R3 0x0080400FFFFFFCLL
.br
#define PI_DEFAULT_UPDATE_MASK_COMPUTE 0x00FFFFFFFFFFFFLL
.br
#define PI_DEFAULT_MEM_ALLOC_MODE PI_MEM_ALLOC_AUTO
.br
.br
.EE

1102
pigpio.c
View File

File diff suppressed because it is too large Load Diff

240
pigpio.h
View File

@ -31,7 +31,7 @@ For more information, please refer to <http://unlicense.org/>
#include <stdint.h>
#include <pthread.h>
#define PIGPIO_VERSION 29
#define PIGPIO_VERSION 30
/*TEXT
@ -93,7 +93,7 @@ For examples of usage see the C programs within the pigpio archive file.
All the functions which return an int return < 0 on error.
If the library isn't initialised all but the [*gpioCfg**], [*gpioVersion*],
If the library is not initialised all but the [*gpioCfg**], [*gpioVersion*],
and [*gpioHardwareRevision*] functions will return PI_NOT_INITIALISED.
If the library is initialised the [*gpioCfg**] functions will
@ -211,9 +211,9 @@ gpioWaveGetPulses Length in pulses of the current waveform
gpioWaveGetHighPulses Length of longest waveform so far
gpioWaveGetMaxPulses Absolute maximum allowed pulses
gpioWaveGetCbs Length in cbs of the current waveform
gpioWaveGetCbs Length in control blocks of the current waveform
gpioWaveGetHighCbs Length of longest waveform so far
gpioWaveGetMaxCbs Absolute maximum allowed cbs
gpioWaveGetMaxCbs Absolute maximum allowed control blocks
gpioWaveTxStart Creates/transmits a waveform (DEPRECATED)
@ -271,6 +271,12 @@ gpioCfgPermissions Configure the gpio access permissions
gpioCfgInterfaces Configure user interfaces
gpioCfgInternals Configure miscellaneous internals
gpioCfgSocketPort Configure socket port
gpioCfgMemAlloc Configure DMA memory allocation mode
CUSTOM
gpioCustom1 User custom function 1
gpioCustom2 User custom function 2
UTILITIES
@ -441,7 +447,7 @@ typedef void *(gpioThreadFunc_t) (void *);
#define PI_LOW 0
#define PI_HIGH 1
/* level: only reported for gpio timeout, see gpioSetWatchdog */
/* level: only reported for gpio time-out, see gpioSetWatchdog */
#define PI_TIMEOUT 2
@ -479,9 +485,9 @@ typedef void *(gpioThreadFunc_t) (void *);
/* hardware PWM */
#define PI_HW_PWM_MIN_FREQ 5
#define PI_HW_PWM_MAX_FREQ 50000
#define PI_HW_PWM_RANGE 5000
#define PI_HW_PWM_MIN_FREQ 1
#define PI_HW_PWM_MAX_FREQ 125000000
#define PI_HW_PWM_RANGE 1000000
/* hardware clock */
@ -620,6 +626,11 @@ typedef void *(gpioThreadFunc_t) (void *);
#define PI_DISABLE_FIFO_IF 1
#define PI_DISABLE_SOCK_IF 2
/* memAllocMode */
#define PI_MEM_ALLOC_AUTO 0
#define PI_MEM_ALLOC_PAGEMAP 1
#define PI_MEM_ALLOC_MAILBOX 2
/*F*/
int gpioInitialise(void);
@ -654,7 +665,7 @@ Returns nothing.
Call before program exit.
This function resets the DMA and PWM peripherals, releases memory, and
This function resets the used DMA channels, releases memory, and
terminates any running threads.
...
@ -814,10 +825,13 @@ Returns between 0 (off) and range (fully on) if OK, otherwise
PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
For normal PWM the dutycycle will be out of the defined range
for the gpio (see [*gpioGetPWMrange*]). If a hardware clock is
active on the gpio the reported dutycycle will be 500 (out of 1000).
for the gpio (see [*gpioGetPWMrange*]).
If a hardware clock is active on the gpio the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
If hardware PWM is active on the gpio the reported dutycycle
will be out of a 1000.
will be out of a 1000000 (1M).
Normal PWM range defaults to 255.
D*/
@ -869,7 +883,7 @@ user_gpio: 0-31
. .
If a hardware clock or hardware PWM is active on the gpio
the reported range will be 1000.
the reported range will be 1000000 (1M).
...
r = gpioGetPWMrange(23);
@ -887,8 +901,11 @@ PI_BAD_USER_GPIO.
user_gpio: 0-31
. .
If a hardware clock or hardware PWM is active on the gpio
the reported real range will be 1000.
If a hardware clock is active on the gpio the reported real
range will be 1000000 (1M).
If hardware PWM is active on the gpio the reported real range
will be approximately 250M divided by the set PWM frequency.
...
rr = gpioGetPWMrealRange(17);
@ -964,8 +981,11 @@ user_gpio: 0-31
. .
For normal PWM the frequency will be that defined for the gpio by
[*gpioSetPWMfrequency*]. If a hardware clock is active on the gpio
the reported frequency will be that set by [*gpioHardwareClock*].
[*gpioSetPWMfrequency*].
If a hardware clock is active on the gpio the reported frequency
will be that set by [*gpioHardwareClock*].
If hardware PWM is active on the gpio the reported frequency
will be that set by [*gpioHardwarePWM*].
@ -2001,12 +2021,12 @@ Data will be transferred at baud bits per second. The flags may
be used to modify the default behaviour of 4-wire operation, mode 0,
active low chip select.
An auxiliary SPI device is available on the B+ and may be
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
. .
spiChan: 0-1 (0-2 for B+ auxiliary device)
spiChan: 0-1 (0-2 for A+/B+/Pi2 auxiliary device)
spiBaud: 32K-125M (values above 30M are unlikely to work)
spiFlags: see below
. .
@ -2023,6 +2043,8 @@ spiFlags consists of the least significant 22 bits.
mm defines the SPI mode.
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
. .
Mode POL PHA
0 0 0
@ -2036,7 +2058,7 @@ px is 0 if CEx is active low (default) and 1 for active high.
ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the B+.
auxiliary device is only present on the A+/B+/Pi2.
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
SPI device only.
@ -2678,10 +2700,11 @@ D*/
int gpioHardwareClock(unsigned gpio, unsigned clkfreq);
/*D
Starts a hardware clock on a gpio at the specified frequency.
Frequencies above 30MHz are unlikely to work.
. .
gpio: see description
clkfreq: 0 (off) or 4689-250M
clkfreq: 0 (off) or 4689-250000000 (250M)
. .
Returns 0 if OK, otherwise PI_BAD_GPIO, PI_NOT_HCLK_GPIO,
@ -2694,9 +2717,9 @@ The gpio must be one of the following.
. .
4 clock 0 All models
5 clock 1 A+/B+ and compute module only (reserved for system use)
6 clock 2 A+/B+ and compute module only
20 clock 0 A+/B+ and compute module only
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
6 clock 2 A+/B+/Pi2 and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
21 clock 1 All models but Rev.2 B (reserved for system use)
32 clock 0 Compute module only
@ -2715,6 +2738,7 @@ D*/
int gpioHardwarePWM(unsigned gpio, unsigned PWMfreq, unsigned PWMduty);
/*D
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
NOTE: Any waveform started by [*gpioWaveTxSend*] or [*gpioWaveTxStart*]
will be cancelled.
@ -2725,25 +2749,24 @@ main clock defaults to PCM but may be overridden by a call to
. .
gpio: see description
PWMfreq: 0 (off) or 5-250K
PWMduty: 0 (off) to 1000 (fully on).
PWMfreq: 0 (off) or 1-125000000 (125M)
PWMduty: 0 (off) to 1000000 (1M)(fully on)
. .
Returns 0 if OK, otherwise PI_BAD_GPIO, PI_NOT_HPWM_GPIO,
PI_BAD_HPWM_DUTY, PI_BAD_HPWM_FREQ, or PI_HPWM_ILLEGAL.
Both PWM channels share the same clock and the same update frequency.
The latest frequency setting will be used by both PWM channels. The
same PWM channel is available on multiple gpios. The latest
dutycycle setting will be used by all gpios which share a PWM channel.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
share a PWM channel.
The gpio must be one of the following.
. .
12 PWM channel 0 A+/B+ and compute module only
13 PWM channel 1 A+/B+ and compute module only
12 PWM channel 0 A+/B+/Pi2 and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
18 PWM channel 0 All models
19 PWM channel 1 A+/B+ and compute module only
19 PWM channel 1 A+/B+/Pi2 and compute module only
40 PWM channel 0 Compute module only
41 PWM channel 1 Compute module only
@ -2871,27 +2894,19 @@ Returns the hardware revision.
If the hardware revision can not be found or is not a valid hexadecimal
number the function returns 0.
The hardware revision is the last 4 characters on the Revision line of
The hardware revision is the last few characters on the Revision line of
/proc/cpuinfo.
The revision number can be used to determine the assignment of gpios
to pins.
to pins (see [*gpio*]).
There are at least three types of board.
Type 1 has gpio 0 on P1-3, gpio 1 on P1-5, and gpio 21 on P1-13.
Type 2 has gpio 2 on P1-3, gpio 3 on P1-5, gpio 27 on P1-13, and
gpios 28-31 on P5.
Type 3 has a 40 pin connector rather than the 26 pin connector of
the earlier boards. Gpios 0 to 27 are brought out to the connector.
Type 1 boards have hardware revision numbers of 2 and 3.
Type 2 boards have hardware revision numbers of 4, 5, 6, and 15.
Type 3 boards have hardware revision number 16.
Type 3 boards have hardware revision numbers of 16 or greater.
for "Revision : 0002" the function returns 2.
for "Revision : 000f" the function returns 15.
@ -2943,7 +2958,7 @@ D*/
int gpioCfgClock(
unsigned cfgMicros, unsigned cfgPeripheral, unsigned cfgSource);
/*D
Configures pigpio to use a particualar sample rate timed by a specified
Configures pigpio to use a particular sample rate timed by a specified
peripheral.
. .
@ -3054,7 +3069,35 @@ D*/
/*F*/
int gpioCustom1(unsigned arg1, unsigned arg2, char *argx, unsigned count);
int gpioCfgMemAlloc(unsigned memAllocMode);
/*D
Selects the method of DMA memory allocation.
. .
memAllocMode: 0-2
. .
There are two methods of DMA memory allocation. The original method
uses the /proc/self/pagemap file to allocate bus memory. The new
method uses the mailbox property interface to allocate bus memory.
Auto will use the mailbox method unless a larger than default buffer
size is requested with [*gpioCfgBufferSize*].
D*/
/*F*/
int gpioCfgInternals(unsigned cfgWhat, int cfgVal);
/*D
Used to tune internal settings.
. .
cfgWhat: see source code
cfgVal: see source code
. .
D*/
/*F*/
int gpioCustom1(unsigned arg1, unsigned arg2, char *argx, unsigned argc);
/*D
This function is available for user customisation.
@ -3064,7 +3107,7 @@ It returns a single integer value.
arg1: >=0
arg2: >=0
argx: extra (byte) arguments
count: number of extra arguments
argc: number of extra arguments
. .
Returns >= 0 if OK, less than 0 indicates a user defined error.
@ -3072,7 +3115,7 @@ D*/
/*F*/
int gpioCustom2(unsigned arg1, char *argx, unsigned count,
int gpioCustom2(unsigned arg1, char *argx, unsigned argc,
char *retBuf, unsigned retMax);
/*D
This function is available for user customisation.
@ -3084,7 +3127,7 @@ The returned value is an integer indicating the number of returned bytes.
. .
arg1: >=0
argx: extra (byte) arguments
count: number of extra arguments
argc: number of extra arguments
retBuf: buffer for returned bytes
retMax: maximum number of bytes to return
. .
@ -3095,20 +3138,6 @@ The number of returned bytes must be retMax or less.
D*/
/*F*/
int gpioCfgInternals(unsigned cfgWhat, int cfgVal);
/*D
Used to tune internal settings.
. .
cfgWhat: see source code
cfgVal: see source code
. .
Not intended for general use.
D*/
/*F*/
int rawWaveAddSPI(
rawSPI_t *spi,
@ -3329,6 +3358,25 @@ D*/
A pointer to a void object passed to a thread started by gpioStartThread.
arg1::
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
arg2::
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
argc::
The count of bytes passed to a user customised function.
*argx::
A pointer to an array of bytes passed to a user customised function.
Its meaning and content is defined by the customiser.
bbBaud::
The baud rate used for the transmission and reception of bit banged
@ -3475,6 +3523,32 @@ gpio::
A Broadcom numbered gpio, in the range 0-53.
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
gpio53.
They are split into two banks. Bank 1 consists of gpio0 through
gpio31. Bank 2 consists of gpio32 through gpio53.
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
See [*gpioHardwareRevision*].
The user gpios are marked with an X in the following table.
. .
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Type 1 X X - - X - - X X X X X - - X X
Type 2 - - X X X - - X X X X X - - X X
Type 3 X X X X X X X X X X X X X X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Type 1 - X X - - X X X X X - - - - - -
Type 2 - X X - - - X X X X - X X X X X
Type 3 X X X X X X X X X X X X - - - -
. .
gpioAlertFunc_t::
. .
typedef void (*gpioAlertFunc_t) (int gpio, int level, uint32_t tick);
@ -3498,6 +3572,7 @@ One of
[*gpioCfgInterfaces*]
[*gpioCfgInternals*]
[*gpioCfgSocketPort*]
[*gpioCfgMemAlloc*]
gpioGetSamplesFunc_t::
. .
@ -3625,6 +3700,16 @@ lVal::0-4294967295 (Hex 0x0-0xFFFFFFFF, Octal 0-37777777777)
A 32-bit word value.
memAllocMode:: 0-2
The DMA memory allocation mode.
. .
PI_MEM_ALLOC_AUTO 0
PI_MEM_ALLOC_PAGEMAP 1
PI_MEM_ALLOC_MAILBOX 2
. .
*micros::
A value representing microseconds.
@ -3725,19 +3810,19 @@ PI_MIN_SERVO_PULSEWIDTH 500
PI_MAX_SERVO_PULSEWIDTH 2500
. .
PWMduty::0-1000
PWMduty::0-1000000 (1M)
The hardware PWM dutycycle.
. .
#define PI_HW_PWM_RANGE 5000
#define PI_HW_PWM_RANGE 1000000
. .
PWMfreq::5-250K
The hardware PWM frequency.
. .
#define PI_HW_PWM_MIN_FREQ 5
#define PI_HW_PWM_MAX_FREQ 50000
#define PI_HW_PWM_MIN_FREQ 1
#define PI_HW_PWM_MAX_FREQ 125000000
. .
range::25-40000
@ -3797,6 +3882,14 @@ typedef struct
} rawWaveInfo_t;
. .
*retBuf::
A buffer to hold a number of bytes returned to a used customised function,
retMax::
The maximum number of bytes a user customised function should return.
*rxBuf::
A pointer to a buffer to receive data.
@ -3933,6 +4026,8 @@ user_gpio::
0-31, a Broadcom numbered gpio.
See [*gpio*].
*userdata::
A pointer to arbitrary user data. This may be used to identify the instance.
@ -4214,19 +4309,20 @@ after this command is issued.
#define PI_UNKNOWN_COMMAND -88 // unknown command
#define PI_SPI_XFER_FAILED -89 // spi xfer/read/write failed
#define PI_BAD_POINTER -90 // bad (NULL) pointer
#define PI_NO_AUX_SPI -91 // need a B+ for auxiliary SPI
#define PI_NO_AUX_SPI -91 // need a A+/B+/Pi2 for auxiliary SPI
#define PI_NOT_PWM_GPIO -92 // gpio is not in use for PWM
#define PI_NOT_SERVO_GPIO -93 // gpio is not in use for servo pulses
#define PI_NOT_HCLK_GPIO -94 // gpio has no hardware clock
#define PI_NOT_HPWM_GPIO -95 // gpio has no hardware PWM
#define PI_BAD_HPWM_FREQ -96 // hardware PWM frequency not 5-50K
#define PI_BAD_HPWM_DUTY -97 // hardware PWM dutycycle not 0-5000
#define PI_BAD_HCLK_FREQ -98 // hardware clock frequency not 4689-25M
#define PI_BAD_HPWM_FREQ -96 // hardware PWM frequency not 1-125M
#define PI_BAD_HPWM_DUTY -97 // hardware PWM dutycycle not 0-1M
#define PI_BAD_HCLK_FREQ -98 // hardware clock frequency not 4689-250M
#define PI_BAD_HCLK_PASS -99 // need password to use hardware clock 1
#define PI_HPWM_ILLEGAL -100 // illegal, PWM in use for main clock
#define PI_BAD_DATABITS -101 // serial data bits not 1-32
#define PI_BAD_STOPBITS -102 // serial (half) stop bits not 2-8
#define PI_MSG_TOOBIG -103 // socket/pipe message too big
#define PI_BAD_MALLOC_MODE -104 // bad memory allocation mode
#define PI_PIGIF_ERR_0 -2000
#define PI_PIGIF_ERR_99 -2099
@ -4253,6 +4349,8 @@ after this command is issued.
#define PI_DEFAULT_UPDATE_MASK_R2 0xFBC7CF9C
#define PI_DEFAULT_UPDATE_MASK_R3 0x0080400FFFFFFCLL
#define PI_DEFAULT_UPDATE_MASK_COMPUTE 0x00FFFFFFFFFFFFLL
#define PI_DEFAULT_MEM_ALLOC_MODE PI_MEM_ALLOC_AUTO
/*DEF_E*/
#endif

150
pigpio.py
View File

@ -257,7 +257,7 @@ import threading
import os
import atexit
VERSION = "1.15"
VERSION = "1.16"
exceptions = True
@ -517,6 +517,8 @@ PI_BAD_HCLK_PASS =-99
PI_HPWM_ILLEGAL =-100
PI_BAD_DATABITS =-101
PI_BAD_STOPBITS =-102
PI_MSG_TOOBIG =-103
PI_BAD_MALLOC_MODE =-104
# pigpio error text
@ -609,18 +611,20 @@ _errors=[
[PI_UNKNOWN_COMMAND , "unknown command"],
[PI_SPI_XFER_FAILED , "SPI xfer/read/write failed"],
[_PI_BAD_POINTER , "bad (NULL) pointer"],
[PI_NO_AUX_SPI , "need a B+ for auxiliary SPI"],
[PI_NO_AUX_SPI , "need a A+/B+/Pi2 for auxiliary SPI"],
[PI_NOT_PWM_GPIO , "gpio is not in use for PWM"],
[PI_NOT_SERVO_GPIO , "gpio is not in use for servo pulses"],
[PI_NOT_HCLK_GPIO , "gpio has no hardware clock"],
[PI_NOT_HPWM_GPIO , "gpio has no hardware PWM"],
[PI_BAD_HPWM_FREQ , "hardware PWM frequency not 5-50K"],
[PI_BAD_HPWM_DUTY , "hardware PWM dutycycle not 0-5000"],
[PI_BAD_HCLK_FREQ , "hardware clock frequency not 4689-25M"],
[PI_BAD_HPWM_FREQ , "hardware PWM frequency not 1-125M"],
[PI_BAD_HPWM_DUTY , "hardware PWM dutycycle not 0-1M"],
[PI_BAD_HCLK_FREQ , "hardware clock frequency not 4689-250M"],
[PI_BAD_HCLK_PASS , "need password to use hardware clock 1"],
[PI_HPWM_ILLEGAL , "illegal, PWM in use for main clock"],
[PI_BAD_DATABITS , "serial data bits not 1-32"],
[PI_BAD_STOPBITS , "serial (half) stop bits not 2-8"],
[PI_MSG_TOOBIG , "socket/pipe message too big"],
[PI_BAD_MALLOC_MODE , "bad memory allocation mode"],
]
@ -1059,10 +1063,13 @@ class pi():
For normal PWM the dutycycle will be out of the defined range
for the gpio (see [*get_PWM_range*]). If a hardware clock is
active on the gpio the reported dutycycle will be 500
(out of 1000). If hardware PWM is active on the gpio the
reported dutycycle will be out of a 1000.
for the gpio (see [*get_PWM_range*]).
If a hardware clock is active on the gpio the reported
dutycycle will be 500000 (500k) out of 1000000 (1M).
If hardware PWM is active on the gpio the reported dutycycle
will be out of a 1000000 (1M).
...
pi.set_PWM_dutycycle(4, 25)
@ -1098,7 +1105,7 @@ class pi():
user_gpio:= 0-31.
If a hardware clock or hardware PWM is active on the gpio
the reported range will be 1000.
the reported range will be 1000000 (1M).
...
pi.set_PWM_range(9, 500)
@ -1115,8 +1122,11 @@ class pi():
user_gpio:= 0-31.
If a hardware clock or hardware PWM is active on the gpio
the reported real range will be 1000.
If a hardware clock is active on the gpio the reported
real range will be 1000000 (1M).
If hardware PWM is active on the gpio the reported real range
will be approximately 250M divided by the set PWM frequency.
...
pi.set_PWM_frequency(4, 800)
@ -1157,8 +1167,11 @@ class pi():
Returns the frequency (in Hz) used for the gpio.
For normal PWM the frequency will be that defined for the gpio
by [*set_PWM_frequency*]. If a hardware clock is active on the
gpio the reported frequency will be that set by [*hardware_clock*].
by [*set_PWM_frequency*].
If a hardware clock is active on the gpio the reported frequency
will be that set by [*hardware_clock*].
If hardware PWM is active on the gpio the reported frequency
will be that set by [*hardware_PWM*].
@ -1441,9 +1454,10 @@ class pi():
def hardware_clock(self, gpio, clkfreq):
"""
Starts a hardware clock on a gpio at the specified frequency.
Frequencies above 30MHz are unlikely to work.
gpio:= see description
clkfreq:= 0 (off) or 4689-250M
clkfreq:= 0 (off) or 4689-250000000 (250M)
Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
@ -1456,9 +1470,10 @@ class pi():
. .
4 clock 0 All models
5 clock 1 A+/B+ and compute module only (reserved for system use)
6 clock 2 A+/B+ and compute module only
20 clock 0 A+/B+ and compute module only
5 clock 1 A+/B+/Pi2 and compute module only
(reserved for system use)
6 clock 2 A+/B+/Pi2 and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
21 clock 1 All models but Rev.2 B (reserved for system use)
32 clock 0 Compute module only
@ -1482,8 +1497,8 @@ class pi():
def hardware_PWM(self, gpio, PWMfreq, PWMduty):
"""
Starts hardware PWM on a gpio at the specified
frequency and dutycycle.
Starts hardware PWM on a gpio at the specified frequency
and dutycycle. Frequencies above 30MHz are unlikely to work.
NOTE: Any waveform started by [*wave_send_once*],
[*wave_send_repeat*], [*wave_tx_start*], or
@ -1494,25 +1509,23 @@ class pi():
pigpio daemon is started (option -t).
gpio:= see descripton
PWMfreq:= 0 (off) or 5-50K
PWMduty:= 0 (off) to 5000 (fully on).
PWMfreq:= 0 (off) or 1-125000000 (125M).
PWMduty:= 0 (off) to 1000000 (1M)(fully on).
Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
PI_NOT_HPWM_GPIO, PI_BAD_HPWM_DUTY, PI_BAD_HPWM_FREQ.
Both PWM channels share the same clock and the same update
frequency. The latest frequency setting will be used by
both PWM channels. The same PWM channel is available on
multiple gpios. The latest dutycycle setting will be used
The same PWM channel is available on multiple gpios.
The latest frequency and dutycycle setting will be used
by all gpios which share a PWM channel.
The gpio must be one of the following.
. .
12 PWM channel 0 A+/B+ and compute module only
13 PWM channel 1 A+/B+ and compute module only
12 PWM channel 0 A+/B+/Pi2 and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
18 PWM channel 0 All models
19 PWM channel 1 A+/B+ and compute module only
19 PWM channel 1 A+/B+/Pi2 and compute module only
40 PWM channel 0 Compute module only
41 PWM channel 1 Compute module only
@ -1522,9 +1535,9 @@ class pi():
. .
...
pi.hardware_PWM(18, 800, 1250) # 800Hz 25% dutycycle
pi.hardware_PWM(18, 800, 250000) # 800Hz 25% dutycycle
pi.hardware_PWM(18, 2000, 3750) # 2000Hz 75% dutycycle
pi.hardware_PWM(18, 2000, 750000) # 2000Hz 75% dutycycle
...
"""
# pigpio message format
@ -1559,23 +1572,19 @@ class pi():
"""
Returns the Pi's hardware revision number.
The hardware revision is the last 4 characters on the Revision
line of /proc/cpuinfo.
The hardware revision is the last few characters on the
Revision line of /proc/cpuinfo.
The revision number can be used to determine the assignment
of gpios to pins.
of gpios to pins (see [*gpio*]).
There are at least three types of board.
Type 1 has gpio 0 on P1-3, gpio 1 on P1-5, and gpio 21 on P1-13
(revision numbers 2 and 3).
Type 1 boards have hardware revision numbers of 2 and 3.
Type 2 has gpio 2 on P1-3, gpio 3 on P1-5, gpio 27 on P1-13,
and gpios 28-31 on P5 (revision numbers of 4, 5, 6, and 15).
Type 2 boards have hardware revision numbers of 4, 5, 6, and 15.
Type 3 has a 40 pin connector rather than the 26 pin connector
of the earlier boards. Gpios 0 to 27 are brought out to the
connector (revision number 16).
Type 3 boards have hardware revision numbers of 16 or greater.
If the hardware revision can not be found or is not a valid
hexadecimal number the function returns 0.
@ -2424,12 +2433,12 @@ class pi():
modify the default behaviour of 4-wire operation, mode 0,
active low chip select.
An auxiliary SPI device is available on the B+ and may be
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
spi_channel:= 0-1 (0-2 for B+ auxiliary device).
spi_channel:= 0-1 (0-2 for A+/B+/Pi2 auxiliary device).
spi_baud:= 32K-125M (values above 30M are unlikely to work).
spi_flags:= see below.
@ -2447,6 +2456,9 @@ class pi():
mm defines the SPI mode.
WARNING: modes 1 and 3 do not appear to work on
the auxiliary device.
. .
Mode POL PHA
0 0 0
@ -2461,7 +2473,7 @@ class pi():
and 1 otherwise.
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
The auxiliary device is only present on the B+.
The auxiliary device is only present on the A+/B+/Pi2.
W is 0 if the device is not 3-wire, 1 if the device is 3-wire.
Standard SPI device only.
@ -3183,6 +3195,18 @@ class pi():
def xref():
"""
arg1:
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
arg2:
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
argx:
An array of bytes passed to a user customised function.
Its meaning and content is defined by the customiser.
bb_baud: 100 - 250000
The baud rate used for the transmission of bit bang serial data.
@ -3242,6 +3266,7 @@ def xref():
RISING_EDGE = 0
errnum: <0
. .
PI_BAD_DATABITS = -101
PI_BAD_DUTYCYCLE = -8
PI_BAD_DUTYRANGE = -21
@ -3323,6 +3348,7 @@ def xref():
PI_TOO_MANY_PULSES = -36
PI_TOO_MANY_TAGS = -54
PI_UNKNOWN_COMMAND = -88
. .
frequency: 0-40000
Defines the frequency to be used for PWM on a gpio.
@ -3334,6 +3360,32 @@ def xref():
gpio: 0-53
A Broadcom numbered gpio. All the user gpios are in the range 0-31.
There are 54 General Purpose Input Outputs (gpios) named gpio0
through gpio53.
They are split into two banks. Bank 1 consists of gpio0
through gpio31. Bank 2 consists of gpio32 through gpio53.
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
See [*get_hardware_revision*].
The user gpios are marked with an X in the following table.
. .
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Type 1 X X - - X - - X X X X X - - X X
Type 2 - - X X X - - X X X X X - - X X
Type 3 X X X X X X X X X X X X X X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Type 1 - X X - - X X X X X - - - - - -
Type 2 - X X - - - X X X X - X X X X X
Type 3 X X X X X X X X X X X X - - - -
. .
gpio_off:
A mask used to select gpios to be operated on. See [*bits*].
@ -3410,10 +3462,10 @@ def xref():
pulsewidth:
The servo pulsewidth in microseconds. 0 switches pulses off.
PWMduty: 0-1000
PWMduty: 0-1000000 (1M)
The hardware PWM dutycycle.
PWMfreq: 5-250K
PWMfreq: 1-125000000 (125M)
The hardware PWM frequency.
range_: 25-40000
@ -3425,6 +3477,10 @@ def xref():
An I2C device register. The usable registers depend on the
actual device.
retMax: >=0
The maximum number of bytes a user customised function
should return, default 8192.
script:
The text of a script to store on the pigpio daemon.
@ -3476,6 +3532,8 @@ def xref():
Not all the gpios within this range are usable, some are reserved
for system use.
See [*gpio*].
wait_timeout: 0.0 -
The number of seconds to wait in wait_for_edge before timing out.

19
pigpiod.1
View File

@ -29,6 +29,11 @@ pigpiod accepts the following configuration options
.br
.SH OPTIONS
.IP "\fB-a value\fP"
DMA memory allocation mode
0=AUTO, 1=PMAP, 2=MBOX
default AUTO
.IP "\fB-b value\fP"
gpio sample buffer in milliseconds
100-10000
@ -110,18 +115,18 @@ All gpios may be read.
.br
.br
Only the default gpios for the board revision or those specified by the -x option may be updated.
Only the user gpios for the board type or those specified by the -x option may be updated.
.br
.br
.EX
Revision 1 boards 0x03E6CF93
Type 1 boards 0x03E6CF93
.br
Revision 2 boards 0xFBC6CF9C
Type 2 boards 0xFBC6CF9C
.br
Revision 3 boards 0x0FFFFFFC
Type 3 boards 0x0FFFFFFC
.br
.EE
@ -158,13 +163,13 @@ There are two special cases.
.br
.br
The activity LED may be written (gpio 16 for Rev.1/2
boards, gpio 47 for Rev.3 boards).
The activity LED may be written (gpio 16 for type 1 and 2
boards, gpio 47 for type 3 boards).
.br
.br
The high USB power mode gpio may be written (gpio 38 for Rev.3 boards).
The high USB power mode gpio may be written (gpio 38 for type 3 boards).
.SH SEE ALSO

15
pigpiod.c
View File

@ -26,7 +26,7 @@ For more information, please refer to <http://unlicense.org/>
*/
/*
This version is for pigpio version 24+
This version is for pigpio version 30+
*/
#include <sys/types.h>
@ -56,6 +56,7 @@ static unsigned ifFlags = PI_DEFAULT_IF_FLAGS;
static unsigned DMAprimaryChannel = PI_DEFAULT_DMA_PRIMARY_CHANNEL;
static unsigned DMAsecondaryChannel = PI_DEFAULT_DMA_SECONDARY_CHANNEL;
static unsigned socketPort = PI_DEFAULT_SOCKET_PORT;
static unsigned memAllocMode = PI_DEFAULT_MEM_ALLOC_MODE;
static uint64_t updateMask = -1;
static int updateMaskSet = 0;
@ -82,6 +83,7 @@ void usage()
{
fprintf(stderr, "\n" \
"Usage: sudo pigpiod [OPTION] ...\n" \
" -a value, DMA mode, 0=AUTO, 1=PMAP, 2=MBOX, default AUTO\n" \
" -b value, gpio sample buffer in milliseconds, default 120\n" \
" -d value, primary DMA channel, 0-14, default 14\n" \
" -e value, secondary DMA channel, 0-6, default 5\n" \
@ -104,12 +106,19 @@ static void initOpts(int argc, char *argv[])
uint64_t mask;
char * endptr;
while ((opt = getopt(argc, argv, "b:d:e:fkp:s:t:x:")) != -1)
while ((opt = getopt(argc, argv, "a:b:d:e:fkp:s:t:x:")) != -1)
{
i = -1;
switch (opt)
{
case 'a':
i = atoi(optarg);
if ((i >= PI_MEM_ALLOC_AUTO) && (i <= PI_MEM_ALLOC_MAILBOX))
memAllocMode = i;
else fatal("invalid -a option (%d)", i);
break;
case 'b':
i = atoi(optarg);
if ((i >= PI_BUF_MILLIS_MIN) && (i <= PI_BUF_MILLIS_MAX))
@ -260,6 +269,8 @@ int main(int argc, char **argv)
gpioCfgSocketPort(socketPort);
gpioCfgMemAlloc(memAllocMode);
if (updateMaskSet) gpioCfgPermissions(updateMask);
/* start library */

246
pigpiod_if.3
View File

@ -461,10 +461,19 @@ Returns 0 if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
.br
For normal PWM the dutycycle will be out of the defined range
for the gpio (see \fBget_PWM_range\fP). If a hardware clock is
active on the gpio the reported dutycycle will be 500 (out of 1000).
for the gpio (see \fBget_PWM_range\fP).
.br
.br
If a hardware clock is active on the gpio the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported dutycycle
will be out of a 1000.
will be out of a 1000000 (1M).
.IP "\fBint set_PWM_range(unsigned user_gpio, unsigned range)\fP"
.IP "" 4
@ -548,7 +557,7 @@ otherwise PI_BAD_USER_GPIO.
.br
If a hardware clock or hardware PWM is active on the gpio the
reported range will be 1000.
reported range will be 1000000 (1M).
.IP "\fBint get_PWM_real_range(unsigned user_gpio)\fP"
.IP "" 4
@ -573,8 +582,18 @@ otherwise PI_BAD_USER_GPIO.
.br
.br
If a hardware clock or hardware PWM is active on the gpio the
reported real range will be 1000.
If a hardware clock is active on the gpio the reported
real range will be 1000000 (1M).
.br
.br
If hardware PWM is active on the gpio the reported real range
will be approximately 250M divided by the set PWM frequency.
.br
.br
.IP "\fBint set_PWM_frequency(unsigned user_gpio, unsigned frequency)\fP"
.IP "" 4
@ -677,10 +696,19 @@ user_gpio: 0-31.
.br
For normal PWM the frequency will be that defined for the gpio by
\fBset_PWM_frequency\fP. If a hardware clock is active on the gpio the
reported frequency will be that set by \fBhardware_clock\fP. If hardware
PWM is active on the gpio the reported frequency will be that set by
\fBhardware_PWM\fP.
\fBset_PWM_frequency\fP.
.br
.br
If a hardware clock is active on the gpio the reported frequency
will be that set by \fBhardware_clock\fP.
.br
.br
If hardware PWM is active on the gpio the reported frequency
will be that set by \fBhardware_PWM\fP.
.br
@ -1117,6 +1145,7 @@ allowed to write to one or more of the gpios.
.IP "\fBint hardware_clock(unsigned gpio, unsigned clkfreq)\fP"
.IP "" 4
Starts a hardware clock on a gpio at the specified frequency.
Frequencies above 30MHz are unlikely to work.
.br
@ -1125,7 +1154,7 @@ Starts a hardware clock on a gpio at the specified frequency.
.EX
gpio: see description
.br
frequency: 0 (off) or 4689-250M
frequency: 0 (off) or 4689-250000000 (250M)
.br
.EE
@ -1154,11 +1183,11 @@ The gpio must be one of the following.
.EX
4 clock 0 All models
.br
5 clock 1 A+/B+ and compute module only (reserved for system use)
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
.br
6 clock 2 A+/B+ and compute module only
6 clock 2 A+/B+/Pi2 and compute module only
.br
20 clock 0 A+/B+ and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
.br
21 clock 1 All models but Rev.2 B (reserved for system use)
.br
@ -1187,6 +1216,7 @@ gpio number.
.IP "\fBint hardware_PWM(unsigned gpio, unsigned PWMfreq, uint32_t PWMduty)\fP"
.IP "" 4
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
.br
@ -1207,9 +1237,9 @@ daemon is started (option -t).
.EX
gpio: see descripton
.br
PWMfreq: 0 (off) or 5-50K
PWMfreq: 0 (off) or 1-125000000 (125M)
.br
PWMduty: 0 (off) to 5000 (fully on).
PWMduty: 0 (off) to 1000000 (1M)(fully on)
.br
.EE
@ -1224,10 +1254,9 @@ or PI_HPWM_ILLEGAL.
.br
.br
Both PWM channels share the same clock and the same update frequency.
The latest frequency setting will be used by both PWM channels. The
same PWM channel is available on multiple gpios. The latest
dutycycle setting will be used by all gpios which share a PWM channel.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
share a PWM channel.
.br
@ -1239,13 +1268,13 @@ The gpio must be one of the following.
.br
.EX
12 PWM channel 0 A+/B+ and compute module only
12 PWM channel 0 A+/B+/Pi2 and compute module only
.br
13 PWM channel 1 A+/B+ and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
.br
18 PWM channel 0 All models
.br
19 PWM channel 1 A+/B+ and compute module only
19 PWM channel 1 A+/B+/Pi2 and compute module only
.br
.br
@ -1288,7 +1317,7 @@ Get the Pi's hardware revision number.
.br
.br
The hardware revision is the last 4 characters on the Revision line
The hardware revision is the last few characters on the Revision line
of /proc/cpuinfo.
.br
@ -1301,29 +1330,12 @@ hexadecimal number the function returns 0.
.br
The revision number can be used to determine the assignment of gpios
to pins.
to pins (see \fBgpio\fP).
.br
.br
There are currently three types of board.
.br
.br
Type 1 has gpio 0 on P1-3, gpio 1 on P1-5, and gpio 21 on P1-13.
.br
.br
Type 2 has gpio 2 on P1-3, gpio 3 on P1-5, gpio 27 on P1-13, and
gpios 28-31 on P5.
.br
.br
Type 3 has a 40 pin connector rather than the 26 pin connector of
the earlier boards. Gpios 0 to 27 are brought out to the connector.
There are at least three types of board.
.br
@ -1338,7 +1350,7 @@ Type 2 boards have hardware revision numbers of 4, 5, 6, and 15.
.br
.br
Type 3 boards have hardware revision number 16.
Type 3 boards have hardware revision numbers of 16 or greater.
.IP "\fBuint32_t get_pigpio_version(void)\fP"
.IP "" 4
@ -1993,7 +2005,9 @@ data bits \fBbbBits\fP specified in the \fBbb_serial_read_open\fP command.
.br
For \fBbbBits\fP 1-8 there will be one byte per character.
.br
For \fBbbBits\fP 9-16 there will be two bytes per character.
.br
For \fBbbBits\fP 17-32 there will be four bytes per character.
.IP "\fBint bb_serial_read_close(unsigned user_gpio)\fP"
@ -2512,7 +2526,7 @@ active low chip select.
.br
.br
An auxiliary SPI device is available on the B+ and may be
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
@ -2521,7 +2535,7 @@ device has 3 chip selects and a selectable word size in bits.
.br
.EX
spi_channel: 0-1 (0-2 for B+ auxiliary device).
spi_channel: 0-1 (0-2 for A+/B+/Pi2 auxiliary device).
.br
spi_baud: 32K-125M (values above 30M are unlikely to work).
.br
@ -2560,6 +2574,11 @@ mm defines the SPI mode.
.br
.br
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
.br
.br
.EX
@ -2590,7 +2609,7 @@ ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
.br
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the B+.
auxiliary device is only present on the A+/B+/Pi2.
.br
@ -2887,7 +2906,7 @@ handle: >=0, as returned by a call to \fBserial_open\fP.
Returns the number of bytes of data available (>=0) if OK,
otherwise PI_BAD_HANDLE.
.IP "\fBint custom_1(unsigned arg1, unsigned arg2, char *argx, unsigned count)\fP"
.IP "\fBint custom_1(unsigned arg1, unsigned arg2, char *argx, unsigned argc)\fP"
.IP "" 4
This function is available for user customisation.
@ -2907,7 +2926,7 @@ It returns a single integer value.
.br
argx: extra (byte) arguments
.br
count: number of extra arguments
argc: number of extra arguments
.br
.EE
@ -2917,7 +2936,7 @@ count: number of extra arguments
.br
Returns >= 0 if OK, less than 0 indicates a user defined error.
.IP "\fBint custom_2(unsigned arg1, char *argx, unsigned count, char *retBuf, unsigned retMax)\fP"
.IP "\fBint custom_2(unsigned arg1, char *argx, unsigned argc, char *retBuf, unsigned retMax)\fP"
.IP "" 4
This function is available for user customisation.
@ -2935,7 +2954,7 @@ The return value is an integer indicating the number of returned bytes.
.EX
arg1: >=0
.br
argx: extra (byte) arguments
argc: extra (byte) arguments
.br
count: number of extra arguments
.br
@ -3086,6 +3105,41 @@ variable.
.br
.IP "\fBarg1\fP" 0
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
.br
.br
.IP "\fBarg2\fP" 0
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
.br
.br
.IP "\fBargc\fP" 0
The count of bytes passed to a user customised function.
.br
.br
.IP "\fB*argx\fP" 0
A pointer to an array of bytes passed to a user customised function.
Its meaning and content is defined by the customiser.
.br
.br
.br
.br
.IP "\fBbbBaud\fP" 0
The baud rate used for the transmission and reception of bit banged
serial data.
@ -3247,7 +3301,7 @@ A single character, an 8 bit quantity able to store 0-255.
.br
.IP "\fBclkfreq\fP: 4689-250M" 0
.IP "\fBclkfreq\fP: 4689-250000000 (250M)" 0
The hardware clock frequency.
.br
@ -3338,6 +3392,61 @@ A Broadcom numbered gpio, in the range 0-53.
.br
.br
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
gpio53.
.br
.br
They are split into two banks. Bank 1 consists of gpio0 through
gpio31. Bank 2 consists of gpio32 through gpio53.
.br
.br
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
.br
.br
See \fBget_hardware_revision\fP.
.br
.br
The user gpios are marked with an X in the following table.
.br
.br
.EX
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
.br
Type 1 X X - - X - - X X X X X - - X X
.br
Type 2 - - X X X - - X X X X X - - X X
.br
Type 3 X X X X X X X X X X X X X X
.br
.br
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
.br
Type 1 - X X - - X X X X X - - - - - -
.br
Type 2 - X X - - - X X X X - X X X X X
.br
Type 3 X X X X X X X X X X X X - - - -
.br
.EE
.br
.br
.IP "\fBgpioPulse_t\fP" 0
@ -3621,7 +3730,7 @@ PI_MAX_SERVO_PULSEWIDTH 2500
.br
.IP "\fBPWMduty\fP: 0-1000" 0
.IP "\fBPWMduty\fP: 0-1000000 (1M)" 0
The hardware PWM dutycycle.
.br
@ -3629,7 +3738,7 @@ The hardware PWM dutycycle.
.br
.EX
#define PI_HW_PWM_RANGE 1000
#define PI_HW_PWM_RANGE 1000000
.br
.EE
@ -3638,7 +3747,7 @@ The hardware PWM dutycycle.
.br
.IP "\fBPWMfreq\fP: 5-250K" 0
.IP "\fBPWMfreq\fP: 1-125000000 (125M)" 0
The hardware PWM frequency.
.br
@ -3646,9 +3755,9 @@ The hardware PWM frequency.
.br
.EX
#define PI_HW_PWM_MIN_FREQ 5
#define PI_HW_PWM_MIN_FREQ 1
.br
#define PI_HW_PWM_MAX_FREQ 250000
#define PI_HW_PWM_MAX_FREQ 125000000
.br
.EE
@ -3672,6 +3781,24 @@ PI_MAX_DUTYCYCLE_RANGE 40000
.br
.IP "\fB*retBuf\fP" 0
A buffer to hold a number of bytes returned to a used customised function,
.br
.br
.IP "\fBretMax\fP" 0
The maximum number of bytes a user customised function should return.
.br
.br
.br
.br
.IP "\fB*rxBuf\fP" 0
A pointer to a buffer to receive data.
@ -3815,6 +3942,11 @@ A whole number >= 0.
.br
.br
See \fBgpio\fP.
.br
.br
.IP "\fB*userdata\fP" 0

2
pigpiod_if.c
View File

@ -25,7 +25,7 @@ OTHER DEALINGS IN THE SOFTWARE.
For more information, please refer to <http://unlicense.org/>
*/
/* PIGPIOD_IF_VERSION 13 */
/* PIGPIOD_IF_VERSION 14 */
#include <stdio.h>
#include <stdlib.h>

154
pigpiod_if.h
View File

@ -30,7 +30,7 @@ For more information, please refer to <http://unlicense.org/>
#include "pigpio.h"
#define PIGPIOD_IF_VERSION 13
#define PIGPIOD_IF_VERSION 14
/*TEXT
@ -471,10 +471,13 @@ user_gpio: 0-31.
Returns 0 if OK, otherwise PI_BAD_USER_GPIO or PI_NOT_PWM_GPIO.
For normal PWM the dutycycle will be out of the defined range
for the gpio (see [*get_PWM_range*]). If a hardware clock is
active on the gpio the reported dutycycle will be 500 (out of 1000).
for the gpio (see [*get_PWM_range*]).
If a hardware clock is active on the gpio the reported dutycycle
will be 500000 (500k) out of 1000000 (1M).
If hardware PWM is active on the gpio the reported dutycycle
will be out of a 1000.
will be out of a 1000000 (1M).
D*/
/*F*/
@ -520,7 +523,7 @@ Returns the dutycycle range used for the gpio if OK,
otherwise PI_BAD_USER_GPIO.
If a hardware clock or hardware PWM is active on the gpio the
reported range will be 1000.
reported range will be 1000000 (1M).
D*/
/*F*/
@ -535,8 +538,12 @@ user_gpio: 0-31.
Returns the real range used for the gpio if OK,
otherwise PI_BAD_USER_GPIO.
If a hardware clock or hardware PWM is active on the gpio the
reported real range will be 1000.
If a hardware clock is active on the gpio the reported
real range will be 1000000 (1M).
If hardware PWM is active on the gpio the reported real range
will be approximately 250M divided by the set PWM frequency.
D*/
/*F*/
@ -593,10 +600,13 @@ user_gpio: 0-31.
. .
For normal PWM the frequency will be that defined for the gpio by
[*set_PWM_frequency*]. If a hardware clock is active on the gpio the
reported frequency will be that set by [*hardware_clock*]. If hardware
PWM is active on the gpio the reported frequency will be that set by
[*hardware_PWM*].
[*set_PWM_frequency*].
If a hardware clock is active on the gpio the reported frequency
will be that set by [*hardware_clock*].
If hardware PWM is active on the gpio the reported frequency
will be that set by [*hardware_PWM*].
Returns the frequency (in hertz) used for the gpio if OK,
otherwise PI_BAD_USER_GPIO.
@ -854,10 +864,11 @@ D*/
int hardware_clock(unsigned gpio, unsigned clkfreq);
/*D
Starts a hardware clock on a gpio at the specified frequency.
Frequencies above 30MHz are unlikely to work.
. .
gpio: see description
frequency: 0 (off) or 4689-250M
frequency: 0 (off) or 4689-250000000 (250M)
. .
Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
@ -870,9 +881,9 @@ The gpio must be one of the following.
. .
4 clock 0 All models
5 clock 1 A+/B+ and compute module only (reserved for system use)
6 clock 2 A+/B+ and compute module only
20 clock 0 A+/B+ and compute module only
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
6 clock 2 A+/B+/Pi2 and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
21 clock 1 All models but Rev.2 B (reserved for system use)
32 clock 0 Compute module only
@ -892,6 +903,7 @@ D*/
int hardware_PWM(unsigned gpio, unsigned PWMfreq, uint32_t PWMduty);
/*D
Starts hardware PWM on a gpio at the specified frequency and dutycycle.
Frequencies above 30MHz are unlikely to work.
NOTE: Any waveform started by [*wave_send_once*], [*wave_send_repeat*], [*wave_tx_start*], or [*wave_tx_repeat*] will be cancelled.
@ -901,26 +913,25 @@ daemon is started (option -t).
. .
gpio: see descripton
PWMfreq: 0 (off) or 5-50K
PWMduty: 0 (off) to 5000 (fully on).
PWMfreq: 0 (off) or 1-125000000 (125M)
PWMduty: 0 (off) to 1000000 (1M)(fully on)
. .
Returns 0 if OK, otherwise PI_NOT_PERMITTED, PI_BAD_GPIO,
PI_NOT_HPWM_GPIO, PI_BAD_HPWM_DUTY, PI_BAD_HPWM_FREQ,
or PI_HPWM_ILLEGAL.
Both PWM channels share the same clock and the same update frequency.
The latest frequency setting will be used by both PWM channels. The
same PWM channel is available on multiple gpios. The latest
dutycycle setting will be used by all gpios which share a PWM channel.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
share a PWM channel.
The gpio must be one of the following.
. .
12 PWM channel 0 A+/B+ and compute module only
13 PWM channel 1 A+/B+ and compute module only
12 PWM channel 0 A+/B+/Pi2 and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
18 PWM channel 0 All models
19 PWM channel 1 A+/B+ and compute module only
19 PWM channel 1 A+/B+/Pi2 and compute module only
40 PWM channel 0 Compute module only
41 PWM channel 1 Compute module only
@ -948,30 +959,22 @@ uint32_t get_hardware_revision(void);
/*D
Get the Pi's hardware revision number.
The hardware revision is the last 4 characters on the Revision line
The hardware revision is the last few characters on the Revision line
of /proc/cpuinfo.
If the hardware revision can not be found or is not a valid
hexadecimal number the function returns 0.
The revision number can be used to determine the assignment of gpios
to pins.
to pins (see [*gpio*]).
There are currently three types of board.
Type 1 has gpio 0 on P1-3, gpio 1 on P1-5, and gpio 21 on P1-13.
Type 2 has gpio 2 on P1-3, gpio 3 on P1-5, gpio 27 on P1-13, and
gpios 28-31 on P5.
Type 3 has a 40 pin connector rather than the 26 pin connector of
the earlier boards. Gpios 0 to 27 are brought out to the connector.
There are at least three types of board.
Type 1 boards have hardware revision numbers of 2 and 3.
Type 2 boards have hardware revision numbers of 4, 5, 6, and 15.
Type 3 boards have hardware revision number 16.
Type 3 boards have hardware revision numbers of 16 or greater.
D*/
/*F*/
@ -1727,12 +1730,12 @@ Data will be transferred at baud bits per second. The flags may
be used to modify the default behaviour of 4-wire operation, mode 0,
active low chip select.
An auxiliary SPI device is available on the B+ and may be
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
. .
spi_channel: 0-1 (0-2 for B+ auxiliary device).
spi_channel: 0-1 (0-2 for A+/B+/Pi2 auxiliary device).
spi_baud: 32K-125M (values above 30M are unlikely to work).
spi_flags: see below.
. .
@ -1749,6 +1752,8 @@ spi_flags consists of the least significant 22 bits.
mm defines the SPI mode.
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
. .
Mode POL PHA
0 0 0
@ -1762,7 +1767,7 @@ px is 0 if CEx is active low (default) and 1 for active high.
ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the B+.
auxiliary device is only present on the A+/B+/Pi2.
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
SPI device only.
@ -1950,7 +1955,7 @@ otherwise PI_BAD_HANDLE.
D*/
/*F*/
int custom_1(unsigned arg1, unsigned arg2, char *argx, unsigned count);
int custom_1(unsigned arg1, unsigned arg2, char *argx, unsigned argc);
/*D
This function is available for user customisation.
@ -1960,7 +1965,7 @@ It returns a single integer value.
arg1: >=0
arg2: >=0
argx: extra (byte) arguments
count: number of extra arguments
argc: number of extra arguments
. .
Returns >= 0 if OK, less than 0 indicates a user defined error.
@ -1968,7 +1973,7 @@ D*/
/*F*/
int custom_2(unsigned arg1, char *argx, unsigned count,
int custom_2(unsigned arg1, char *argx, unsigned argc,
char *retBuf, unsigned retMax);
/*D
This function is available for user customisation.
@ -1979,7 +1984,7 @@ rather than just an integer.
The return value is an integer indicating the number of returned bytes.
. .
arg1: >=0
argx: extra (byte) arguments
argc: extra (byte) arguments
count: number of extra arguments
retBuf: buffer for returned data
retMax: maximum number of bytes to return
@ -2068,6 +2073,22 @@ the pigpio daemon. It may be NULL in which case localhost
is used unless overridden by the PIGPIO_ADDR environment
variable.
arg1::
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
arg2::
An unsigned argument passed to a user customised function. Its
meaning is defined by the customiser.
argc::
The count of bytes passed to a user customised function.
*argx::
A pointer to an array of bytes passed to a user customised function.
Its meaning and content is defined by the customiser.
bbBaud::
The baud rate used for the transmission and reception of bit banged
serial data.
@ -2137,7 +2158,7 @@ typedef void (*CBFuncEx_t)
char::
A single character, an 8 bit quantity able to store 0-255.
clkfreq::4689-250M
clkfreq::4689-250000000 (250M)
The hardware clock frequency.
count::
@ -2180,6 +2201,32 @@ by its dutycycle.
gpio::
A Broadcom numbered gpio, in the range 0-53.
There are 54 General Purpose Input Outputs (gpios) named gpio0 through
gpio53.
They are split into two banks. Bank 1 consists of gpio0 through
gpio31. Bank 2 consists of gpio32 through gpio53.
All the gpios which are safe for the user to read and write are in
bank 1. Not all gpios in bank 1 are safe though. Type 1 boards
have 17 safe gpios. Type 2 boards have 21. Type 3 boards have 26.
See [*get_hardware_revision*].
The user gpios are marked with an X in the following table.
. .
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Type 1 X X - - X - - X X X X X - - X X
Type 2 - - X X X - - X X X X X - - X X
Type 3 X X X X X X X X X X X X X X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Type 1 - X X - - X X X X X - - - - - -
Type 2 - X X - - - X X X X - X X X X X
Type 3 X X X X X X X X X X X X - - - -
. .
gpioPulse_t::
. .
typedef struct
@ -2305,19 +2352,19 @@ PI_MIN_SERVO_PULSEWIDTH 500
PI_MAX_SERVO_PULSEWIDTH 2500
. .
PWMduty::0-1000
PWMduty::0-1000000 (1M)
The hardware PWM dutycycle.
. .
#define PI_HW_PWM_RANGE 1000
#define PI_HW_PWM_RANGE 1000000
. .
PWMfreq::5-250K
PWMfreq::1-125000000 (125M)
The hardware PWM frequency.
. .
#define PI_HW_PWM_MIN_FREQ 5
#define PI_HW_PWM_MAX_FREQ 250000
#define PI_HW_PWM_MIN_FREQ 1
#define PI_HW_PWM_MAX_FREQ 125000000
. .
range::25-40000
@ -2327,6 +2374,13 @@ PI_MIN_DUTYCYCLE_RANGE 25
PI_MAX_DUTYCYCLE_RANGE 40000
. .
*retBuf::
A buffer to hold a number of bytes returned to a used customised function,
retMax::
The maximum number of bytes a user customised function should return.
*rxBuf::
A pointer to a buffer to receive data.
@ -2390,6 +2444,8 @@ A whole number >= 0.
user_gpio::
0-31, a Broadcom numbered gpio.
See [*gpio*].
*userdata::
A pointer to arbitrary user data. This may be used to identify the instance.

151
pigs.1
View File

@ -236,7 +236,7 @@ will be returned.
.br
.EX
$ pigs bc2 0x8000 # clear gpio 47 (activity LED on B+)
$ pigs bc2 0x8000 # clear gpio 47 (activity LED on A+/B+/Pi2)
.br
.br
@ -336,7 +336,7 @@ will be returned.
.br
.EX
$ pigs bs2 0x40 # set gpio 38 (enable high current mode B+)
$ pigs bs2 0x40 # set gpio 38 (enable high current mode A+/B+/Pi2)
.br
.br
@ -351,6 +351,26 @@ ERROR: no permission to update one or more gpios
.br
.IP "\fBCF1 uvs\fP - Custom function 1"
.IP "" 4
.br
This command calls a user customised function. The meaning of
any paramaters and the returned value is defined by the
customiser.
.br
.IP "\fBCF2 uvs\fP - Custom function 2"
.IP "" 4
.br
This command calls a user customised function. The meaning of
any paramaters and the returned value is defined by the
customiser.
.br
.IP "\fBGDC u\fP - Get gpio PWM dutycycle"
.IP "" 4
@ -363,10 +383,15 @@ status code will be returned.
.br
For normal PWM the dutycycle will be out of the defined range
for the gpio (see \fBPRG\fP). If a hardware clock is active on
the gpio the reported dutycycle will be 500 (out of 1000).
for the gpio (see \fBPRG\fP).
.br
If a hardware clock is active on the gpio the reported
dutycycle will be 500000 (500k) out of 1000000 (1M).
.br
If hardware PWM is active on the gpio the reported dutycycle
will be out of a 1000.
will be out of a 1000000 (1M).
.br
@ -452,7 +477,7 @@ $ pigs help
.IP "\fBHC g cf\fP - Set hardware clock frequency"
.IP "" 4
This command sets the hardware clock associated with gpio \fBg\fP to
frequency \fBcf\fP.
frequency \fBcf\fP. Frequencies above 30MHz are unlikely to work.
.br
Upon success nothing is returned. On error a negative status code
@ -488,10 +513,10 @@ The gpio must be one of the following.
.EX
4 clock 0 All models
5 clock 1 A+/B+ and compute module only (reserved for system use)
6 clock 2 A+/B+ and compute module only
20 clock 0 A+/B+ and compute module only
21 clock 1 All models but Rev.2 B (reserved for system use)
5 clock 1 A+/B+/Pi2 and compute module only (reserved for system use)
6 clock 2 A+/B+/Pi2 and compute module only
20 clock 0 A+/B+/Pi2 and compute module only
21 clock 1 All models but Type 2 B (reserved for system use)
.EE
@ -516,7 +541,8 @@ with the gpio number.
.IP "\fBHP g pf pdc\fP - Set hardware PWM frequency and dutycycle"
.IP "" 4
This command sets the hardware PWM associated with gpio \fBg\fP to
frequency \fBpf\fP with dutycycle \fBpdc\fP.
frequency \fBpf\fP with dutycycle \fBpdc\fP. Frequencies above 30MHz
are unlikely to work.
.br
NOTE: Any waveform started by \fBWVGO\fP, \fBWVGOR\fP, \fBWVTX\fP or
@ -534,28 +560,27 @@ will be returned.
.br
.EX
$ pigs hp 18 100 4000 # 80% dutycycle
$ pigs hp 18 100 800000 # 80% dutycycle
.br
.br
$ pigs hp 19 100 1000 # 20% dutycycle
$ pigs hp 19 100 200000 # 20% dutycycle
.br
.br
$ pigs hp 19 1 100
$ pigs hp 19 125000001 100000
.br
-96
.br
ERROR: hardware PWM frequency not 5-50K
ERROR: hardware PWM frequency not 1-125M
.br
.EE
.br
Both PWM channels share the same clock and the same update frequency.
The latest frequency setting will be used by both PWM channels. The
same PWM channel is available on multiple gpios. The latest
dutycycle setting will be used by all gpios which share a PWM channel.
The same PWM channel is available on multiple gpios. The latest
frequency and dutycycle setting will be used by all gpios which
share a PWM channel.
.br
The gpio must be one of the following.
@ -563,10 +588,10 @@ The gpio must be one of the following.
.br
.EX
12 PWM channel 0 A+/B+ and compute module only
13 PWM channel 1 A+/B+ and compute module only
12 PWM channel 0 A+/B+/Pi2 and compute module only
13 PWM channel 1 A+/B+/Pi2 and compute module only
18 PWM channel 0 All models
19 PWM channel 1 A+/B+ and compute module only
19 PWM channel 1 A+/B+/Pi2 and compute module only
.EE
@ -588,7 +613,7 @@ The gpio must be one of the following.
This command returns the hardware revision of the Pi.
.br
The hardware revision is found in the last 4 characters on the Revision
The hardware revision is found in the last 4 characters on the Type sion
line of /proc/cpuinfo.
.br
@ -596,23 +621,12 @@ If the hardware revision can not be found or is not a valid hexadecimal
number the command returns 0.
.br
The revision number can be used to determine the assignment of gpios to pins.
The revision number can be used to determine the assignment of gpios
to pins (see \fBg\fP).
.br
There are currently three types of board.
.br
Type 1 has gpio 0 on P1-3, gpio 1 on P1-5, and gpio 21 on P1-13.
.br
Type 2 has gpio 2 on P1-3, gpio 3 on P1-5, gpio 27 on P1-13, and
gpios 28-31 on P5.
.br
Type 3 has a 40 pin connector rather than the 26 pin connector of
the earlier boards. Gpios 0 to 27 are brought out to the connector
(although gpios 0 and 1 are reserved).
.br
Type 1 boards have hardware revision numbers of 2 and 3.
@ -620,7 +634,7 @@ Type 1 boards have hardware revision numbers of 2 and 3.
Type 2 boards have hardware revision numbers of 4, 5, 6, and 15.
.br
Type 3 boards have hardware revision number 16.
Type 3 boards have hardware revision numbers of 16 or greater.
.br
for "Revision : 0002" the command returns 2.
@ -1491,8 +1505,13 @@ status code will be returned.
.br
For normal PWM the frequency will be that defined for the gpio
by \fBPFS\fP. If a hardware clock is active on the gpio
the reported frequency will be that set by \fBHC\fP.
by \fBPFS\fP.
.br
If a hardware clock is active on the gpio the reported frequency
will be that set by \fBHC\fP.
.br
If hardware PWM is active on the gpio the reported frequency
will be that set by \fBHP\fP.
@ -1626,7 +1645,7 @@ will be returned.
.br
If a hardware clock or hardware PWM is active on the gpio the reported
range will be 1000.
range will be 1000000 (1M).
.br
@ -1857,12 +1876,15 @@ ERROR: unknown script id
This command returns the real underlying range used by gpio \fBu\fP.
.br
If a hardware clock or hardware PWM is active on the gpio the
reported range will be 1000.
If a hardware clock is active on the gpio the reported
real range will be 1000000 (1M).
.br
Upon success the real range is returned. On error a negative status code
will be returned.
If hardware PWM is active on the gpio the reported real range
will be approximately 250M divided by the set PWM frequency.
.br
On error a negative status code will be returned.
.br
See \fBPRS\fP.
@ -2412,7 +2434,7 @@ may be used to modify the default behaviour of 4-wire operation,
mode 0, active low chip select.
.br
An auxiliary SPI device is available on the B+ and may be
An auxiliary SPI device is available on the A+/B+/Pi2 and may be
selected by setting the A bit in the flags. The auxiliary
device has 3 chip selects and a selectable word size in bits.
@ -2432,6 +2454,9 @@ The flags consists of the least significant 22 bits.
.br
mm defines the SPI mode.
.br
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
.br
.EX
@ -2456,7 +2481,7 @@ ux is 0 if the CEx gpio is reserved for SPI (default) and 1 otherwise.
.br
A is 0 for the standard SPI device, 1 for the auxiliary SPI. The
auxiliary device is only present on the B+.
auxiliary device is only present on the A+/B+/Pi2.
.br
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
@ -3334,8 +3359,11 @@ Bank 2 consists of gpio32 through gpio53.
.br
All the gpios which are safe for the user to read and write are in bank 1.
Not all gpios in bank 1 are safe though. Rev.1 boards have 17 safe gpios.
Rev.2 boards have 21. Rev.3 boards have 26.
Not all gpios in bank 1 are safe though. Type 1 boards have 17 safe gpios.
Type 2 boards have 21. Type 3 boards have 26.
.br
See \fBHWVER\fP.
.br
The user gpios are marked with an X in the following table.
@ -3344,14 +3372,14 @@ The user gpios are marked with an X in the following table.
.EX
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Rev.1 X X - - X - - X X X X X - - X X
Rev.2 - - X X X - - X X X X X - - X X
Rev.3 X X X X X X X X X X X X X X
Type 1 X X - - X - - X X X X X - - X X
Type 2 - - X X X - - X X X X X - - X X
Type 3 X X X X X X X X X X X X X X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
Rev.1 - X X - - X X X X X - - - - - -
Rev.2 - X X - - - X X X X - X X X X X
Rev.3 X X X X X X X X X X X X - - - -
Type 1 - X X - - X X X X X - - - - - -
Type 2 - X X - - - X X X X - X X X X X
Type 3 X X X X X X X X X X X X - - - -
.EE
@ -3466,17 +3494,17 @@ The command expects 0 to 10 numbers as parameters to be passed to the script.
.br
.IP "\fBpdc\fP - hardware PWM dutycycle (0-1000)" 0
.IP "\fBpdc\fP - hardware PWM dutycycle (0-1000000)" 0
The command expects a dutycycle.
.br
.IP "\fBpf\fP - hardware PWM frequency (5-250K)" 0
.IP "\fBpf\fP - hardware PWM frequency (1-125M)" 0
The command expects a frequency.
.br
.IP "\fBpl\fP - pulse length (1-50)" 0
.IP "\fBpl\fP - pulse length (1-100)" 0
The command expects a pulse length in microseconds.
.br
@ -3545,6 +3573,12 @@ See \fBg\fP
.br
.IP "\fBuvs\fP - values" 0
The command expects an arbitrary number of >=0 values (possibly none).
Any after the first two must be <= 255.
.br
.IP "\fBv\fP - value" 0
The command expects a number.
@ -3766,7 +3800,8 @@ Each script has
.br
.SS Commands
.br
All the normal pigs commands may be used within a script.
All the normal pigs commands may be used within a script. However
commands which return more than an integer will be of little use.
.br
The following commands are only legal within a script.

2
setup.py
View File

@ -3,7 +3,7 @@
from distutils.core import setup
setup(name='pigpio',
version='1.15',
version='1.16',
author='joan',
author_email='joan@abyz.co.uk',
maintainer='joan',

10
x_pigs
View File

@ -1,7 +1,5 @@
#!/bin/bash
VERSION=29
GPIO=4
#
@ -21,6 +19,11 @@ GPIO=4
# of tests indicate a problem.
#
echo "Testing pigs I/F"
s=$(pigs pigpv)
echo "pigpio version $s"
s=$(pigs bc1 0)
if [[ $s = "" ]]; then echo "BC1 ok"; else echo "BC1 fail ($s)"; fi
@ -91,9 +94,6 @@ if [[ $s = 10 ]]; then echo "PFS-a ok"; else echo "PFS-a fail ($s)"; fi
s=$(pigs pfs $GPIO 800)
if [[ $s = 800 ]]; then echo "PFS-b ok"; else echo "PFS-b fail ($s)"; fi
s=$(pigs pigpv)
if [[ $s = $VERSION ]]; then echo "PIGPV ok"; else echo "PIGPV fail ($s)"; fi
s=$(pigs prs $GPIO 255)
if [[ $s = 250 ]]; then echo "PRG-a ok"; else echo "PRG-a fail ($s)"; fi
s=$(pigs prg $GPIO)

12
x_pipe
View File

@ -1,7 +1,5 @@
#!/bin/bash
VERSION=29
GPIO=4
#
@ -20,6 +18,12 @@ GPIO=4
# of tests indicate a problem.
#
echo "Testing pipe I/F"
echo "pigpv" >/dev/pigpio
read -t 1 s </dev/pigout
echo "pigpio version $s"
echo "bc1 0" >/dev/pigpio
read -t 1 s </dev/pigout
if [[ $s = 0 ]]; then echo "BC1 ok"; else echo "BC1 fail ($s)"; fi
@ -123,10 +127,6 @@ echo "pfs $GPIO 800" >/dev/pigpio
read -t 1 s </dev/pigout
if [[ $s = 800 ]]; then echo "PFS-b ok"; else echo "PFS-b fail ($s)"; fi
echo "pigpv" >/dev/pigpio
read -t 1 s </dev/pigout
if [[ $s = $VERSION ]]; then echo "PIGPV ok"; else echo "PIGPV fail ($s)"; fi
echo "prs $GPIO 255" >/dev/pigpio
read -t 1 s </dev/pigout
if [[ $s = 250 ]]; then echo "PRG-a ok"; else echo "PRG-a fail ($s)"; fi