mirror of https://github.com/joan2937/pigpio
Fix GPIO for BSC SPI in slave mode and update doc sources.
This commit is contained in:
Guy McSwain
parent
2a73c0f818
commit
f51cd7e950
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@ -524,9 +524,6 @@ The output process is simple. You simply append data to the FIFO
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buffer on the chip. This works like a queue, you add data to the
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queue and the master removes it.
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I can't get SPI to work properly. I tried with a
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control word of 0x303 and swapped MISO and MOSI.
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The command sets the BSC mode and writes any data [*bvs*]
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to the BSC transmit FIFO. It returns the data count (at least 1
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for the status word), the status word, followed by any data bytes
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@ -543,13 +540,13 @@ GPIO used for models other than those based on the BCM2711.
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 18 @ 19 @ - @ - @ - @ -
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SPI @ - @ - @ 18 @ 19 @ 20 @ 21
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SPI @ - @ - @ 20 @ 19 @ 18 @ 21
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GPIO used for models based on the BCM2711 (e.g. the Pi4B).
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 10 @ 11 @ - @ - @ - @ -
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SPI @ - @ - @ 10 @ 11 @ 9 @ 8
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SPI @ - @ - @ 9 @ 11 @ 10 @ 8
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When a zero control word is received the used GPIO will be reset
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to INPUT mode.
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@ -647,6 +644,35 @@ $ pigs i2crd 0 5
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5 22 33 44 55 66
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...
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The BSC slave in SPI mode deserializes data from the MOSI pin into its receiver/
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FIFO when the LSB of the first byte is a 0. No data is output on the MISO pin.
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When the LSB of the first byte on MOSI is a 1, the transmitter/FIFO data is
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serialized onto the MISO pin while all other data on the MOSI pin is ignored.
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The BK bit of the BSC control register is non-functional when in the SPI mode.
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The transmitter along with its FIFO can be dequeued by successively disabling
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and re-enabling the TE bit on the BSC control register while in SPI mode.
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This example demonstrates a SPI master talking to the BSC as SPI slave:
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Requires SPI master SCLK / MOSI / MISO / CE GPIO are connected to
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BSC peripheral GPIO 11 / 9 / 10 / 8 respectively, on a Pi4B (BCM2711).
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...
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$ pigs bspio 15 26 13 14 10000 0 # open bit-bang spi master on random gpio
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$ pigs bscx 0x303 # start BSC as SPI slave, both rx and tx enabled
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1 18
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$ pigs bspix 15 0 0xd 0xe 0xa 0xd # write 0xdead to BSC
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5 0 0 0 0 0
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$ pigs bscx 0x303 0xb 0xe 0xe 0xf # place 0xbeef in BSC tx FIFO, read rx FIFO
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5 262338 13 14 10 13
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$ pigs bspix 15 1 0 0 0 0 # read four bytes from BSC
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5 0 11 14 14 15
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...
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BSPIC ::
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This command stops bit banging SPI on a set of GPIO
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37
pigpio.c
37
pigpio.c
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@ -25,7 +25,7 @@ OTHER DEALINGS IN THE SOFTWARE.
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For more information, please refer to <http://unlicense.org/>
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*/
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/* pigpio version 78 */
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/* pigpio version 7802 */
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/* include ------------------------------------------------------- */
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@ -10924,7 +10924,7 @@ int bbI2CZip(
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void bscInit(int mode)
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{
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int sda, scl, miso, ce;
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int sda, scl, mosi, miso, ce;
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bscsReg[BSC_CR]=0; /* clear device */
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bscsReg[BSC_RSR]=0; /* clear underrun and overrun errors */
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@ -10934,32 +10934,39 @@ void bscInit(int mode)
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if (pi_is_2711)
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{
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sda = BSC_SDA_MOSI_2711;
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sda = BSC_SDA_2711;
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scl = BSC_SCL_SCLK_2711;
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mosi = BSC_MOSI_2711;
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miso = BSC_MISO_2711;
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ce = BSC_CE_N_2711;
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}
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else
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{
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sda = BSC_SDA_MOSI;
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sda = BSC_SDA;
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scl = BSC_SCL_SCLK;
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mosi = BSC_MOSI;
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miso = BSC_MISO;
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ce = BSC_CE_N;
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}
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gpioSetMode(sda, PI_ALT3);
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gpioSetMode(scl, PI_ALT3);
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if (mode > 1) /* SPI uses all GPIO */
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{
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gpioSetMode(scl, PI_ALT3);
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gpioSetMode(mosi, PI_ALT3);
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gpioSetMode(miso, PI_ALT3);
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gpioSetMode(ce, PI_ALT3);
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}
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else
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{
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gpioSetMode(scl, PI_ALT3);
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gpioSetMode(sda, PI_ALT3);
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}
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}
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void bscTerm(int mode)
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{
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int sda, scl, miso, ce;
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int sda, scl, mosi, miso, ce;
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bscsReg[BSC_CR] = 0; /* clear device */
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bscsReg[BSC_RSR]=0; /* clear underrun and overrun errors */
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@ -10967,27 +10974,35 @@ void bscTerm(int mode)
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if (pi_is_2711)
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{
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sda = BSC_SDA_MOSI_2711;
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sda = BSC_SDA_2711;
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scl = BSC_SCL_SCLK_2711;
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mosi = BSC_MOSI_2711;
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miso = BSC_MISO_2711;
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ce = BSC_CE_N_2711;
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}
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else
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{
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sda = BSC_SDA_MOSI;
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sda = BSC_SDA;
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scl = BSC_SCL_SCLK;
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mosi = BSC_MOSI;
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miso = BSC_MISO;
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ce = BSC_CE_N;
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}
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gpioSetMode(sda, PI_INPUT);
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gpioSetMode(scl, PI_INPUT);
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if (mode > 1)
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{
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gpioSetMode(scl, PI_INPUT);
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gpioSetMode(mosi, PI_INPUT);
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gpioSetMode(miso, PI_INPUT);
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gpioSetMode(ce, PI_INPUT);
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}
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else
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{
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gpioSetMode(sda, PI_INPUT);
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gpioSetMode(scl, PI_INPUT);
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}
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}
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int bscXfer(bsc_xfer_t *xfer)
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30
pigpio.h
30
pigpio.h
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@ -31,7 +31,7 @@ For more information, please refer to <http://unlicense.org/>
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#include <stdint.h>
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#include <pthread.h>
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#define PIGPIO_VERSION 7801
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#define PIGPIO_VERSION 7802
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/*TEXT
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@ -803,14 +803,16 @@ typedef void *(gpioThreadFunc_t) (void *);
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/* BSC GPIO */
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#define BSC_SDA_MOSI 18
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#define BSC_SDA 18
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#define BSC_MOSI 20
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#define BSC_SCL_SCLK 19
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#define BSC_MISO 20
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#define BSC_MISO 18
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#define BSC_CE_N 21
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#define BSC_SDA_MOSI_2711 10
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#define BSC_SDA_2711 10
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#define BSC_MOSI_2711 9
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#define BSC_SCL_SCLK_2711 11
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#define BSC_MISO_2711 9
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#define BSC_MISO_2711 10
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#define BSC_CE_N_2711 8
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/* Longest busy delay */
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@ -2978,9 +2980,6 @@ The output process is simple. You simply append data to the FIFO
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buffer on the chip. This works like a queue, you add data to the
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queue and the master removes it.
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I can't get SPI to work properly. I tried with a
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control word of 0x303 and swapped MISO and MOSI.
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The function sets the BSC mode, writes any data in
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the transmit buffer to the BSC transmit FIFO, and
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copies any data in the BSC receive FIFO to the
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@ -3013,13 +3012,13 @@ GPIO used for models other than those based on the BCM2711.
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 18 @ 19 @ - @ - @ - @ -
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SPI @ - @ - @ 18 @ 19 @ 20 @ 21
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SPI @ - @ - @ 20 @ 19 @ 18 @ 21
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GPIO used for models based on the BCM2711 (e.g. the Pi4B).
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 10 @ 11 @ - @ - @ - @ -
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SPI @ - @ - @ 10 @ 11 @ 9 @ 8
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SPI @ - @ - @ 9 @ 11 @ 10 @ 8
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When a zero control word is received the used GPIO will be reset
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to INPUT mode.
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@ -3099,6 +3098,17 @@ if (status >= 0)
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// process transfer
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}
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...
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The BSC slave in SPI mode deserializes data from the MOSI pin into its
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receiver/FIFO when the LSB of the first byte is a 0. No data is output on
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the MISO pin. When the LSB of the first byte on MOSI is a 1, the
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transmitter/FIFO data is serialized onto the MISO pin while all other data
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on the MOSI pin is ignored.
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The BK bit of the BSC control register is non-functional when in the SPI
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mode. The transmitter along with its FIFO can be dequeued by successively
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disabling and re-enabling the TE bit on the BSC control register while in
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SPI mode.
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D*/
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/*F*/
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54
pigpio.py
54
pigpio.py
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@ -3604,9 +3604,6 @@ class pi():
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buffer on the chip. This works like a queue, you add data to the
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queue and the master removes it.
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I can't get SPI to work properly. I tried with a
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control word of 0x303 and swapped MISO and MOSI.
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The function sets the BSC mode, writes any data in
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the transmit buffer to the BSC transmit FIFO, and
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copies any data in the BSC receive FIFO to the
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@ -3627,13 +3624,13 @@ class pi():
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 18 @ 19 @ - @ - @ - @ -
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SPI @ - @ - @ 18 @ 19 @ 20 @ 21
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SPI @ - @ - @ 20 @ 19 @ 18 @ 21
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GPIO used for models based on the BCM2711 (e.g. the Pi4B).
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 10 @ 11 @ - @ - @ - @ -
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SPI @ - @ - @ 10 @ 11 @ 9 @ 8
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SPI @ - @ - @ 9 @ 11 @ 10 @ 8
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When a zero control word is received the used GPIO will be reset
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to INPUT mode.
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@ -3689,6 +3686,50 @@ class pi():
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...
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(status, count, data) = pi.bsc_xfer(0x330305, "Hello!")
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...
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The BSC slave in SPI mode deserializes data from the MOSI pin into its
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receiver/FIFO when the LSB of the first byte is a 0. No data is output on
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the MISO pin. When the LSB of the first byte on MOSI is a 1, the
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transmitter/FIFO data is serialized onto the MISO pin while all other data
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on the MOSI pin is ignored.
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The BK bit of the BSC control register is non-functional when in the SPI
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mode. The transmitter along with its FIFO can be dequeued by successively
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disabling and re-enabling the TE bit on the BSC control register while in
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SPI mode.
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||||
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This example demonstrates a SPI master talking to the BSC as SPI slave:
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Requires SPI master SCLK / MOSI / MISO / CE GPIO are connected to
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BSC peripheral GPIO 11 / 9 / 10 / 8 respectively, on a Pi4B (BCM2711).
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...
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#!/usr/bin/env python
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import pigpio
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# Choose some random GPIO for the bit-bang SPI master
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CE=15
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MISO=26
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MOSI=13
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SCLK=14
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pi = pigpio.pi()
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if not pi.connected:
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exit()
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pi.bb_spi_open(CE, MISO, MOSI, SCLK, 10000, 0) # open SPI master
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pi.bsc_xfer(0x303, []) # start BSC as SPI slave
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pi.bb_spi_xfer(CE, '\0' + 'hello') # write 'hello' to BSC
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status, count, bsc_data = pi.bsc_xfer(0x303, 'world')
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print bsc_data # hello
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count, spi_data = pi.bb_spi_xfer(CE, [1,0,0,0,0,0])
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print spi_data # world
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pi.bsc_xfer(0, [])
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pi.bb_spi_close(CE)
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pi.stop()
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...
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"""
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# I p1 control
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# I p2 0
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@ -3716,9 +3757,6 @@ class pi():
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"""
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This function allows the Pi to act as a slave I2C device.
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This function is not available on the BCM2711 (e.g. as
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used in the Pi4B).
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The data bytes (if any) are written to the BSC transmit
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FIFO and the bytes in the BSC receive FIFO are returned.
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@ -3518,9 +3518,6 @@ The output process is simple. You simply append data to the FIFO
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buffer on the chip. This works like a queue, you add data to the
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queue and the master removes it.
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I can't get SPI to work properly. I tried with a
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control word of 0x303 and swapped MISO and MOSI.
|
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|
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The function sets the BSC mode, writes any data in
|
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the transmit buffer to the BSC transmit FIFO, and
|
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copies any data in the BSC receive FIFO to the
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@ -3563,13 +3560,13 @@ GPIO used for models other than those based on the BCM2711.
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 18 @ 19 @ - @ - @ - @ -
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SPI @ - @ - @ 18 @ 19 @ 20 @ 21
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SPI @ - @ - @ 20 @ 19 @ 18 @ 21
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GPIO used for models based on the BCM2711 (e.g. the Pi4B).
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@ SDA @ SCL @ MOSI @ SCLK @ MISO @ CE
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I2C @ 10 @ 11 @ - @ - @ - @ -
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SPI @ - @ - @ 10 @ 11 @ 9 @ 8
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SPI @ - @ - @ 9 @ 11 @ 10 @ 8
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When a zero control word is received the used GPIO will be reset
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to INPUT mode.
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@ -3640,6 +3637,17 @@ if (status >= 0)
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// process transfer
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}
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...
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The BSC slave in SPI mode deserializes data from the MOSI pin into its
|
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receiver/FIFO when the LSB of the first byte is a 0. No data is output on
|
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the MISO pin. When the LSB of the first byte on MOSI is a 1, the
|
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transmitter/FIFO data is serialized onto the MISO pin while all other data
|
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on the MOSI pin is ignored.
|
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|
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The BK bit of the BSC control register is non-functional when in the SPI
|
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mode. The transmitter along with its FIFO can be dequeued by successively
|
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disabling and re-enabling the TE bit on the BSC control register while in
|
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SPI mode.
|
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D*/
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/*F*/
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