mirror of https://github.com/joan2937/pigpio
V67+: tided up I2C/SPI documentation
This commit is contained in:
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934874be2f
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64
pigpio.3
64
pigpio.3
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@ -2644,6 +2644,21 @@ will be available if a kernel supported bus multiplexor is being used.
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The GPIO used are given in the following table.
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.br
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SDA SCL
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.br
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I2C 0 0 1
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.br
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I2C 1 2 3
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.br
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.br
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.br
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.br
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Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
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Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
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PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
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PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
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@ -4159,17 +4174,40 @@ active low chip select.
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.br
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.br
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.br
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.br
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An auxiliary SPI device is available on all models but the
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The Pi has two SPI peripherals: main and auxiliary.
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A and B and may be selected by setting the A bit in the flags.
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The auxiliary device has 3 chip selects and a selectable word
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.br
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size in bits.
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.br
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The main SPI has two chip selects (channels), the auxiliary has
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three.
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.br
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.br
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The auxiliary SPI is available on all models but the A and B.
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.br
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The GPIO used are given in the following table.
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.br
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.br
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MISO MOSI SCLK CE0 CE1 CE2
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.br
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Main SPI 9 10 11 8 7 -
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.br
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Aux SPI 19 20 21 18 17 16
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.br
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.br
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.br
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.br
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.br
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.EX
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.EX
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spiChan: 0-1 (0-2 for the auxiliary SPI device)
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spiChan: 0-1 (0-2 for the auxiliary SPI)
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.br
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.br
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baud: 32K-125M (values above 30M are unlikely to work)
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baud: 32K-125M (values above 30M are unlikely to work)
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.br
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.br
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@ -4209,7 +4247,7 @@ mm defines the SPI mode.
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.br
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.br
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.br
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.br
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Warning: modes 1 and 3 do not appear to work on the auxiliary device.
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Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
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.br
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.br
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@ -4242,40 +4280,40 @@ ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
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.br
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.br
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.br
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.br
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A is 0 for the standard SPI device, 1 for the auxiliary SPI.
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A is 0 for the main SPI, 1 for the auxiliary SPI.
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.br
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.br
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.br
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.br
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W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
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W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
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SPI device only.
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SPI only.
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.br
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.br
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.br
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.br
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nnnn defines the number of bytes (0-15) to write before switching
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nnnn defines the number of bytes (0-15) to write before switching
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the MOSI line to MISO to read data. This field is ignored
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the MOSI line to MISO to read data. This field is ignored
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if W is not set. Standard SPI device only.
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if W is not set. Main SPI only.
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.br
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.br
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.br
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.br
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T is 1 if the least significant bit is transmitted on MOSI first, the
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T is 1 if the least significant bit is transmitted on MOSI first, the
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default (0) shifts the most significant bit out first. Auxiliary SPI
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default (0) shifts the most significant bit out first. Auxiliary SPI
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device only.
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only.
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.br
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.br
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R is 1 if the least significant bit is received on MISO first, the
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R is 1 if the least significant bit is received on MISO first, the
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default (0) receives the most significant bit first. Auxiliary SPI
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default (0) receives the most significant bit first. Auxiliary SPI
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device only.
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only.
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.br
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.br
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.br
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.br
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bbbbbb defines the word size in bits (0-32). The default (0)
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bbbbbb defines the word size in bits (0-32). The default (0)
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sets 8 bits per word. Auxiliary SPI device only.
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sets 8 bits per word. Auxiliary SPI only.
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.br
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.br
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40
pigpio.h
40
pigpio.h
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@ -2296,6 +2296,12 @@ No flags are currently defined. This parameter should be set to zero.
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Physically buses 0 and 1 are available on the Pi. Higher numbered buses
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Physically buses 0 and 1 are available on the Pi. Higher numbered buses
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will be available if a kernel supported bus multiplexor is being used.
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will be available if a kernel supported bus multiplexor is being used.
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The GPIO used are given in the following table.
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@ SDA @ SCL
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I2C 0 @ 0 @ 1
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I2C 1 @ 2 @ 3
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Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
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Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
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PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
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PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
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@ -3151,13 +3157,21 @@ Data will be transferred at baud bits per second. The flags may
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be used to modify the default behaviour of 4-wire operation, mode 0,
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be used to modify the default behaviour of 4-wire operation, mode 0,
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active low chip select.
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active low chip select.
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An auxiliary SPI device is available on all models but the
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The Pi has two SPI peripherals: main and auxiliary.
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A and B and may be selected by setting the A bit in the flags.
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The auxiliary device has 3 chip selects and a selectable word
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The main SPI has two chip selects (channels), the auxiliary has
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size in bits.
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three.
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The auxiliary SPI is available on all models but the A and B.
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The GPIO used are given in the following table.
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@ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2
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Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ -
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Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16
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. .
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. .
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spiChan: 0-1 (0-2 for the auxiliary SPI device)
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spiChan: 0-1 (0-2 for the auxiliary SPI)
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baud: 32K-125M (values above 30M are unlikely to work)
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baud: 32K-125M (values above 30M are unlikely to work)
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spiFlags: see below
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spiFlags: see below
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. .
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. .
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@ -3174,7 +3188,7 @@ spiFlags consists of the least significant 22 bits.
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mm defines the SPI mode.
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mm defines the SPI mode.
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Warning: modes 1 and 3 do not appear to work on the auxiliary device.
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Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
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. .
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. .
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Mode POL PHA
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Mode POL PHA
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@ -3188,25 +3202,25 @@ px is 0 if CEx is active low (default) and 1 for active high.
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ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
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ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
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A is 0 for the standard SPI device, 1 for the auxiliary SPI.
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A is 0 for the main SPI, 1 for the auxiliary SPI.
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W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
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W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
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SPI device only.
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SPI only.
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nnnn defines the number of bytes (0-15) to write before switching
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nnnn defines the number of bytes (0-15) to write before switching
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the MOSI line to MISO to read data. This field is ignored
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the MOSI line to MISO to read data. This field is ignored
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if W is not set. Standard SPI device only.
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if W is not set. Main SPI only.
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T is 1 if the least significant bit is transmitted on MOSI first, the
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T is 1 if the least significant bit is transmitted on MOSI first, the
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default (0) shifts the most significant bit out first. Auxiliary SPI
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default (0) shifts the most significant bit out first. Auxiliary SPI
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device only.
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only.
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R is 1 if the least significant bit is received on MISO first, the
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R is 1 if the least significant bit is received on MISO first, the
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default (0) receives the most significant bit first. Auxiliary SPI
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default (0) receives the most significant bit first. Auxiliary SPI
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device only.
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only.
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bbbbbb defines the word size in bits (0-32). The default (0)
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bbbbbb defines the word size in bits (0-32). The default (0)
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sets 8 bits per word. Auxiliary SPI device only.
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sets 8 bits per word. Auxiliary SPI only.
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The [*spiRead*], [*spiWrite*], and [*spiXfer*] functions
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The [*spiRead*], [*spiWrite*], and [*spiXfer*] functions
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transfer data packed into 1, 2, or 4 bytes according to
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transfer data packed into 1, 2, or 4 bytes according to
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62
pigpio.py
62
pigpio.py
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@ -2598,15 +2598,16 @@ class pi():
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i2c_address:= 0-0x7F.
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i2c_address:= 0-0x7F.
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i2c_flags:= 0, no flags are currently defined.
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i2c_flags:= 0, no flags are currently defined.
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Normally you would only use the [*i2c_**] functions if
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you are or will be connecting to the Pi over a network. If
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you will always run on the local Pi use the standard SMBus
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module instead.
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Physically buses 0 and 1 are available on the Pi. Higher
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Physically buses 0 and 1 are available on the Pi. Higher
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numbered buses will be available if a kernel supported bus
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numbered buses will be available if a kernel supported bus
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multiplexor is being used.
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multiplexor is being used.
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The GPIO used are given in the following table.
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@ SDA @ SCL
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I2C 0 @ 0 @ 1
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I2C 1 @ 2 @ 3
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For the SMBus commands the low level transactions are shown
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For the SMBus commands the low level transactions are shown
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at the end of the function description. The following
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at the end of the function description. The following
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abbreviations are used:
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abbreviations are used:
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@ -3736,25 +3737,28 @@ class pi():
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def spi_open(self, spi_channel, baud, spi_flags=0):
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def spi_open(self, spi_channel, baud, spi_flags=0):
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"""
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"""
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Returns a handle for the SPI device on channel. Data will be
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Returns a handle for the SPI device on the channel. Data
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transferred at baud bits per second. The flags may be used to
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will be transferred at baud bits per second. The flags
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modify the default behaviour of 4-wire operation, mode 0,
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may be used to modify the default behaviour of 4-wire
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active low chip select.
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operation, mode 0, active low chip select.
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An auxiliary SPI device is available on all models but the
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The Pi has two SPI peripherals: main and auxiliary.
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A and B and may be selected by setting the A bit in the
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flags. The auxiliary device has 3 chip selects and a
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selectable word size in bits.
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spi_channel:= 0-1 (0-2 for the auxiliary SPI device).
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The main SPI has two chip selects (channels), the auxiliary
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has three.
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The auxiliary SPI is available on all models but the A and B.
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The GPIO used are given in the following table.
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@ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2
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Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ -
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Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16
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spi_channel:= 0-1 (0-2 for the auxiliary SPI).
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baud:= 32K-125M (values above 30M are unlikely to work).
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baud:= 32K-125M (values above 30M are unlikely to work).
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spi_flags:= see below.
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spi_flags:= see below.
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Normally you would only use the [*spi_**] functions if
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you are or will be connecting to the Pi over a network. If
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you will always run on the local Pi use the standard SPI
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module instead.
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spi_flags consists of the least significant 22 bits.
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spi_flags consists of the least significant 22 bits.
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. .
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. .
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@ -3765,7 +3769,7 @@ class pi():
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mm defines the SPI mode.
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mm defines the SPI mode.
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WARNING: modes 1 and 3 do not appear to work on
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WARNING: modes 1 and 3 do not appear to work on
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the auxiliary device.
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the auxiliary SPI.
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. .
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. .
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Mode POL PHA
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Mode POL PHA
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@ -3780,25 +3784,25 @@ class pi():
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ux is 0 if the CEx GPIO is reserved for SPI (default)
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ux is 0 if the CEx GPIO is reserved for SPI (default)
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and 1 otherwise.
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and 1 otherwise.
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A is 0 for the standard SPI device, 1 for the auxiliary SPI.
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A is 0 for the main SPI, 1 for the auxiliary SPI.
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W is 0 if the device is not 3-wire, 1 if the device is 3-wire.
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W is 0 if the device is not 3-wire, 1 if the device is 3-wire.
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Standard SPI device only.
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Main SPI only.
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nnnn defines the number of bytes (0-15) to write before
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nnnn defines the number of bytes (0-15) to write before
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switching the MOSI line to MISO to read data. This field
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switching the MOSI line to MISO to read data. This field
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is ignored if W is not set. Standard SPI device only.
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is ignored if W is not set. Main SPI only.
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T is 1 if the least significant bit is transmitted on MOSI
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T is 1 if the least significant bit is transmitted on MOSI
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first, the default (0) shifts the most significant bit out
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first, the default (0) shifts the most significant bit out
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first. Auxiliary SPI device only.
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first. Auxiliary SPI only.
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R is 1 if the least significant bit is received on MISO
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R is 1 if the least significant bit is received on MISO
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first, the default (0) receives the most significant bit
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first, the default (0) receives the most significant bit
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first. Auxiliary SPI device only.
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first. Auxiliary SPI only.
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bbbbbb defines the word size in bits (0-32). The default (0)
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bbbbbb defines the word size in bits (0-32). The default (0)
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sets 8 bits per word. Auxiliary SPI device only.
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sets 8 bits per word. Auxiliary SPI only.
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The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
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The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
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transfer data packed into 1, 2, or 4 bytes according to
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transfer data packed into 1, 2, or 4 bytes according to
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@ -5414,9 +5418,6 @@ def xref():
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host:
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host:
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The name or IP address of the Pi running the pigpio daemon.
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The name or IP address of the Pi running the pigpio daemon.
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i2c_*:
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One of the i2c_ functions.
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i2c_address: 0-0x7F
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i2c_address: 0-0x7F
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The address of a device on the I2C bus.
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The address of a device on the I2C bus.
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@ -5577,9 +5578,6 @@ def xref():
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The default of True prints the probable failure reasons to
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The default of True prints the probable failure reasons to
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standard output.
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standard output.
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spi_*:
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One of the spi_ functions.
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spi_channel: 0-2
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spi_channel: 0-2
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A SPI channel.
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A SPI channel.
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66
pigpiod_if.3
66
pigpiod_if.3
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@ -2417,6 +2417,21 @@ will be available if a kernel supported bus multiplexor is being used.
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.br
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.br
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.br
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The GPIO used are given in the following table.
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.br
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.br
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SDA SCL
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.br
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I2C 0 0 1
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.br
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I2C 1 2 3
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.br
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.br
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.br
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.br
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Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
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Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
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PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
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PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
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@ -3323,7 +3338,7 @@ End
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.IP "\fBint spi_open(unsigned spi_channel, unsigned baud, unsigned spi_flags)\fP"
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.IP "\fBint spi_open(unsigned spi_channel, unsigned baud, unsigned spi_flags)\fP"
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.IP "" 4
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.IP "" 4
|
||||||
This function returns a handle for the SPI device on channel.
|
This function returns a handle for the SPI device on the channel.
|
||||||
Data will be transferred at baud bits per second. The flags may
|
Data will be transferred at baud bits per second. The flags may
|
||||||
be used to modify the default behaviour of 4-wire operation, mode 0,
|
be used to modify the default behaviour of 4-wire operation, mode 0,
|
||||||
active low chip select.
|
active low chip select.
|
||||||
|
@ -3331,17 +3346,40 @@ active low chip select.
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
An auxiliary SPI device is available on all models but the
|
The Pi has two SPI peripherals: main and auxiliary.
|
||||||
A and B and may be selected by setting the A bit in the
|
|
||||||
flags. The auxiliary device has 3 chip selects and a
|
.br
|
||||||
selectable word size in bits.
|
|
||||||
|
.br
|
||||||
|
The main SPI has two chip selects (channels), the auxiliary has
|
||||||
|
three.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
The auxiliary SPI is available on all models but the A and B.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
MISO MOSI SCLK CE0 CE1 CE2
|
||||||
|
.br
|
||||||
|
Main SPI 9 10 11 8 7 -
|
||||||
|
.br
|
||||||
|
Aux SPI 19 20 21 18 17 16
|
||||||
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.EX
|
.EX
|
||||||
spi_channel: 0-1 (0-2 for the auxiliary SPI device).
|
spi_channel: 0-1 (0-2 for the auxiliary SPI).
|
||||||
.br
|
.br
|
||||||
baud: 32K-125M (values above 30M are unlikely to work).
|
baud: 32K-125M (values above 30M are unlikely to work).
|
||||||
.br
|
.br
|
||||||
|
@ -3381,7 +3419,7 @@ mm defines the SPI mode.
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
|
Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
@ -3414,40 +3452,40 @@ ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
|
A is 0 for the main SPI, 1 for the auxiliary SPI.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
|
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
|
||||||
SPI device only.
|
SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
nnnn defines the number of bytes (0-15) to write before switching
|
nnnn defines the number of bytes (0-15) to write before switching
|
||||||
the MOSI line to MISO to read data. This field is ignored
|
the MOSI line to MISO to read data. This field is ignored
|
||||||
if W is not set. Standard SPI device only.
|
if W is not set. Main SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
T is 1 if the least significant bit is transmitted on MOSI first, the
|
T is 1 if the least significant bit is transmitted on MOSI first, the
|
||||||
default (0) shifts the most significant bit out first. Auxiliary SPI
|
default (0) shifts the most significant bit out first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
R is 1 if the least significant bit is received on MISO first, the
|
R is 1 if the least significant bit is received on MISO first, the
|
||||||
default (0) receives the most significant bit first. Auxiliary SPI
|
default (0) receives the most significant bit first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
bbbbbb defines the word size in bits (0-32). The default (0)
|
bbbbbb defines the word size in bits (0-32). The default (0)
|
||||||
sets 8 bits per word. Auxiliary SPI device only.
|
sets 8 bits per word. Auxiliary SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
|
42
pigpiod_if.h
42
pigpiod_if.h
|
@ -1627,6 +1627,12 @@ No flags are currently defined. This parameter should be set to zero.
|
||||||
Physically buses 0 and 1 are available on the Pi. Higher numbered buses
|
Physically buses 0 and 1 are available on the Pi. Higher numbered buses
|
||||||
will be available if a kernel supported bus multiplexor is being used.
|
will be available if a kernel supported bus multiplexor is being used.
|
||||||
|
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
@ SDA @ SCL
|
||||||
|
I2C 0 @ 0 @ 1
|
||||||
|
I2C 1 @ 2 @ 3
|
||||||
|
|
||||||
Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
|
Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
|
||||||
PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
|
PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
|
||||||
|
|
||||||
|
@ -2150,18 +2156,26 @@ D*/
|
||||||
/*F*/
|
/*F*/
|
||||||
int spi_open(unsigned spi_channel, unsigned baud, unsigned spi_flags);
|
int spi_open(unsigned spi_channel, unsigned baud, unsigned spi_flags);
|
||||||
/*D
|
/*D
|
||||||
This function returns a handle for the SPI device on channel.
|
This function returns a handle for the SPI device on the channel.
|
||||||
Data will be transferred at baud bits per second. The flags may
|
Data will be transferred at baud bits per second. The flags may
|
||||||
be used to modify the default behaviour of 4-wire operation, mode 0,
|
be used to modify the default behaviour of 4-wire operation, mode 0,
|
||||||
active low chip select.
|
active low chip select.
|
||||||
|
|
||||||
An auxiliary SPI device is available on all models but the
|
The Pi has two SPI peripherals: main and auxiliary.
|
||||||
A and B and may be selected by setting the A bit in the
|
|
||||||
flags. The auxiliary device has 3 chip selects and a
|
The main SPI has two chip selects (channels), the auxiliary has
|
||||||
selectable word size in bits.
|
three.
|
||||||
|
|
||||||
|
The auxiliary SPI is available on all models but the A and B.
|
||||||
|
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
@ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2
|
||||||
|
Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ -
|
||||||
|
Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16
|
||||||
|
|
||||||
. .
|
. .
|
||||||
spi_channel: 0-1 (0-2 for the auxiliary SPI device).
|
spi_channel: 0-1 (0-2 for the auxiliary SPI).
|
||||||
baud: 32K-125M (values above 30M are unlikely to work).
|
baud: 32K-125M (values above 30M are unlikely to work).
|
||||||
spi_flags: see below.
|
spi_flags: see below.
|
||||||
. .
|
. .
|
||||||
|
@ -2178,7 +2192,7 @@ spi_flags consists of the least significant 22 bits.
|
||||||
|
|
||||||
mm defines the SPI mode.
|
mm defines the SPI mode.
|
||||||
|
|
||||||
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
|
Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
|
||||||
|
|
||||||
. .
|
. .
|
||||||
Mode POL PHA
|
Mode POL PHA
|
||||||
|
@ -2192,25 +2206,25 @@ px is 0 if CEx is active low (default) and 1 for active high.
|
||||||
|
|
||||||
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
||||||
|
|
||||||
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
|
A is 0 for the main SPI, 1 for the auxiliary SPI.
|
||||||
|
|
||||||
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
|
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
|
||||||
SPI device only.
|
SPI only.
|
||||||
|
|
||||||
nnnn defines the number of bytes (0-15) to write before switching
|
nnnn defines the number of bytes (0-15) to write before switching
|
||||||
the MOSI line to MISO to read data. This field is ignored
|
the MOSI line to MISO to read data. This field is ignored
|
||||||
if W is not set. Standard SPI device only.
|
if W is not set. Main SPI only.
|
||||||
|
|
||||||
T is 1 if the least significant bit is transmitted on MOSI first, the
|
T is 1 if the least significant bit is transmitted on MOSI first, the
|
||||||
default (0) shifts the most significant bit out first. Auxiliary SPI
|
default (0) shifts the most significant bit out first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
R is 1 if the least significant bit is received on MISO first, the
|
R is 1 if the least significant bit is received on MISO first, the
|
||||||
default (0) receives the most significant bit first. Auxiliary SPI
|
default (0) receives the most significant bit first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
bbbbbb defines the word size in bits (0-32). The default (0)
|
bbbbbb defines the word size in bits (0-32). The default (0)
|
||||||
sets 8 bits per word. Auxiliary SPI device only.
|
sets 8 bits per word. Auxiliary SPI only.
|
||||||
|
|
||||||
The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
|
The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
|
||||||
transfer data packed into 1, 2, or 4 bytes according to
|
transfer data packed into 1, 2, or 4 bytes according to
|
||||||
|
|
|
@ -2870,6 +2870,21 @@ will be available if a kernel supported bus multiplexor is being used.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
SDA SCL
|
||||||
|
.br
|
||||||
|
I2C 0 0 1
|
||||||
|
.br
|
||||||
|
I2C 1 2 3
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
|
Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
|
||||||
PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
|
PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
|
||||||
|
@ -4135,7 +4150,7 @@ int main(int argc, char *argv[])
|
||||||
|
|
||||||
.IP "\fBint spi_open(int pi, unsigned spi_channel, unsigned baud, unsigned spi_flags)\fP"
|
.IP "\fBint spi_open(int pi, unsigned spi_channel, unsigned baud, unsigned spi_flags)\fP"
|
||||||
.IP "" 4
|
.IP "" 4
|
||||||
This function returns a handle for the SPI device on channel.
|
This function returns a handle for the SPI device on the channel.
|
||||||
Data will be transferred at baud bits per second. The flags may
|
Data will be transferred at baud bits per second. The flags may
|
||||||
be used to modify the default behaviour of 4-wire operation, mode 0,
|
be used to modify the default behaviour of 4-wire operation, mode 0,
|
||||||
active low chip select.
|
active low chip select.
|
||||||
|
@ -4143,10 +4158,33 @@ active low chip select.
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
An auxiliary SPI device is available on all models but the
|
The Pi has two SPI peripherals: main and auxiliary.
|
||||||
A and B and may be selected by setting the A bit in the
|
|
||||||
flags. The auxiliary device has 3 chip selects and a
|
.br
|
||||||
selectable word size in bits.
|
|
||||||
|
.br
|
||||||
|
The main SPI has two chip selects (channels), the auxiliary has
|
||||||
|
three.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
The auxiliary SPI is available on all models but the A and B.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.br
|
||||||
|
MISO MOSI SCLK CE0 CE1 CE2
|
||||||
|
.br
|
||||||
|
Main SPI 9 10 11 8 7 -
|
||||||
|
.br
|
||||||
|
Aux SPI 19 20 21 18 17 16
|
||||||
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
@ -4155,7 +4193,7 @@ selectable word size in bits.
|
||||||
.EX
|
.EX
|
||||||
pi: >=0 (as returned by \fBpigpio_start\fP).
|
pi: >=0 (as returned by \fBpigpio_start\fP).
|
||||||
.br
|
.br
|
||||||
spi_channel: 0-1 (0-2 for the auxiliary device).
|
spi_channel: 0-1 (0-2 for the auxiliary SPI).
|
||||||
.br
|
.br
|
||||||
baud: 32K-125M (values above 30M are unlikely to work).
|
baud: 32K-125M (values above 30M are unlikely to work).
|
||||||
.br
|
.br
|
||||||
|
@ -4195,7 +4233,7 @@ mm defines the SPI mode.
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
|
Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
@ -4228,40 +4266,40 @@ ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
|
A is 0 for the main SPI, 1 for the auxiliary SPI.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
|
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
|
||||||
SPI device only.
|
SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
nnnn defines the number of bytes (0-15) to write before switching
|
nnnn defines the number of bytes (0-15) to write before switching
|
||||||
the MOSI line to MISO to read data. This field is ignored
|
the MOSI line to MISO to read data. This field is ignored
|
||||||
if W is not set. Standard SPI device only.
|
if W is not set. Main SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
T is 1 if the least significant bit is transmitted on MOSI first, the
|
T is 1 if the least significant bit is transmitted on MOSI first, the
|
||||||
default (0) shifts the most significant bit out first. Auxiliary SPI
|
default (0) shifts the most significant bit out first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
R is 1 if the least significant bit is received on MISO first, the
|
R is 1 if the least significant bit is received on MISO first, the
|
||||||
default (0) receives the most significant bit first. Auxiliary SPI
|
default (0) receives the most significant bit first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
.br
|
.br
|
||||||
bbbbbb defines the word size in bits (0-32). The default (0)
|
bbbbbb defines the word size in bits (0-32). The default (0)
|
||||||
sets 8 bits per word. Auxiliary SPI device only.
|
sets 8 bits per word. Auxiliary SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
|
|
@ -1887,6 +1887,12 @@ No flags are currently defined. This parameter should be set to zero.
|
||||||
Physically buses 0 and 1 are available on the Pi. Higher numbered buses
|
Physically buses 0 and 1 are available on the Pi. Higher numbered buses
|
||||||
will be available if a kernel supported bus multiplexor is being used.
|
will be available if a kernel supported bus multiplexor is being used.
|
||||||
|
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
@ SDA @ SCL
|
||||||
|
I2C 0 @ 0 @ 1
|
||||||
|
I2C 1 @ 2 @ 3
|
||||||
|
|
||||||
Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
|
Returns a handle (>=0) if OK, otherwise PI_BAD_I2C_BUS, PI_BAD_I2C_ADDR,
|
||||||
PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
|
PI_BAD_FLAGS, PI_NO_HANDLE, or PI_I2C_OPEN_FAILED.
|
||||||
|
|
||||||
|
@ -2601,19 +2607,27 @@ D*/
|
||||||
/*F*/
|
/*F*/
|
||||||
int spi_open(int pi, unsigned spi_channel, unsigned baud, unsigned spi_flags);
|
int spi_open(int pi, unsigned spi_channel, unsigned baud, unsigned spi_flags);
|
||||||
/*D
|
/*D
|
||||||
This function returns a handle for the SPI device on channel.
|
This function returns a handle for the SPI device on the channel.
|
||||||
Data will be transferred at baud bits per second. The flags may
|
Data will be transferred at baud bits per second. The flags may
|
||||||
be used to modify the default behaviour of 4-wire operation, mode 0,
|
be used to modify the default behaviour of 4-wire operation, mode 0,
|
||||||
active low chip select.
|
active low chip select.
|
||||||
|
|
||||||
An auxiliary SPI device is available on all models but the
|
The Pi has two SPI peripherals: main and auxiliary.
|
||||||
A and B and may be selected by setting the A bit in the
|
|
||||||
flags. The auxiliary device has 3 chip selects and a
|
The main SPI has two chip selects (channels), the auxiliary has
|
||||||
selectable word size in bits.
|
three.
|
||||||
|
|
||||||
|
The auxiliary SPI is available on all models but the A and B.
|
||||||
|
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
@ MISO @ MOSI @ SCLK @ CE0 @ CE1 @ CE2
|
||||||
|
Main SPI @ 9 @ 10 @ 11 @ 8 @ 7 @ -
|
||||||
|
Aux SPI @ 19 @ 20 @ 21 @ 18 @ 17 @ 16
|
||||||
|
|
||||||
. .
|
. .
|
||||||
pi: >=0 (as returned by [*pigpio_start*]).
|
pi: >=0 (as returned by [*pigpio_start*]).
|
||||||
spi_channel: 0-1 (0-2 for the auxiliary device).
|
spi_channel: 0-1 (0-2 for the auxiliary SPI).
|
||||||
baud: 32K-125M (values above 30M are unlikely to work).
|
baud: 32K-125M (values above 30M are unlikely to work).
|
||||||
spi_flags: see below.
|
spi_flags: see below.
|
||||||
. .
|
. .
|
||||||
|
@ -2630,7 +2644,7 @@ spi_flags consists of the least significant 22 bits.
|
||||||
|
|
||||||
mm defines the SPI mode.
|
mm defines the SPI mode.
|
||||||
|
|
||||||
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
|
Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
|
||||||
|
|
||||||
. .
|
. .
|
||||||
Mode POL PHA
|
Mode POL PHA
|
||||||
|
@ -2644,25 +2658,25 @@ px is 0 if CEx is active low (default) and 1 for active high.
|
||||||
|
|
||||||
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
||||||
|
|
||||||
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
|
A is 0 for the main SPI, 1 for the auxiliary SPI.
|
||||||
|
|
||||||
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
|
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
|
||||||
SPI device only.
|
SPI only.
|
||||||
|
|
||||||
nnnn defines the number of bytes (0-15) to write before switching
|
nnnn defines the number of bytes (0-15) to write before switching
|
||||||
the MOSI line to MISO to read data. This field is ignored
|
the MOSI line to MISO to read data. This field is ignored
|
||||||
if W is not set. Standard SPI device only.
|
if W is not set. Main SPI only.
|
||||||
|
|
||||||
T is 1 if the least significant bit is transmitted on MOSI first, the
|
T is 1 if the least significant bit is transmitted on MOSI first, the
|
||||||
default (0) shifts the most significant bit out first. Auxiliary SPI
|
default (0) shifts the most significant bit out first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
R is 1 if the least significant bit is received on MISO first, the
|
R is 1 if the least significant bit is received on MISO first, the
|
||||||
default (0) receives the most significant bit first. Auxiliary SPI
|
default (0) receives the most significant bit first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
bbbbbb defines the word size in bits (0-32). The default (0)
|
bbbbbb defines the word size in bits (0-32). The default (0)
|
||||||
sets 8 bits per word. Auxiliary SPI device only.
|
sets 8 bits per word. Auxiliary SPI only.
|
||||||
|
|
||||||
The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
|
The [*spi_read*], [*spi_write*], and [*spi_xfer*] functions
|
||||||
transfer data packed into 1, 2, or 4 bytes according to
|
transfer data packed into 1, 2, or 4 bytes according to
|
||||||
|
|
52
pigs.1
52
pigs.1
|
@ -1845,6 +1845,18 @@ Physically buses 0 and 1 are available on the Pi. Higher
|
||||||
numbered buses will be available if a kernel supported bus
|
numbered buses will be available if a kernel supported bus
|
||||||
multiplexor is being used.
|
multiplexor is being used.
|
||||||
|
|
||||||
|
.br
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.EX
|
||||||
|
SDA SCL
|
||||||
|
I2C 0 0 1
|
||||||
|
I2C 1 2 3
|
||||||
|
|
||||||
|
.EE
|
||||||
|
|
||||||
.br
|
.br
|
||||||
No flags are currently defined. The parameter \fBif\fP should be 0.
|
No flags are currently defined. The parameter \fBif\fP should be 0.
|
||||||
|
|
||||||
|
@ -3944,10 +3956,26 @@ Speeds between 32kbps and 125Mbps are allowed. Speeds above 30Mbps
|
||||||
are unlikely to work.
|
are unlikely to work.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
An auxiliary SPI device is available on all models but the
|
The Pi has two SPI peripherals: main and auxiliary.
|
||||||
A and B and may be selected by setting the A bit in the
|
|
||||||
flags. The auxiliary device has 3 chip selects and a
|
.br
|
||||||
selectable word size in bits.
|
The main SPI has two chip selects (channels), the auxiliary has
|
||||||
|
three.
|
||||||
|
|
||||||
|
.br
|
||||||
|
The auxiliary SPI is available on all models but the A and B.
|
||||||
|
|
||||||
|
.br
|
||||||
|
The GPIO used are given in the following table.
|
||||||
|
|
||||||
|
.br
|
||||||
|
|
||||||
|
.EX
|
||||||
|
MISO MOSI SCLK CE0 CE1 CE2
|
||||||
|
Main SPI 9 10 11 8 7 -
|
||||||
|
Aux SPI 19 20 21 18 17 16
|
||||||
|
|
||||||
|
.EE
|
||||||
|
|
||||||
.br
|
.br
|
||||||
The flags consists of the least significant 22 bits.
|
The flags consists of the least significant 22 bits.
|
||||||
|
@ -3966,7 +3994,7 @@ The flags consists of the least significant 22 bits.
|
||||||
mm defines the SPI mode.
|
mm defines the SPI mode.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
Warning: modes 1 and 3 do not appear to work on the auxiliary device.
|
Warning: modes 1 and 3 do not appear to work on the auxiliary SPI.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
|
|
||||||
|
@ -3991,30 +4019,30 @@ px is 0 if CEx is active low (default) and 1 for active high.
|
||||||
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
ux is 0 if the CEx GPIO is reserved for SPI (default) and 1 otherwise.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
A is 0 for the standard SPI device, 1 for the auxiliary SPI.
|
A is 0 for the main SPI, 1 for the auxiliary SPI.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Standard
|
W is 0 if the device is not 3-wire, 1 if the device is 3-wire. Main
|
||||||
SPI device only.
|
SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
nnnn defines the number of bytes (0-15) to write before switching
|
nnnn defines the number of bytes (0-15) to write before switching
|
||||||
the MOSI line to MISO to read data. This field is ignored
|
the MOSI line to MISO to read data. This field is ignored
|
||||||
if W is not set. Standard SPI device only.
|
if W is not set. Main SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
T is 1 if the least significant bit is transmitted on MOSI first, the
|
T is 1 if the least significant bit is transmitted on MOSI first, the
|
||||||
default (0) shifts the most significant bit out first. Auxiliary SPI
|
default (0) shifts the most significant bit out first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
R is 1 if the least significant bit is received on MISO first, the
|
R is 1 if the least significant bit is received on MISO first, the
|
||||||
default (0) receives the most significant bit first. Auxiliary SPI
|
default (0) receives the most significant bit first. Auxiliary SPI
|
||||||
device only.
|
only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
bbbbbb defines the word size in bits (0-32). The default (0)
|
bbbbbb defines the word size in bits (0-32). The default (0)
|
||||||
sets 8 bits per word. Auxiliary SPI device only.
|
sets 8 bits per word. Auxiliary SPI only.
|
||||||
|
|
||||||
.br
|
.br
|
||||||
The \fBSPIR\fP, \fBSPIW\fP, and \fBSPIX\fP commands transfer data
|
The \fBSPIR\fP, \fBSPIW\fP, and \fBSPIX\fP commands transfer data
|
||||||
|
|
Loading…
Reference in New Issue